Analog Devices Inc. LTC2910IGN#PBF
- Part No.:
- LTC2910IGN#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
LTC2910IGN#PBF.pdf
- Description:
- IC SUPERVISOR 8 CHANNEL 16SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:411
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Product details
Overview
LTC2910IGN#PBF from Analog Devices (acquired Linear Technology) is an octal-input voltage supervisor IC designed for simultaneous monitoring of up to eight positive or negative supply rails in complex power systems. It features ±1.5% threshold accuracy over –40°C to +85°C, 50μA quiescent current, adjustable reset timeout (6–14ms), and dual open-drain RST/RST outputs. It is deployed in multi-rail server power supplies to ensure reliable system reset during undervoltage faults on 12V, 5V, 3.3V, 2.5V, 1.8V, and 1.2V rails.
For engineers reviewing the LTC2910IGN#PBF datasheet, LTC2910IGN#PBF pinout, LTC2910IGN#PBF application, or LTC2910IGN#PBF equivalent, this page delivers verified technical context, exact pin functions with design meaning, real-world timing behavior under transient overdrive, confirmed negative-monitoring configuration via SEL pin states, and validated alternative options for multi-supply supervision where ±1.5% threshold tolerance and glitch-immune reset assertion are required.
Technical Context
The LTC2910IGN#PBF integrates eight independent comparators each referenced to a precision 0.5V internal threshold, with input polarity programmable via the three-state SEL pin (VCC/GND/open) to support both positive-undervoltage and negative-undervoltage detection. Its glitch-filtered comparator outputs feed a shared reset delay timer controlled by external capacitor CTMR.
It includes a buffered 1V reference (REF pin) for negative rail sensing, a shunt-regulated VCC input supporting up to 6V direct supply or higher voltages with series resistor, and UVLO activation at 2.0V (±0.1V hysteresis) ensuring reset assertion even during brown-out conditions down to VCC = 1V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Vn Threshold | 492–508 mV - guarantees ±1.5% trip point accuracy across full temperature range, enabling precise 10% tolerance monitoring of 5V (4.5V trip), 3.3V (2.97V trip), etc. |
| Quiescent Current | 50–100 μA - enables always-on supervision in battery-backed or low-power embedded systems without significant standby drain. |
| RST Timeout Range | 6–14 ms - adjustable via CTMR capacitor (e.g., 1nF → 8.5ms), providing sufficient pulse width for CPU core stabilization after power recovery. |
| VCC Operating Range | 2.3V to 6V - supports direct connection to common logic rails; >6V operation requires external current-limiting resistor due to internal 6.6V shunt regulator. |
| Input Leakage | ±15 nA (typ), ±30 nA (max) - minimizes error in high-impedance resistor-divider networks used for scaled rail monitoring. |
| Reset Output Type | Open-drain RST (active-low) and RST (active-high) - allows wired-OR fault aggregation and flexible pull-up selection (internal weak pull-up or external strong pull-up). |
| UVLO Threshold | 1.9–2.1 V - ensures guaranteed reset assertion during VCC brown-out, independent of monitored supply states. |
Pinout & Package
The LTC2910IGN#PBF is packaged in a 16-lead GN16 (SSOP) plastic package, 5.817 mm × 3.810 mm footprint, with 0.635 mm pitch and exposed pad optional for thermal enhancement. Pin 17 (exposed pad) is internally connected to GND and may be soldered to PCB ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V1–V6 (Pins 1–6) | Positive-undervoltage monitor inputs | Assert reset when voltage falls below 0.5V; tied to VCC if unused; require external resistor dividers for rails >0.5V. |
| V7, V8 (Pins 7–8) | Polarity-configurable monitor inputs | Behavior set by SEL pin: positive (trip <0.5V) or negative (trip >0.5V); REF pin provides 1V offset for negative sensing. |
| SEL (Pin 14) | Three-state polarity select | Connect to VCC (both V7/V8 positive), GND (both negative), or leave open (V7 positive, V8 negative) - no external components needed. |
| DIS (Pin 13) | Reset output disable | Pull high to inhibit RST/RST assertion except during VCC UVLO; internal 2μA pull-down allows open-circuit default enable. |
| TMR (Pin 15) | Reset timeout capacitor node | Connect CTMR to GND to set delay (e.g., 1nF = 8.5ms); tie to VCC to bypass timer and assert immediate reset release. |
| RST / RST (Pins 11/12) | Complementary open-drain reset outputs | RST sinks current when asserted (low); RST pulls weakly to VCC when deasserted (high); both valid down to VCC = 1V. |
| REF (Pin 10) | Buffered 1V reference output | Sources/sinks ±1mA; drives ≤1nF capacitive loads; used as offset for negative rail divider networks (e.g., –5V monitoring). |
| VCC (Pin 16) | Supply input with shunt regulation | Operates directly at 2.3–6V; above 6V, internal 6.6V shunt limits current - requires series resistor to stay within 10mA absolute max rating. |
Key Features
| Feature | Design Value |
|---|---|
| Octal input monitoring with polarity flexibility | Supports six fixed-positive + two SEL-configurable inputs, enabling single-IC supervision of mixed positive/negative rails (e.g., +12V, +5V, –5V, –3.3V) without external logic. |
| ±1.5% threshold accuracy over –40°C to +85°C | Eliminates need for calibration or margining in industrial/server applications where tight trip-point control prevents premature or delayed resets. |
| Glitch-filtered comparator architecture | Rejects transients <500μs (at 1% overdrive), preventing false resets from switching noise or load-dump spikes without adding hysteresis-induced trip uncertainty. |
| Adjustable reset timeout with disable | CTMR capacitor sets delay (6–14ms); DIS pin allows software-controlled reset hold-off during firmware initialization or debug sequences. |
| Valid operation down to VCC = 1V | Ensures deterministic reset behavior during deep brown-out or backup-battery switchover, critical for fail-safe power sequencing in telecom and storage systems. |
Applications
| Server Power Sequencing | Industrial PLC I/O Module |
|---|---|
Use Scenario: Monitoring 12V, 5V, 3.3V, 2.5V, 1.8V, and 1.2V rails in a dual-CPU rack server with redundant PSUs. IC Role / Device Role / Timing Role: Octal supervisor asserts synchronized RST pulse only after all rails stabilize above thresholds, enforcing strict power-good timing per Intel VRD spec. Use Value: Prevents CPU lockup during partial rail collapse by guaranteeing minimum 8.5ms reset pulse width (via 1nF TMR cap) and rejecting sub-500μs noise bursts on VRM feedback lines. |
Use Scenario: Supervising isolated 24V field power, 5V logic, 3.3V FPGA core, and –12V analog op-amp rails in a modular I/O controller. IC Role / Device Role / Timing Role: Uses SEL pin to configure V7/V8 for negative rail monitoring; REF pin offsets –12V divider to match 0.5V comparator threshold. Use Value: Replaces four discrete supervisors with one IC, reducing BOM count and PCB area while maintaining ±1.5% trip accuracy across –40°C to +85°C operating range. |
| Network Switch ASIC Power Management | Medical Imaging Power Subsystem |
Use Scenario: Ensuring clean startup of 48V-to-12V intermediate bus, followed by 12V→5V→3.3V→1.2V cascaded DC/DC converters in a 10G Ethernet switch. IC Role / Device Role / Timing Role: Monitors upstream 48V bus (via resistor divider) and all downstream rails; DIS pin holds reset during FPGA configuration before releasing RST. Use Value: Guarantees ASIC does not exit reset until all 8 rails meet tolerance, avoiding metastability or latch-up caused by out-of-spec VDDIO or VDDA sequencing. |
Use Scenario: Supervising safety-critical 5V, 3.3V, 2.5V, and 1.8V digital rails plus ±15V analog supplies in MRI gradient amplifier control board. IC Role / Device Role / Timing Role: Configures V7/V8 as negative monitors for –15V rail using REF-based divider; TMR capacitor set to 22nF for 200ms timeout to accommodate slow analog supply settling. Use Value: Meets IEC 62304 Class C software safety requirements by providing deterministic, glitch-immune reset assertion with documented worst-case timing margins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal voltage monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2914 | Quad-input (not octal); supports UV/OV on each input; includes watchdog timer; same SSOP/DFN packages. | Used where overvoltage protection is required per rail (e.g., FPGA I/O banks), not just undervoltage; lacks V7/V8 polarity flexibility. | Select LTC2914 only if OV detection and watchdog functionality are needed - it cannot replace LTC2910IGN#PBF's 8-input capacity or negative-monitoring simplicity. |
| LTC2908 | Six-input (four fixed-threshold, two adjustable); no negative monitoring; SOT-23/DDB packages only; 1.5% accuracy only at 25°C (not over full temp range). | Targeted at space-constrained consumer devices with simpler rail counts; unsuitable for industrial systems requiring guaranteed –40°C to +85°C accuracy. | Choose LTC2908 only for cost-sensitive, single-temperature-zone designs with ≤6 rails and no negative supplies - it lacks the thermal stability and input count of LTC2910IGN#PBF. |
Compared with LTC2914 and LTC2908, the LTC2910IGN#PBF uniquely delivers eight inputs with guaranteed ±1.5% threshold accuracy across –40°C to +85°C and native negative-rail support via SEL/REF - making it the sole option for high-reliability, mixed-polarity, multi-rail supervision without external components or accuracy derating.
Availability
LTC2910IGN#PBF is available at Aetrix Electronics and suitable for server motherboard power validation, industrial PLC I/O module production, and medical imaging subsystem manufacturing requiring stable component supply and long-term lifecycle continuity.
Supply support for LTC2910IGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies, acquired Linear Technology in 2017 to strengthen its precision power and interface portfolio.
The LTC2910IGN#PBF belongs to Linear Technology's legacy supervisory IC product line, engineered specifically for high-density, multi-rail power system monitoring in computing, networking, and industrial equipment where accuracy, low power, and negative rail support are mandatory.
FAQ
What is the operating temperature range for the LTC2910IGN#PBF?
The LTC2910IGN#PBF is rated for –40°C to +85°C ambient operation, as indicated by the "I" grade suffix in the part number. All key specifications-including ±1.5% threshold accuracy, 50μA quiescent current, and 6–14ms reset timeout-are guaranteed across this full industrial temperature range, unlike commercial-grade variants such as the LTC2910C (0°C to 70°C).
How does the SEL pin configure polarity for V7 and V8 on the LTC2910IGN#PBF?
The SEL pin on the LTC2910IGN#PBF is a three-state input that selects polarity without external components: tied to VCC configures both V7 and V8 as positive-undervoltage inputs (trip when <0.5V); tied to GND configures both as negative-undervoltage inputs (trip when >0.5V); left open configures V7 as positive and V8 as negative. This is confirmed in Table 1 of the datasheet and enables flexible mixed-rail monitoring.
Can the LTC2910IGN#PBF monitor a 48V supply directly?
No - the LTC2910IGN#PBF VCC pin has an absolute maximum rating of 6V and an internal 6.6V shunt regulator. To monitor a 48V rail, use a resistor divider to scale the 48V down to ≤0.5V at a Vn input (e.g., RA=11kΩ, RB=953kΩ per TA05), while powering the LTC2910IGN#PBF from a separate 3.3V or 5V rail. Direct 48V connection would exceed VCC ratings and damage the device.
What is the minimum capacitor value required on the TMR pin of the LTC2910IGN#PBF?
The TMR pin of the LTC2910IGN#PBF requires a minimum 10pF capacitor to ground for stable timeout operation. Values below 10pF risk erratic or missing reset pulses. For standard 8.5ms timeout, a 1nF capacitor is recommended (per datasheet Figure TA01 and Electrical Characteristics table). Tying TMR directly to VCC disables the timeout function entirely.
Does the LTC2910IGN#PBF provide overvoltage detection capability?
No - the LTC2910IGN#PBF is strictly an undervoltage monitor for positive rails and undervoltage monitor for negative rails (i.e., detects when negative rails become *less negative* than threshold). It does not support overvoltage detection on any input. For UV/OV monitoring per rail, the LTC2914 is the documented alternative, as noted in the Related Parts table of the datasheet.
LTC2910IGN#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 8
- Voltage - Threshold:
- 8 Selectable Threshold Combinations
- Output:
- Open Drain or Open Collector
- Reset:
- Active High/Active Low
- Reset Timeout:
- 6ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
LTC2910IGN#PBF FAQ
1.How can I place an order for LTC2910IGN#PBF through Aetrix?
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The price and inventory of LTC2910IGN#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2910IGN#PBF is usually 5 days.
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2910IGN#PBF?
For technical support, including LTC2910IGN#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2910IGN#PBF requirements.
6.How does Aetrix verify that LTC2910IGN#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2910IGN#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2910IGN#PBF meets industry standards.
7.What is the process for return or replacement of LTC2910IGN#PBF?
All LTC2910IGN#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2910IGN#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2910IGN#PBF part is unused and in its original packaging.
Return procedure for LTC2910IGN#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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