Analog Devices Inc. LTC2913CDD-1#PBF

Overview

LTC2913CDD-1#PBF from Analog Devices (formerly Linear Technology) is a dual-input undervoltage/overvoltage supervisor IC with latching OV output, designed for monitoring two independent supply rails in space-constrained systems. It features ±1.5% threshold accuracy, 44 μA quiescent current, adjustable reset timeout via external capacitor, and guaranteed operation down to VCC = 1 V. Used in desktop/notebook computers and network servers for core/I/O voltage supervision.

For engineers reviewing the LTC2913CDD-1#PBF datasheet, LTC2913CDD-1#PBF pinout, LTC2913CDD-1#PBF application, or LTC2913CDD-1#PBF equivalent, key selection considerations include its dual UV/OV input architecture, latch-enabled OV output behavior, MSOP/DFN package compatibility, and precise 500 mV internal reference for resistor-divider-based trip-point programming.

Technical Context

The LTC2913CDD-1#PBF implements two independent comparator pairs per monitored rail - one for undervoltage (VHn < 0.5 V) and one for overvoltage (VLn > 0.5 V) detection - sharing common open-drain UV and OV outputs. Its internal 500 mV reference enables accurate trip-point setting via external resistor dividers, with glitch filtering integrated at each comparator output to suppress transient-induced false triggers.

It uses an external capacitor on the TMR pin to set a programmable timeout period (6–14 ms typical per 1 nF), holding UV/OV asserted after fault clearance. The LATCH pin (Pin 8) enables OV latching when pulled low, and clearing/bypassing when pulled high - a defining functional distinction versus the -2 variant.

Key Specifications

Pinout & Package

Package: 10-lead (3 mm × 3 mm) plastic DFN with exposed pad (Pin 11, optional GND connection). Pin count and layout match MSOP variant but offer lower thermal resistance (θ_JA = 43°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual UV/OV monitoring applications.

Compared with LTC2913CMS-1, the LTC2913CDD-1#PBF offers superior thermal performance in compact layouts; compared with LTC2904CS8#PBF, it provides essential latching and timeout flexibility for robust server/desktop supervision - making it the optimal choice where fault persistence and thermal efficiency are design priorities.

Availability

LTC2913CDD-1#PBF is available at Aetrix Electronics and suitable for desktop computers, network servers, and embedded industrial controllers requiring stable component supply with guaranteed long-term availability and traceable sourcing.

Supply support for LTC2913CDD-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains its precision analog and power management product lines with full technical and manufacturing continuity.

The LTC2913 family is part of Linear's high-accuracy voltage supervisor portfolio, engineered specifically for multi-rail power integrity assurance in computing, communications, and industrial systems where reliability and low power are critical.

FAQ

What is the function of the LATCH pin on the LTC2913CDD-1#PBF?

The LATCH pin (Pin 8) controls the overvoltage output behavior of the LTC2913CDD-1#PBF. When pulled low, it enables latching - causing the OV pin to remain asserted low after an overvoltage event until the pin is actively pulled high to clear the latch. When held high, OV operates like UV with a programmable timeout, releasing after the TMR delay expires. This behavior distinguishes the LTC2913CDD-1#PBF from the -2 variant.

Can the LTC2913CDD-1#PBF monitor negative voltages?

No, the LTC2913CDD-1#PBF is designed exclusively for positive-supply monitoring. Its VHn and VLn inputs operate relative to GND and require input voltages between –0.3 V and 7.5 V. For negative rail supervision, Analog Devices offers the LTC2909 or LTC2914, which support dedicated negative-voltage inputs and biasing schemes not present in the LTC2913CDD-1#PBF.

How is the reset timeout period set on the LTC2913CDD-1#PBF?

The reset timeout period on the LTC2913CDD-1#PBF is set by connecting an external capacitor (C_TMR) between the TMR pin (Pin 9) and GND. The timeout is approximately 9 ms per nanofarad (e.g., 22 nF yields ~200 ms). The device specifies a minimum 10 pF load; tying TMR to V_CC disables the timeout entirely. This capacitor value directly determines the minimum pulse width of UV and OV outputs after fault recovery.

What is the minimum V_CC voltage required for valid operation of the LTC2913CDD-1#PBF?

The LTC2913CDD-1#PBF guarantees valid UV and OV output assertion down to V_CC = 1 V. Below 2 V, the device enters undervoltage lockout (UVLO), asserting UV low and blocking OV. Above 2.1 V (max), the VHn/VLn comparators become fully active and control the outputs. This 1 V operational floor makes the LTC2913CDD-1#PBF suitable for brownout detection in low-voltage systems.

Does the LTC2913CDD-1#PBF require external pull-up resistors on UV and OV pins?

The LTC2913CDD-1#PBF includes weak internal pull-ups to V_CC on both UV and OV pins, eliminating the need for external pull-ups in most cases. However, at V_CC < 1.5 V, the internal pull-up strength diminishes significantly; for reliable high-state assurance under very low V_CC, a ≤100 kΩ external pull-up is recommended - especially on OV when latching behavior must be preserved during deep brownout conditions.