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Analog Devices Inc. LTC2913CDD-2#PBF
- Part No.:
- LTC2913CDD-2#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC2913CDD-2#PBF.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 10DFN
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
LTC2913CDD-2#PBF from Analog Devices (formerly Linear Technology) is a dual-input, dual-threshold voltage monitor IC designed for simultaneous undervoltage (UV) and overvoltage (OV) supervision of two independent power rails. It features adjustable UV/OV trip points with ±1.5% threshold accuracy, 44 μA quiescent current, open-drain UV/OV outputs, and a dedicated DIS pin to disable both outputs. It is used in desktop/notebook computers and network servers for core/I/O supply monitoring.
For engineers reviewing the LTC2913CDD-2#PBF datasheet, LTC2913CDD-2#PBF pinout, LTC2913CDD-2#PBF application, or LTC2913CDD-2#PBF equivalent, key selection considerations include its 10-lead DFN (3mm × 3mm) package, guaranteed operation down to VCC = 1 V, glitch-filtered comparator inputs, adjustable reset timeout via external capacitor, and DIS-enabled output disable functionality.
Technical Context
The LTC2913CDD-2#PBF implements two independent high-side (VH1/VH2) and low-side (VL1/VL2) input pairs, each configured to detect UV (VH < 0.5 V) and OV (VL > 0.5 V) conditions relative to a common 500 mV internal reference. Its architecture includes integrated glitch filtering on all inputs and a programmable timeout timer (TMR pin) that holds UV/OV assertion after fault clearance.
Unlike the LTC2913-1 variant, the LTC2913CDD-2#PBF replaces the LATCH pin with a DIS (disable) pin: when pulled high, DIS forces both UV and OV outputs into a weakly pulled-high state-except during VCC undervoltage lockout (UVLO), where UV asserts low regardless. The device operates from VCC = 1 V to 6 V and integrates a 6.6 V shunt regulator for higher-supply compatibility.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Supply Range | 1 V to 6 V - guarantees functional UV/OV monitoring even during brownout; shunt regulation enables safe operation up to 16 V with external current-limiting resistor |
| Threshold Accuracy | ±1.5% over full temperature range - ensures precise trip points for 5 V/3.3 V supplies with ≤75 mV error at 5 V nominal |
| Quiescent Current | 44 μA typical - enables long battery life in always-on supervisory applications without compromising response speed |
| Input Threshold Voltage | 500 mV ±7.5 mV - fixed internal reference allows predictable resistor-divider design for any monitored rail |
| UV/OV Timeout Range | 6 ms to 14 ms (with 1 nF TMR cap) - provides configurable reset pulse width to accommodate system settling time |
| Output Type | Open-drain UV and OV - supports wired-OR reset bus architectures and level-shifting via external pull-ups |
| DIS Pin Function | Active-high disable - disables UV/OV assertion during normal operation; UV still asserts during VCC UVLO (≤2.1 V) |
Pinout & Package
Package: 10-lead (3mm × 3mm) plastic DFN with exposed pad (Pin 11, optional GND connection). RoHS-compliant, lead-free #PBF marking.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| VH1 (Pin 1) | Undervoltage sense input 1 | Monitors high-side tap of resistor divider; triggers UV when voltage falls below 500 mV |
| VL1 (Pin 2) | Overvoltage sense input 1 | Monitors low-side tap; triggers OV when voltage rises above 500 mV |
| VH2 (Pin 3) | Undervoltage sense input 2 | Independent second UV channel; identical threshold and timing behavior as VH1 |
| VL2 (Pin 4) | Overvoltage sense input 2 | Independent second OV channel; identical threshold and timing behavior as VL1 |
| GND (Pin 5) | Ground reference | Primary return path for all analog and digital circuitry; must be low-impedance |
| OV (Pin 6) | Open-drain overvoltage output | Asserts low during OV condition; weak internal pull-up to VCC; disabled when DIS = high |
| UV (Pin 7) | Open-drain undervoltage output | Asserts low during UV condition or VCC UVLO; disabled when DIS = high (except during UVLO) |
| DIS (Pin 8) | Output disable control | Active-high logic input; disables UV/OV assertion except during VCC undervoltage lockout |
| TMR (Pin 9) | Reset timeout timing capacitor node | Connects to GND via external capacitor (e.g., 22 nF for ~200 ms timeout); tie to VCC to bypass timer |
| VCC (Pin 10) | Supply voltage input | Power source and internal reference; operates directly up to 6 V or as shunt-regulated input above 6 V |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent UV/OV monitoring channels | Enables concurrent supervision of two critical rails (e.g., 5 V and 3.3 V) with shared outputs and single timeout control |
| Adjustable reset timeout with external capacitor | Supports 6 ms–14 ms delay (1 nF) up to seconds-scale timing (large low-leakage caps), ensuring reliable system reset hold time |
| Guaranteed operation down to VCC = 1 V | Provides fail-safe UV assertion during deep brownout, enabling controlled shutdown before logic corruption |
| Glitch-immune comparator inputs | Integrated low-pass filtering rejects transients <400 μs at 1% overdrive, eliminating false resets from supply noise |
| DIS pin for active output disable | Allows software-controlled suppression of UV/OV signals during maintenance, test modes, or firmware updates |
Applications
| Desktop Computer Power Sequencing | Notebook System Core Voltage Monitoring |
|---|---|
Use Scenario: Supervising 12 V main input and 5 V/3.3 V secondary rails during cold boot and thermal throttling events. IC Role / Device Role / Timing Role: Dual-rail UV/OV monitor with DIS pin enabled only during BIOS initialization to prevent spurious resets. Use Value: Ensures CPU and chipset remain held in reset until all supplies stabilize within ±10%, leveraging ±1.5% threshold accuracy and 200 ms timeout. |
Use Scenario: Monitoring battery-backed 3.3 V real-time clock (RTC) rail and 5 V USB interface rail under dynamic load switching. IC Role / Device Role / Timing Role: Independent VH1/VL1 and VH2/VL2 inputs supervise both rails; DIS pin disables outputs during suspend-to-RAM transitions. Use Value: Prevents false wake-up from transient dips by rejecting sub-500 μs glitches while maintaining <44 μA quiescent draw for battery longevity. |
| Network Server I/O Voltage Integrity | Industrial Embedded Controller Power Health |
Use Scenario: Validating 3.3 V PCIe slot power and 1.8 V memory interface voltage in multi-slot blade servers. IC Role / Device Role / Timing Role: LTC2913CDD-2#PBF acts as centralized supervisor; TMR capacitor sets 100 ms timeout to align with FPGA configuration timing. Use Value: Open-drain UV/OV outputs enable wired-OR connection to a single system reset controller, simplifying board-level reset logic. |
Use Scenario: Detecting undervoltage on 24 V field bus input and overvoltage on isolated 5 V microcontroller supply in PLC modules. IC Role / Device Role / Timing Role: VH1/VL1 monitor 24 V via resistive divider; VH2/VL2 monitor 5 V directly; DIS pin tied high during firmware update to suppress resets. Use Value: Guaranteed operation from VCC = 1 V ensures UV assertion remains valid even during 24 V input sag to 12 V, preventing unsafe MCU operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UV/OV monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2913CMS-2 | Same electrical specs and DIS functionality, but in 10-lead MSOP package (3mm × 3mm footprint not identical; 3.0 mm vs 3.0 mm width but different lead pitch and exposed pad) | Preferred for through-hole prototyping or legacy MSOP-compatible layouts; higher θJA (120°C/W) vs DFN (43°C/W) | Select LTC2913CMS-2 only if MSOP footprint is required; thermal performance and board area differ significantly |
| LTC2904CS8#PBF | 3-state programmable dual supply monitor; adjustable tolerance (0.5%–5%), no DIS pin; 8-lead SOIC; requires external reference or uses internal 1.22 V bandgap | Used where precision tolerance tuning is needed over fixed 500 mV threshold; lacks integrated disable and glitch filtering | Choose LTC2904CS8#PBF when variable trip-point accuracy or SOIC assembly is mandatory; not drop-in for DIS-driven disable use cases |
Compared with LTC2913CMS-2 and LTC2904CS8#PBF, the LTC2913CDD-2#PBF uniquely combines DFN thermal efficiency, guaranteed 1 V operation, and hardware-based output disable-making it optimal for space-constrained, battery-sensitive, or firmware-coordinated reset architectures.
Availability
LTC2913CDD-2#PBF is available at Aetrix Electronics and suitable for desktop computers, network servers, and industrial embedded controllers requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for LTC2913CDD-2#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its precision analog portfolio. Linear pioneered high-performance power monitoring ICs with emphasis on accuracy, low power, and robustness in computing infrastructure.
The LTC2913 family was designed specifically for dual-rail voltage supervision in space-constrained, high-reliability systems-emphasizing ±1.5% threshold accuracy, micropower operation (<80 μA), and flexible output control (DIS/LATCH variants).
FAQ
What is the function of the DIS pin on the LTC2913CDD-2#PBF?
The DIS (disable) pin on the LTC2913CDD-2#PBF is an active-high control input that disables both UV and OV outputs when pulled high. During normal operation, this forces UV and OV into a weakly pulled-high state. However, if VCC drops below the undervoltage lockout threshold (~2.1 V), UV asserts low regardless of DIS state. The DIS pin has a 2 μA internal pull-down, so it defaults to enabled when left floating. This behavior makes LTC2913CDD-2#PBF ideal for firmware-coordinated reset suppression.
Can the LTC2913CDD-2#PBF monitor negative voltages?
No, the LTC2913CDD-2#PBF is designed exclusively for positive-voltage monitoring. Its VHn and VLn inputs operate with respect to GND and require applied voltages between –0.3 V and 7.5 V. For negative rail supervision, Analog Devices offers the LTC2909 or LTC2914, which support dedicated negative-input configurations. The LTC2913CDD-2#PBF's 500 mV internal reference and resistor-divider topology assume positive supply topologies only.
What is the minimum VCC voltage required for the LTC2913CDD-2#PBF to assert a valid UV output?
The LTC2913CDD-2#PBF guarantees UV output assertion down to VCC = 1 V. At this level, UV pulls low with VOL ≤ 0.15 V at 100 μA sink current, ensuring reliable reset signaling even during severe brownout. Above VCC = 2.1 V, the VHn/VLn comparators become fully active and control UV/OV based on input thresholds. Below 1 V, device operation is undefined per Absolute Maximum Ratings.
How does the TMR pin set the reset timeout period on the LTC2913CDD-2#PBF?
The TMR pin on the LTC2913CDD-2#PBF connects to an external capacitor (CTMR) tied to GND to set the UV/OV timeout period (tUOTO). The relationship is tUOTO ≈ 9 ms/nF, so a 22 nF capacitor yields ~200 ms. CTMR must be ≥10 pF; leakage must stay below 1.3 μA. Tying TMR directly to VCC bypasses the timer, causing immediate UV/OV deassertion upon fault clearance. The timeout applies identically to both UV and OV outputs.
Is the LTC2913CDD-2#PBF pin-compatible with the LTC2913CDD-1#PBF?
No, the LTC2913CDD-2#PBF is not pin-compatible with the LTC2913CDD-1#PBF. While both use the same 10-lead DFN package, Pin 8 is DIS on the LTC2913CDD-2#PBF but LATCH on the LTC2913CDD-1#PBF. Swapping them without board revision will cause incorrect functionality: the LATCH signal cannot disable outputs, and DIS cannot clear an OV latch. Always verify variant suffix (-1 vs -2) and consult the respective pinout diagrams before substitution.
LTC2913CDD-2#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LTC2913CDD-2#PBF FAQ
1.How can I place an order for LTC2913CDD-2#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2913CDD-2#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2913CDD-2#PBF reliable?
The price and inventory of LTC2913CDD-2#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2913CDD-2#PBF is usually 5 days.
3.What payment methods are accepted for LTC2913CDD-2#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2913CDD-2#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2913CDD-2#PBF?
LTC2913CDD-2#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2913CDD-2#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2913CDD-2#PBF?
For technical support, including LTC2913CDD-2#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2913CDD-2#PBF requirements.
6.How does Aetrix verify that LTC2913CDD-2#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2913CDD-2#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2913CDD-2#PBF meets industry standards.
7.What is the process for return or replacement of LTC2913CDD-2#PBF?
All LTC2913CDD-2#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2913CDD-2#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2913CDD-2#PBF part is unused and in its original packaging.
Return procedure for LTC2913CDD-2#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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