Analog Devices Inc. LTC2913CDD-2#TRPBF

Overview

LTC2913CDD-2#TRPBF from Analog Devices (formerly Linear Technology) is a dual-input, dual-threshold voltage supervisor IC designed for simultaneous undervoltage (UV) and overvoltage (OV) monitoring of two independent power rails. It features adjustable UV/OV trip points with ±1.5% threshold accuracy, 44 μA quiescent current, open-drain UV/OV outputs, and a dedicated DIS pin to disable both outputs. It is used in desktop/notebook computers and network servers for core/I/O supply monitoring.

For engineers reviewing the LTC2913CDD-2#TRPBF datasheet, LTC2913CDD-2#TRPBF pinout, LTC2913CDD-2#TRPBF application, or LTC2913CDD-2#TRPBF equivalent, key selection criteria include guaranteed operation down to VCC = 1 V, adjustable reset timeout via external capacitor, glitch-immune comparator architecture, and explicit DIS input functionality distinguishing it from the -1 variant.

Technical Context

The LTC2913CDD-2#TRPBF implements two independent comparator pairs (VH1/VL1 and VH2/VL2), each comparing input voltages against a common 500 mV internal reference. Its DIS pin (Pin 8) provides active-high output disable control-asserting high forces both UV and OV outputs into weak pull-up state except during VCC undervoltage lockout (UVLO).

Unlike the LTC2913-1 variant, the -2 version replaces the LATCH pin with DIS and eliminates OV latching; instead, both UV and OV outputs are held low for a programmable timeout period (e.g., 8.5 ms with 1 nF on TMR) after fault clearance, then released if all inputs remain valid. The internal shunt regulator enables operation up to 6 V directly or higher with external current limiting.

Key Specifications

Pinout & Package

Package: 10-lead (3 mm × 3 mm) plastic DFN with exposed pad (Pin 11, optional GND connection). Pin count and layout match MSOP variant but offer lower thermal resistance (θJA = 43°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual UV/OV monitoring applications.

Compared with LTC2913CMS-2, the LTC2913CDD-2#TRPBF offers superior thermal performance in compact layouts; compared with LTC2904CS8#TRPBF, it delivers tighter threshold accuracy, robust noise rejection, and active output disable - making it essential for high-reliability computing and server applications.

Availability

LTC2913CDD-2#TRPBF is available at Aetrix Electronics and suitable for desktop computers, network servers, and industrial embedded controllers requiring stable component supply with guaranteed long-term availability and traceable sourcing.

Supply support for LTC2913CDD-2#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains its precision analog portfolio. Linear pioneered high-accuracy voltage supervisors with micropower operation and robust noise immunity.

The LTC2913 family was designed specifically for dual-rail power integrity assurance in space-constrained, thermally demanding computing platforms - emphasizing ±1.5% threshold accuracy, sub-50 μA quiescent current, and configurable fault response.

FAQ

What is the function of the DIS pin on the LTC2913CDD-2#TRPBF?

The DIS (Disable) pin on the LTC2913CDD-2#TRPBF is an active-high control input that forces both UV and OV outputs into a weak pull-up-to-VCC state when asserted ≥1.2 V. This suppresses fault signaling during system maintenance, firmware updates, or safe-mode operation. When DIS is left open, its internal 2 μA pull-down ensures normal monitoring behavior. The LTC2913CDD-2#TRPBF does not assert UV/OV while DIS is high - except during VCC undervoltage lockout (UVLO), where UV remains active regardless.

How does the LTC2913CDD-2#TRPBF differ from the LTC2913-1 variant?

The LTC2913CDD-2#TRPBF replaces the LATCH pin (Pin 8) of the -1 variant with a DIS pin, removing OV latching capability and adding output disable functionality. While the -1 asserts and holds OV low until cleared via LATCH, the -2 releases OV after a programmable timeout once faults clear. Both share identical UV behavior, threshold accuracy, and pinout except for Pin 8's function. The LTC2913CDD-2#TRPBF is selected when deterministic timeout-based reset release - not persistent latch - is required.

What is the minimum VCC voltage required for valid operation of the LTC2913CDD-2#TRPBF?

The LTC2913CDD-2#TRPBF guarantees functional UV/OV output assertion down to VCC = 1 V, with UV pulling low and OV weakly pulled high. However, full comparator operation (i.e., accurate sensing of VH/VL inputs) begins only when VCC exceeds 2.0 V (typical UVLO rising threshold). Below this, the device enters undervoltage lockout - UV remains asserted, and OV is blocked. Thus, for reliable voltage monitoring, VCC must be ≥2.0 V; the 1 V rating supports brownout-safe sequencing during power-down.

Can the LTC2913CDD-2#TRPBF monitor negative voltages?

No, the LTC2913CDD-2#TRPBF is designed exclusively for positive-voltage monitoring. Its VH and VL inputs operate with respect to GND and require input voltages between –0.3 V and +7.5 V. To supervise negative rails, a level-shifting circuit (e.g., resistive divider referenced to a negative bias) is required - but such configurations are not supported by the device's internal architecture or datasheet guidance. For native negative voltage monitoring, Analog Devices recommends the LTC2909 or LTC2914, which explicitly support negative inputs.

How is the reset timeout period set on the LTC2913CDD-2#TRPBF?

The reset timeout period on the LTC2913CDD-2#TRPBF is set by connecting an external capacitor (CTMR) between the TMR pin (Pin 9) and GND. The timeout follows tUOTO ≈ CTMR × 115 ns/pF - e.g., a 1 nF capacitor yields ~8.5 ms. The TMR pin must see ≥10 pF load; tying it directly to VCC bypasses the timer entirely. Capacitor leakage must stay below 1.3 μA to avoid timing drift. The LTC2913CDD-2#TRPBF datasheet provides curves showing tUOTO vs. CTMR across temperature, enabling precise selection for target delay requirements.