Analog Devices Inc. LTC2913IDD-1#TRPBF
- Part No.:
- LTC2913IDD-1#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC2913IDD-1#TRPBF.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2913IDD-1#TRPBF from Analog Devices (formerly Linear Technology) is a dual-input, latching overvoltage/undervoltage supervisor IC designed for simultaneous monitoring of two independent power rails. It features ±1.5% threshold accuracy, 44μA quiescent current, open-drain UV/OV outputs, and a programmable reset timeout via external capacitor on the TMR pin. It is used in desktop/notebook computers and network servers to ensure reliable power-up sequencing and fault detection.
For engineers reviewing the LTC2913IDD-1#TRPBF datasheet, LTC2913IDD-1#TRPBF pinout, LTC2913IDD-1#TRPBF application, or LTC2913IDD-1#TRPBF equivalent, key selection considerations include its latching OV output (LTC2913-1 variant), guaranteed operation down to VCC = 1V, adjustable UV/OV trip points via resistor dividers, glitch-immune comparator architecture, and compatibility with 3mm × 3mm DFN packaging for space-constrained embedded systems.
Technical Context
The LTC2913IDD-1#TRPBF implements two independent voltage monitor channels - each with VHn (undervoltage sense) and VLn (overvoltage sense) inputs - sharing common open-drain UV and OV outputs. Its internal shunt regulator enables direct operation from supplies up to 6V or regulated operation above 6V with external current limiting.
It uses low-pass filtered comparators to reject transients without hysteresis-induced threshold error, and integrates an adjustable timeout timer (tUOTO = 6–14ms with 1nF) that holds UV/OV asserted after fault clearance. The LATCH pin (Pin 8) enables OV latching behavior unique to the -1 variant, distinguishing it functionally from the -2 version.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.3V to 6V supply input; operates as shunt regulator above 6V with external series resistor |
| Threshold Accuracy | ±1.5% over full temperature range (–40°C to 85°C), enabling precise 5V/3.3V rail monitoring |
| Quiescent Current | 44μA typical at 2.3V–6V, supporting micropower system-level supervision |
| UV/OV Timeout | Adjustable 6–14ms (typ. 8.5ms with 1nF), ensuring minimum reset pulse width for stable power recovery |
| Input Glitch Rejection | Integrated low-pass filtering prevents false triggering from sub-μs transients on VHn/VLn pins |
| Output Type | Open-drain UV and OV outputs with weak internal pull-up to VCC and strong pull-down to GND |
| Operating Temp | –40°C to +85°C (Industrial grade), validated for server and computing environments |
Pinout & Package
Package: 10-lead (3mm × 3mm) plastic DFN with exposed pad (Pin 11, optional GND connection).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VH1 (Pin 1) | Channel 1 Undervoltage Sense Input | Triggers UV when voltage falls below 0.5V threshold; tied to high-side divider tap for positive rail monitoring |
| VL1 (Pin 2) | Channel 1 Overvoltage Sense Input | Triggers OV when voltage rises above 0.5V threshold; tied to low-side divider tap |
| VH2 (Pin 3) | Channel 2 Undervoltage Sense Input | Independent second UV channel; supports dual-rail monitoring (e.g., 5V and 3.3V) |
| VL2 (Pin 4) | Channel 2 Overvoltage Sense Input | Independent second OV channel; enables concurrent UV/OV detection on separate supplies |
| GND (Pin 5) | Ground Reference | Primary return path for all internal circuitry and external timing capacitor |
| OV (Pin 6) | Overvoltage Output | Open-drain active-low output; latched low on fault (LTC2913-1); requires external pull-up for logic-high state |
| UV (Pin 7) | Undervoltage Output | Open-drain active-low output; held low for timeout period after all VH inputs recover |
| LATCH (Pin 8) | OV Latch Clear/Bypass Control | Pull low to latch OV; pull high to clear latch and enable timeout-based OV behavior like UV |
| TMR (Pin 9) | Reset Timeout Timer Input | Connect external capacitor (≥10pF) to GND to set delay; tie to VCC to bypass timeout |
| VCC (Pin 10) | Supply Voltage Input | Power input with internal 6.6V shunt regulator; bypass with ≥0.1μF capacitor to GND |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent UV/OV monitoring | Simultaneous supervision of two power rails (e.g., core and I/O voltages) using four dedicated sense inputs |
| Latching OV output (-1 variant) | OV remains asserted until manually cleared via LATCH pin, preventing premature recovery during intermittent faults |
| Guaranteed operation at VCC ≥ 1V | Enables early fault detection during power-up/down sequences before full regulation is achieved |
| Adjustable reset timeout | Programmable 6–14ms delay ensures sufficient hold time for downstream logic to stabilize post-fault |
| Glitch-immune comparator design | Eliminates need for external RC filtering while maintaining ±1.5% threshold accuracy across temperature |
Applications
| Desktop Computer Power Sequencing | Notebook System Voltage Monitoring |
|---|---|
|
Use Scenario: Monitoring 12V main input and 5V/3.3V secondary rails during cold boot and thermal throttling events. IC Role / Device Role / Timing Role: LTC2913IDD-1#TRPBF acts as primary supervisor, asserting UV/OV to hold processor reset until all rails stabilize within ±10% tolerance. Use Value: Prevents CPU lockup by enforcing minimum 200ms reset pulse (via 22nF TMR cap) after brownout recovery. |
Use Scenario: Detecting undervoltage on battery-backed 3.3V real-time clock supply and overvoltage on USB 5V input. IC Role / Device Role / Timing Role: LTC2913IDD-1#TRPBF provides independent fault signaling via open-drain UV/OV outputs wired-OR'd to system management controller. Use Value: Enables graceful shutdown via latched OV signal when USB hot-plug exceeds 5.5V, avoiding data corruption. |
| Network Server Core/I/O Rail Supervision | Industrial Embedded Controller Power Integrity |
|
Use Scenario: Validating 1.8V FPGA core and 12V fan supply in 1U rack-mounted servers operating at –40°C to +85°C. IC Role / Device Role / Timing Role: LTC2913IDD-1#TRPBF serves as dual-rail watchdog, leveraging ±1.5% threshold accuracy to meet IPC-9592 reliability requirements. Use Value: Reduces BOM count by replacing two discrete supervisors; DFN package saves 40% board area vs. MSOP alternative. |
Use Scenario: Ensuring clean power delivery to ARM Cortex-M7 MCU and isolated CAN transceiver in factory automation PLC. IC Role / Device Role / Timing Role: LTC2913IDD-1#TRPBF monitors 24V field bus input and 3.3V logic rail, with LATCH pin tied to microcontroller GPIO for remote fault clearing. Use Value: Guarantees 44μA quiescent current supports >10-year battery backup life in always-on monitoring mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual UV/OV monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2913CMS-1#TRPBF | Same electrical specs and pinout, but in 10-lead MSOP package (4.9mm × 3mm vs. DFN's 3mm × 3mm) | Preferred where hand-soldering or thermal relief via exposed pad is not required | Select when PCB layout prioritizes ease of rework over footprint density |
| LTC2904CMS8#TRPBF | Non-latching dual supervisor; 8-lead SOT-23; ±0.75% threshold accuracy; no TMR timeout adjustment | Suitable for cost-sensitive designs where fixed 240ms reset timeout suffices | Choose only if latching OV and programmable timeout are unnecessary |
Compared with LTC2913CMS-1#TRPBF, the LTC2913IDD-1#TRPBF offers identical functionality in a smaller, thermally enhanced DFN package with optional exposed-pad grounding. Against LTC2904CMS8#TRPBF, it provides critical latching OV behavior, wider VCC range (1V min), and field-adjustable timeout-making it superior for mission-critical server and industrial applications requiring deterministic fault response.
Availability
LTC2913IDD-1#TRPBF is available at Aetrix Electronics and suitable for desktop computers, network servers, and industrial embedded controllers requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for LTC2913IDD-1#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its precision analog and power management product lines with full datasheet, simulation model, and application support.
The LTC2913 family was designed specifically for high-reliability multi-rail voltage supervision in computing and communications infrastructure, emphasizing micropower operation, latch control, and robust transient immunity.
FAQ
What is the function of the LATCH pin on the LTC2913IDD-1#TRPBF?
The LATCH pin (Pin 8) controls the overvoltage output behavior of the LTC2913IDD-1#TRPBF. When pulled low, it causes the OV output to latch low upon detection of any overvoltage condition; pulling the pin high clears the latch and restores timeout-based OV assertion like the UV output. This functionality is exclusive to the -1 variant and is not present in the -2 version.
Can the LTC2913IDD-1#TRPBF monitor negative voltages?
No, the LTC2913IDD-1#TRPBF is designed exclusively for positive voltage monitoring. Its VHn and VLn inputs operate with reference to GND and require input voltages between –0.3V and 7.5V. For negative rail supervision, Analog Devices recommends the LTC2909 or LTC2914, which support dedicated negative input configurations.
What is the minimum capacitor value required on the TMR pin of the LTC2913IDD-1#TRPBF?
The LTC2913IDD-1#TRPBF requires a minimum 10pF capacitor between the TMR pin (Pin 9) and GND to establish a valid timeout period. Using less than 10pF may result in unstable or undefined timing behavior. A 1nF capacitor yields a typical timeout of 8.5ms, scalable linearly per the formula CTMR = tUOTO × 115 × 10⁻⁹ F/s.
Does the LTC2913IDD-1#TRPBF require external pull-up resistors on UV and OV outputs?
The LTC2913IDD-1#TRPBF includes weak internal pull-ups to VCC on both UV and OV outputs, eliminating the need for external pull-ups in most cases. However, an external pull-up ≤100kΩ is recommended on OV when operation below VCC = 1.5V is required, as internal pull-up strength diminishes at ultra-low supply voltages.
How does the LTC2913IDD-1#TRPBF handle power-up sequencing when VCC rises from 0V?
As VCC rises above 1V, the LTC2913IDD-1#TRPBF asserts UV low and pulls OV weakly high. Once VCC exceeds 2.1V (UVLO threshold), the VHn/VLn comparators become active. An internal timer starts after all inputs stabilize, and UV releases after the programmed TMR timeout-ensuring controlled release of system reset only after stable power conditions are confirmed.
LTC2913IDD-1#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LTC2913IDD-1#TRPBF FAQ
1.How can I place an order for LTC2913IDD-1#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2913IDD-1#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2913IDD-1#TRPBF reliable?
The price and inventory of LTC2913IDD-1#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2913IDD-1#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2913IDD-1#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2913IDD-1#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2913IDD-1#TRPBF?
LTC2913IDD-1#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2913IDD-1#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2913IDD-1#TRPBF?
For technical support, including LTC2913IDD-1#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2913IDD-1#TRPBF requirements.
6.How does Aetrix verify that LTC2913IDD-1#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2913IDD-1#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2913IDD-1#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2913IDD-1#TRPBF?
All LTC2913IDD-1#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2913IDD-1#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2913IDD-1#TRPBF part is unused and in its original packaging.
Return procedure for LTC2913IDD-1#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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