Analog Devices Inc. LTC2913IMS-2#PBF
- Part No.:
- LTC2913IMS-2#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
LTC2913IMS-2#PBF.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2913IMS-2#PBF from Analog Devices (formerly Linear Technology) is a dual-input, dual-threshold voltage monitor IC designed for simultaneous undervoltage (UV) and overvoltage (OV) supervision of two independent power rails. It features adjustable UV/OV trip points with ±1.5% threshold accuracy, 44 μA quiescent current, open-drain UV/OV outputs, and a dedicated DIS pin to disable both outputs. It is used in desktop/notebook computers and network servers for core/I/O supply monitoring.
For engineers reviewing the LTC2913IMS-2#PBF datasheet, LTC2913IMS-2#PBF pinout, LTC2913IMS-2#PBF application, or LTC2913IMS-2#PBF equivalent, key selection considerations include its dual-rail UV/OV detection capability, guaranteed operation down to VCC = 1 V, adjustable reset timeout via external capacitor, glitch-immune comparator architecture, and MSOP-10 package compatibility with space-constrained embedded power management systems.
Technical Context
The LTC2913IMS-2#PBF implements two independent high-side (VH1/VH2) and low-side (VL1/VL2) input pairs, each configured to detect UV (VH < 0.5 V) and OV (VL > 0.5 V) conditions relative to a common 500 mV internal reference. Its internal shunt regulator enables operation up to 6 V directly or higher voltages with external current limiting.
Unlike the LTC2913-1 variant, the -2 version replaces the LATCH pin with DIS (Pin 8), enabling full output disable functionality: when DIS is pulled high, both UV and OV outputs are forced weakly high except during VCC undervoltage lockout (UVLO). The TMR pin supports externally programmable timeout (6–14 ms typical with 1 nF), and all inputs feature ±15 nA leakage and integrated glitch filtering.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2.3 V to 6 V (direct supply); >6 V requires series resistor due to internal 6.6 V shunt regulator |
| Threshold Accuracy | ±1.5% over –40°C to 85°C - ensures precise trip points for 5 V/3.3 V rail monitoring within tight tolerance bands |
| Quiescent Current | 44 μA typical - enables micropower system-level supervision without impacting standby budget |
| UV/OV Delay | 50–500 μs - provides noise immunity while maintaining fast fault response for critical supplies |
| Reset Timeout | 6–14 ms (with 1 nF on TMR) - guarantees minimum reset pulse width for processor/system stabilization |
| Output Type | Open-drain UV and OV - supports wired-OR configurations and flexible pull-up voltage selection |
| UVLO Threshold | 2.0 V ±0.1 V - asserts UV during brownout before internal circuitry becomes unreliable |
Pinout & Package
Package: 10-Lead MSOP (3mm × 3mm), RoHS-compliant, exposed pad optional (not electrically connected).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VH1 (Pin 1) | Undervoltage Sense Input 1 | Detects UV on Rail 1 when voltage falls below 0.5 V; tie to VCC if unused |
| VL1 (Pin 2) | Overvoltage Sense Input 1 | Detects OV on Rail 1 when voltage exceeds 0.5 V; tie to GND if unused |
| VH2 (Pin 3) | Undervoltage Sense Input 2 | Detects UV on Rail 2 when voltage falls below 0.5 V; tie to VCC if unused |
| VL2 (Pin 4) | Overvoltage Sense Input 2 | Detects OV on Rail 2 when voltage exceeds 0.5 V; tie to GND if unused |
| GND (Pin 5) | Ground Reference | Analog and digital ground return; must be low-impedance connection |
| OV (Pin 6) | Open-Drain Overvoltage Output | Asserts low during OV fault; weak internal pull-up to VCC; disabled when DIS = high |
| UV (Pin 7) | Open-Drain Undervoltage Output | Asserts low during UV fault or VCC UVLO; weak internal pull-up to VCC; disabled when DIS = high |
| DIS (Pin 8) | Output Disable Control | Pull high to force UV/OV high (except during UVLO); internal 2 μA pull-down allows open-circuit default |
| TMR (Pin 9) | Reset Timeout Timing | Connect external capacitor (≥10 pF) to GND to set delay; tie to VCC to bypass |
| VCC (Pin 10) | Supply Input / Shunt Regulator | Operates as direct supply ≤6 V or shunt-regulated input >6 V; bypass with ≥0.1 μF capacitor |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent UV/OV monitoring | Simultaneously supervises two power rails using four sense inputs (VH1/VL1 + VH2/VL2), eliminating need for two discrete monitors |
| Adjustable trip thresholds | Fixed 0.5 V internal reference enables precise UV/OV setting via external resistor dividers (e.g., 4.5 V UV / 5.5 V OV on 5 V rail) |
| Glitch-immune comparator design | Integrated low-pass filtering prevents false triggering from transient noise without adding hysteresis-induced threshold error |
| Programmable reset timeout | External capacitor on TMR pin sets delay (e.g., 22 nF → ~200 ms), ensuring stable reset assertion after fault clearance |
| Full output disable capability | DIS pin disables both UV and OV outputs independently of input faults - essential for controlled power sequencing and test modes |
Applications
| Desktop Computer Power Management | Notebook System Voltage Supervision |
|---|---|
Use Scenario: Monitoring 12 V main input and 5 V/3.3 V secondary rails during cold start, hot-plug, and thermal throttling events. IC Role / Device Role / Timing Role: Dual-rail supervisor providing coordinated UV/OV fault signaling to southbridge or EC controller with programmable reset hold time. Use Value: Prevents boot failure by holding reset until all rails stabilize post-power-on; DIS pin enables graceful shutdown sequencing under firmware control. | Use Scenario: Real-time supervision of battery-charged 5 V DC-DC output and CPU core voltage (e.g., 1.8 V) during dynamic load transitions. IC Role / Device Role / Timing Role: Low-quiescent-current voltage monitor detecting brownout and overvoltage excursions on dual critical rails with glitch rejection. Use Value: Extends battery runtime via 44 μA ICC; ±1.5% threshold accuracy avoids false resets during nominal voltage ripple (±3%). |
| Network Server Core/I/O Supply Monitoring | Industrial Embedded Controller Power Integrity |
Use Scenario: Continuous monitoring of redundant 3.3 V I/O bus and 1.2 V FPGA core supply in 1U rack-mounted servers. IC Role / Device Role / Timing Role: Fault-detection interface between power delivery network and BMC, asserting open-drain UV/OV signals compatible with standard logic levels. Use Value: Open-drain outputs support wired-OR fault bus; guaranteed operation down to VCC = 1 V ensures supervision remains active during deep brownout. | Use Scenario: Supervising isolated 24 V field bus input and regulated 5 V microcontroller supply in PLC backplane modules. IC Role / Device Role / Timing Role: Dual-threshold monitor interfacing with opto-isolated reset chain and watchdog timer, with DIS pin enabling firmware-initiated reset suppression. Use Value: DIS functionality allows safe firmware updates without unintended resets; MSOP-10 footprint fits constrained PCB layouts in DIN-rail mounted enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-rail voltage monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2904CMS8-3.3#PBF | Fixed 3.3 V UV threshold; no OV detection; 8-lead SOT-23 package; no DIS pin | Single-rail only; lacks dual OV/UV capability and output disable | Select only if monitoring one rail with fixed 3.3 V UV threshold and board space is extremely limited |
| LTC2907IMS8-3.3#PBF | Fixed 3.3 V UV threshold + adjustable OV; 8-lead MSOP; no DIS pin; includes reset timer | Single-rail UV/OV monitoring; no second rail support; no output disable | Choose when needing adjustable OV on a single rail with built-in timer, but dual-rail supervision is not required |
Compared with LTC2904CMS8-3.3#PBF and LTC2907IMS8-3.3#PBF, the LTC2913IMS-2#PBF uniquely delivers true dual-rail UV+OV supervision in one device, plus hardware-controlled output disable - making it the only option among the three that supports coordinated fault signaling across two independent power domains without external logic.
Availability
LTC2913IMS-2#PBF is available at Aetrix Electronics and suitable for desktop computers, network servers, and industrial embedded controllers requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for LTC2913IMS-2#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC2913IMS-2#PBF belongs to Linear's precision voltage supervisor product line, engineered specifically for reliable, low-power, multi-rail power integrity monitoring in computing and communications infrastructure where accuracy, noise immunity, and compact packaging are critical.
FAQ
What is the function of the DIS pin on the LTC2913IMS-2#PBF?
The DIS (Disable) pin on the LTC2913IMS-2#PBF is a dedicated control input that, when pulled high, forces both UV and OV outputs into a weakly pulled-high state-effectively disabling fault signaling regardless of input conditions. This behavior is unique to the -2 variant and differs from the -1 version's LATCH pin. During VCC undervoltage lockout (UVLO), UV still asserts low even with DIS high. The internal 2 μA pull-down ensures safe default operation when DIS is left unconnected. This feature enables firmware-controlled reset suppression in the LTC2913IMS-2#PBF.
Can the LTC2913IMS-2#PBF monitor negative voltages?
No, the LTC2913IMS-2#PBF is designed exclusively for positive voltage monitoring. Its VH and VL inputs operate with respect to GND and require input voltages between –0.3 V and 7.5 V; negative rail supervision is not supported. For negative voltage monitoring, Analog Devices offers the LTC2909 or LTC2914, which include dedicated negative-input channels. The LTC2913IMS-2#PBF's architecture assumes all monitored rails are referenced to the same GND and remain above 0 V, as confirmed by absolute maximum ratings and input threshold specifications.
What is the minimum VCC voltage required for valid UV/OV output assertion in the LTC2913IMS-2#PBF?
The LTC2913IMS-2#PBF guarantees valid UV and OV output assertion down to VCC = 1 V, as specified in the Electrical Characteristics table under "VCCR(MIN) Minimum VCC Output Valid". Below this voltage, output behavior is undefined. At VCC = 1 V, the UV output can sink 100 μA while maintaining VOL ≤ 0.15 V, and the internal comparators remain functional. This ultra-low operating voltage enables supervision during deep brownout conditions where other supervisors may fail, a key reliability feature of the LTC2913IMS-2#PBF.
How does the TMR pin affect reset timing in the LTC2913IMS-2#PBF?
The TMR pin on the LTC2913IMS-2#PBF sets the reset timeout period (tUOTO) via an external capacitor to GND. With CTMR = 1 nF, tUOTO is 6–14 ms (typical 8.5 ms); scaling follows CTMR = tUOTO × 115 nF/s. Tying TMR to VCC bypasses the timer, causing UV/OV to deassert immediately after fault clearance. The pin requires ≥10 pF load or VCC connection to avoid undefined behavior. This programmability allows the LTC2913IMS-2#PBF to meet diverse system stabilization requirements-from fast microcontroller resets to extended FPGA configuration windows.
Is the LTC2913IMS-2#PBF pin-compatible with other LTC2913 variants?
No, the LTC2913IMS-2#PBF is not pin-compatible with the LTC2913-1 family (e.g., LTC2913IMS-1#PBF). Pin 8 is DIS in the -2 version but LATCH in the -1 version; these pins serve fundamentally different functions and cannot be interchanged without PCB redesign. Both share identical pinouts for VH1, VL1, VH2, VL2, GND, OV, UV, TMR, and VCC-but the functional mismatch at Pin 8 means direct substitution will cause incorrect system behavior. Always verify variant suffix (-1 vs -2) and consult the specific package drawing for the LTC2913IMS-2#PBF before layout or replacement.
LTC2913IMS-2#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
LTC2913IMS-2#PBF FAQ
1.How can I place an order for LTC2913IMS-2#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2913IMS-2#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2913IMS-2#PBF reliable?
The price and inventory of LTC2913IMS-2#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2913IMS-2#PBF is usually 5 days.
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Once your LTC2913IMS-2#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2913IMS-2#PBF?
For technical support, including LTC2913IMS-2#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2913IMS-2#PBF requirements.
6.How does Aetrix verify that LTC2913IMS-2#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2913IMS-2#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2913IMS-2#PBF meets industry standards.
7.What is the process for return or replacement of LTC2913IMS-2#PBF?
All LTC2913IMS-2#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2913IMS-2#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2913IMS-2#PBF part is unused and in its original packaging.
Return procedure for LTC2913IMS-2#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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