Analog Devices Inc. LTC2919CDDB-2.5#TRPBF
- Part No.:
- LTC2919CDDB-2.5#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC2919CDDB-2.5#TRPBF.pdf
- Description:
- IC SUPERVISOR 3 CHANNEL 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2919CDDB-2.5#TRPBF from Analog Devices is a precision triple-input voltage supervisor IC for system power monitoring, featuring two adjustable 0.5V-threshold inputs (±1.5% accuracy over 0°C to 70°C), a fixed 2.5V VCC UVLO monitor, open-drain RST/OUT1/OUT2 outputs, and pin-selectable polarity for positive/negative supply UV/OV detection. It is used in desktop computers and network servers for reliable power-on reset and brownout protection.
For engineers reviewing the LTC2919CDDB-2.5#TRPBF datasheet, LTC2919CDDB-2.5#TRPBF pinout, LTC2919CDDB-2.5#TRPBF application, or LTC2919CDDB-2.5#TRPBF equivalent, key selection factors include its 50µA quiescent current, 200ms internal reset timeout, buffered 1V reference for negative rail offset, glitch-filtered comparator propagation delay, and DFN-10 (3mm × 2mm) package with exposed thermal pad.
Technical Context
The LTC2919CDDB-2.5#TRPBF integrates three independent monitoring channels: two adjustable inputs (ADJ1/ADJ2) with nominal 0.5V thresholds and ±1.5% accuracy across temperature, plus a dedicated VCC UVLO threshold of 2.175V (–10% of 2.5V). Its three-state SEL pin configures input polarity without external components, enabling simultaneous UV/OV detection on mixed-sign rails.
Reset behavior is governed by a configurable timeout: internal 200ms timer (TMR = GND), external capacitor (9ms/nF), or disabled (TMR = VCC). All outputs (RST, OUT1, OUT2) are open-drain, guaranteed low down to VCC = 0.5V, and support pull-up voltages exceeding VCC. The buffered 1V REF output sources/sinks ±1mA and drives ≤1000pF loads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC UVLO Threshold | 2.175V (–10% of 2.5V supply); enables accurate third-supply monitoring without external resistors |
| ADJ Input Threshold | 495–505mV (±1.5% over 0°C to 70°C); supports precise UV/OV trip points for custom rails |
| Quiescent Current | 50µA typical at 2.5V; enables micropower operation in battery-backed or always-on systems |
| Reset Timeout Options | Internal 200ms (TMR = GND), external capacitor (9ms/nF), or disabled (TMR = VCC); eliminates need for external timing components |
| REF Output Voltage | 0.990–1.010V (±1% over temp); provides stable offset for negative-voltage monitoring circuits |
| Output Drive Capability | Guaranteed VOL ≤0.15V at ISINK = 2.5mA and VCC = 3V; ensures robust logic-low assertion under load |
| Operating Temperature | 0°C to 70°C (C-grade); qualified for commercial computing and industrial control environments |
Pinout & Package
Package: 10-lead (3mm × 2mm) plastic DFN with exposed thermal pad (Pin 11), RoHS-compliant, lead-free finish. Thermal resistance θJA = 76°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SEL (Pin 1) | Three-state polarity select | Configures ADJ1/ADJ2 as (+)UV/(–)OV, (+)UV/(–)OV + (–)UV/(+)OV, or (–)UV/(+)OV via VCC/GND/open connection |
| VCC (Pin 2) | Power supply input | Operates directly up to 6V; includes 6.5V shunt regulator for >6V supplies; also serves as 2.5V UVLO monitor input |
| OUT1 (Pin 3) | Open-drain status output | Asserts low when ADJ1 is invalid (UV/OV per SEL setting); requires external pull-up; supports voltage translation |
| OUT2 (Pin 4) | Open-drain status output | Asserts low when ADJ2 is invalid; independent of OUT1; enables dual-rail fault isolation |
| RST (Pin 5) | Open-drain reset output | Asserts low if any monitored input fails or VCC drops below UVLO; held low for timeout after recovery |
| GND (Pin 6) | Device ground reference | Primary return path; exposed pad (Pin 11) may be tied to GND for improved thermal performance |
| REF (Pin 7) | Buffered 1V reference output | Stable offset source for negative-rail monitoring; ±1mA drive capability; no bypass capacitor required |
| TMR (Pin 8) | Reset timeout control | Selects internal 200ms timer (GND), external capacitor timing (CTMR), or comparator mode (VCC) |
| ADJ2 (Pin 9) | Adjustable voltage input 2 | 0.5V threshold comparator input; polarity set by SEL; tie to GND if unused (SEL = GND or open) |
| ADJ1 (Pin 10) | Adjustable voltage input 1 | 0.5V threshold comparator input; polarity set by SEL; tie to REF if unused (SEL = VCC or open) |
Key Features
| Feature | Design Value |
|---|---|
| Polarity-selectable dual adjustable inputs | Single SEL pin configures ADJ1/ADJ2 for positive/negative UV or OV detection without external switches or logic |
| Triple independent monitoring channels | Simultaneous supervision of two user-defined rails (via ADJ1/ADJ2) and fixed 2.5V VCC supply (UVLO) in one compact IC |
| Glitch-immune comparator architecture | Propagation delay filtering and programmable reset timeout prevent false triggering from transient noise or load spikes |
| Low-voltage output guarantee | RST/OUT1/OUT2 remain actively pulled low down to VCC = 0.5V, ensuring deterministic reset during brownout |
| Space-optimized DFN packaging | 3mm × 2mm footprint with thermal pad reduces PCB area vs. MSOP; supports high-density server and computing designs |
Applications
| Desktop Computer Power Sequencing | Network Server Core Voltage Monitoring |
|---|---|
|
Use Scenario: Monitoring 1.2V CPU core and 3.3V I/O rails during cold boot and dynamic load transients. IC Role / Device Role / Timing Role: LTC2919CDDB-2.5#TRPBF acts as primary power-on reset generator and brownout detector, asserting RST until both ADJ inputs stabilize above threshold and VCC remains valid for 200ms. Use Value: Prevents processor lockup by ensuring clean power sequencing; ±1.5% threshold accuracy avoids nuisance resets within 10% supply tolerance bands. |
Use Scenario: Supervising redundant 12V and –48V telecom supplies in blade server backplanes. IC Role / Device Role / Timing Role: LTC2919CDDB-2.5#TRPBF monitors positive 12V (ADJ1) and negative –48V (ADJ2) using REF-based offset, with SEL = GND to configure both inputs for negative polarity UV detection. Use Value: Enables single-chip dual-polarity monitoring; buffered 1V REF eliminates need for external op-amps in negative rail sensing. |
| Automotive Infotainment System Reset | Industrial PLC Power Integrity Check |
|
Use Scenario: Validating 5V microcontroller supply and 3.3V CAN transceiver rail in AEC-Q100-compliant infotainment head units. IC Role / Device Role / Timing Role: LTC2919CDDB-2.5#TRPBF uses VCC UVLO (2.5V) for main 5V rail monitoring and ADJ1/ADJ2 for secondary rails, with TMR = GND for fixed 200ms reset hold time. Use Value: Meets automotive startup timing requirements; 50µA quiescent current minimizes battery drain during sleep mode. |
Use Scenario: Detecting undervoltage on isolated 24V DC fieldbus and 5V logic supplies in programmable logic controllers. IC Role / Device Role / Timing Role: LTC2919CDDB-2.5#TRPBF supervises both rails via resistor dividers on ADJ1/ADJ2, with OUT1/OUT2 providing independent fault flags and RST coordinating system-wide reset. Use Value: Reduces BOM count by replacing two discrete supervisors; open-drain outputs interface directly with 24V-tolerant PLC input modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6316H_25D2+T | Fixed 2.5V UVLO only; no adjustable inputs or polarity selection; 140ms reset timeout | Supports single-rail monitoring only; lacks dual-adjustable capability and negative rail support | Select when only basic 2.5V supply monitoring is required and board space allows larger SOT-23-5 package |
| TPS3808G33DBVR | Single 3.3V UVLO; no ADJ inputs; 200ms timeout; higher 12µA quiescent current | Designed for single-supply systems; no REF output or polarity configuration | Choose for cost-sensitive 3.3V-only applications where dual-rail or negative-voltage monitoring is unnecessary |
Compared with MAX6316H_25D2+T and TPS3808G33DBVR, the LTC2919CDDB-2.5#TRPBF delivers triple-channel supervision, pin-selectable polarity, and a buffered reference-enabling compact, flexible power monitoring for multi-rail systems where alternatives require multiple ICs or external components.
Availability
LTC2919CDDB-2.5#TRPBF is available at Aetrix Electronics and suitable for desktop computers, network servers, and industrial PLCs requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant alternatives for automotive-adjacent designs.
Supply support for LTC2919CDDB-2.5#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and industrial markets.
The LTC2919 product line delivers highly accurate, low-power voltage supervisors with configurable inputs and integrated timing-designed specifically for reliable power sequencing and fault detection in computing, networking, and automotive electronics.
FAQ
What is the operating temperature range for the LTC2919CDDB-2.5#TRPBF?
The LTC2919CDDB-2.5#TRPBF is rated for 0°C to 70°C (Commercial grade). This range is explicitly defined in the ordering information table for the "CDDB" suffix and confirmed in the Absolute Maximum Ratings section. It is distinct from the I-grade (–40°C to 85°C) and H-grade (–40°C to 125°C) variants.
How does the SEL pin configure input polarity on the LTC2919CDDB-2.5#TRPBF?
The SEL pin on the LTC2919CDDB-2.5#TRPBF selects polarity via three states: tied to VCC sets both ADJ1 and ADJ2 to positive polarity (UV/OV detection on positive rails); left open sets ADJ1 positive and ADJ2 negative; tied to GND sets both to negative polarity. This is documented in Table 1 of the datasheet and enables detection of –UV or +OV conditions without external circuitry.
Can the LTC2919CDDB-2.5#TRPBF monitor negative voltages?
Yes, the LTC2919CDDB-2.5#TRPBF can monitor negative voltages using its buffered 1V REF output as an offset reference. When SEL is configured for negative polarity, ADJ1 or ADJ2 detects when a negative supply's magnitude falls below the threshold (e.g., –4.3V for a –5V rail), interpreted as undervoltage. This is explicitly supported in the Applications Information section and Figure 2b.
What reset timeout options does the LTC2919CDDB-2.5#TRPBF support?
The LTC2919CDDB-2.5#TRPBF supports three reset timeout modes: internal 200ms timer (TMR = GND), external capacitor timing (9ms/nF, e.g., 20ms with 2.2nF), or disabled comparator mode (TMR = VCC). These options are specified in the Electrical Characteristics table (tRST(INT) and tRST(EXT)) and enable flexible reset timing without additional components.
Is the REF pin on the LTC2919CDDB-2.5#TRPBF required to be bypassed?
No, the REF pin on the LTC2919CDDB-2.5#TRPBF does not require a bypass capacitor and none is recommended. The datasheet explicitly states "This pin does not require a bypass capacitor, nor is one recommended. Leave open if unused." Its buffered 1V output is designed for direct connection to resistor dividers in negative-rail monitoring circuits.
LTC2919CDDB-2.5#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 3
- Voltage - Threshold:
- 2.213V, Adj, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x2)
LTC2919CDDB-2.5#TRPBF FAQ
1.How can I place an order for LTC2919CDDB-2.5#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2919CDDB-2.5#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2919CDDB-2.5#TRPBF reliable?
The price and inventory of LTC2919CDDB-2.5#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2919CDDB-2.5#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2919CDDB-2.5#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2919CDDB-2.5#TRPBF transactions.
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Once your LTC2919CDDB-2.5#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2919CDDB-2.5#TRPBF?
For technical support, including LTC2919CDDB-2.5#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2919CDDB-2.5#TRPBF requirements.
6.How does Aetrix verify that LTC2919CDDB-2.5#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2919CDDB-2.5#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2919CDDB-2.5#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2919CDDB-2.5#TRPBF?
All LTC2919CDDB-2.5#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2919CDDB-2.5#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2919CDDB-2.5#TRPBF part is unused and in its original packaging.
Return procedure for LTC2919CDDB-2.5#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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