Analog Devices Inc. LTC2919IDDB-3.3#TRPBF
- Part No.:
- LTC2919IDDB-3.3#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC2919IDDB-3.3#TRPBF.pdf
- Description:
- IC SUPERVISOR 3 CHANNEL 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2919IDDB-3.3#TRPBF from Analog Devices is a precision triple-input voltage supervisor IC for system-level power monitoring, featuring two adjustable 0.5V-threshold inputs (±1.5% accuracy over –40°C to +85°C), a fixed 3.3V supply UVLO monitor, open-drain RST/OUT1/OUT2 outputs, and programmable 200ms internal reset timeout - deployed in desktop computers, network servers, and automotive core/I/O monitoring.
For engineers reviewing the LTC2919IDDB-3.3#TRPBF datasheet, LTC2919IDDB-3.3#TRPBF pinout, LTC2919IDDB-3.3#TRPBF application, or LTC2919IDDB-3.3#TRPBF equivalent, key selection criteria include guaranteed ±1.5% threshold accuracy across temperature, 50µA quiescent current, 3mm × 2mm DFN-10 package with exposed pad, and SEL-pin-configurable polarity for UV/OV detection on positive/negative rails.
Technical Context
The LTC2919IDDB-3.3#TRPBF implements dual comparator-based monitoring with independently configurable input polarity via three-state SEL pin (VCC/GND/open), enabling simultaneous UV and OV detection on mixed-polarity supplies. Its VCC UVLO is factory-trimmed to 2.871V (–10% of 3.3V) with ±0.049V hysteresis, supporting reliable brownout detection.
Reset assertion logic requires all monitored inputs (ADJ1, ADJ2, VCC) to remain valid for the full timeout period before releasing RST; glitch rejection is achieved through propagation delay filtering (50–800µs vs. overdrive) and optional external TMR capacitor timing (9ms/nF), while buffered 1.000V REF supports negative-rail offset referencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC UVLO Threshold | 2.871V (–10% of 3.3V nominal), ±0.049V hysteresis - enables precise 3.3V supply undervoltage lockout without external components |
| ADJ Input Threshold | 492.5mV to 507.5mV (±1.5% over –40°C to +85°C) - ensures stable trip point for externally resistor-divided rails |
| Quiescent Current | 50µA typical at VCC = 3.3V - supports always-on monitoring in low-power embedded systems |
| Reset Timeout | 200ms internal (TMR = GND), or 15–27ms with 2.2nF capacitor - provides configurable power-up stabilization delay |
| Output Type | Open-drain RST/OUT1/OUT2 - allows level-shifting, wired-OR logic, and pull-up to voltages > VCC (up to 7.5V) |
| Reference Output | 1.000V buffered REF (±10mV over temp, ±1mA drive) - supplies accurate offset for negative-voltage monitoring circuits |
| Operating Temp | –40°C to +85°C (I-grade) - qualified for industrial and automotive under-hood applications |
| Package | 10-lead 3mm × 2mm DFN with exposed thermal pad - enables compact PCB layout and enhanced thermal performance |
Pinout & Package
Package: 10-lead (3mm × 2mm) plastic DFN with exposed pad (Pin 11), RoHS-compliant, lead-free finish. Exposed pad may be left unconnected or tied to GND for improved thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SEL (Pin 1) | Three-state polarity select | Determines ADJ1/ADJ2 input polarity: VCC = both positive, GND = both negative, open = ADJ1 positive / ADJ2 negative |
| VCC (Pin 2) | Power supply input | Operates from 0.5V–6V; includes 6.5V shunt regulator for high-voltage operation with series resistor |
| OUT1 (Pin 3) | Adjustable input 1 status output | Open-drain; asserts low when ADJ1 violates configured UV/OV condition |
| OUT2 (Pin 4) | Adjustable input 2 status output | Open-drain; asserts low when ADJ2 violates configured UV/OV condition |
| RST (Pin 5) | Master reset output | Open-drain; asserts low if any monitored input fails or during timeout; guaranteed low down to VCC = 0.5V |
| GND (Pin 6) | Device ground reference | Common return path for all analog and digital circuitry; connects to exposed pad for thermal management |
| REF (Pin 7) | Buffered 1V reference output | Drives up to ±1mA; used as offset for negative-supply monitoring; no bypass capacitor required |
| TMR (Pin 8) | Reset timeout control | GND = 200ms internal timeout; open = ~400µs min; VCC = comparator mode (no timeout); capacitor = 9ms/nF |
| ADJ2 (Pin 9) | Adjustable input 2 | 0.5V threshold comparator input; polarity set by SEL; tie to GND if unused (with SEL = GND or open) |
| ADJ1 (Pin 10) | Adjustable input 1 | 0.5V threshold comparator input; polarity set by SEL; tie to REF if unused (with SEL = VCC or open) |
Key Features
| Feature | Design Value |
|---|---|
| Polarity-selectable dual inputs | SEL pin configures ADJ1/ADJ2 for independent UV/OV monitoring on positive, negative, or mixed-rail systems without external switches |
| Triple-monitor architecture | Combines two adjustable inputs + fixed 3.3V VCC UVLO - eliminates need for separate supervisors in multi-rail systems |
| Guaranteed low-voltage operation | RST/OUT1/OUT2 sink to ≤0.15V with VCC ≥ 0.5V - prevents floating states during brownout and power-up sequencing |
| Glitch-immune timing | Propagation delay filtering (50–800µs) + programmable timeout prevent false resets from load transients or noise spikes |
| Space-optimized packaging | 3mm × 2mm DFN-10 footprint with thermal pad - reduces board area vs. MSOP while maintaining thermal performance |
| AEC-Q100 qualified | I-grade (–40°C to +85°C) variant meets automotive reliability requirements for non-safety-critical ECU monitoring |
Applications
| Desktop & Notebook Power Sequencing | Network Server Core Voltage Monitoring |
|---|---|
Use Scenario: Monitoring 12V, 5V, and 3.3V rails during cold boot and thermal throttling events in x86-based platforms. IC Role / Device Role / Timing Role: LTC2919IDDB-3.3#TRPBF acts as primary supervisor, asserting RST until all rails stabilize within ±1.5% threshold tolerance and remain valid for 200ms. Use Value: Prevents CPU lockup by ensuring clean power-up sequence; eliminates need for discrete RC timers or secondary supervisors. |
Use Scenario: Detecting undervoltage on dual 1.8V FPGA I/O banks and 12V auxiliary supplies in 1U rack servers. IC Role / Device Role / Timing Role: LTC2919IDDB-3.3#TRPBF monitors one rail via ADJ1 (1.8V with resistor divider), second via ADJ2 (12V), and VCC (3.3V logic supply) - all with independent polarity control. Use Value: Enables single-chip detection of asymmetric faults (e.g., 1.8V UV + 12V OV) without redesigning feedback networks. |
| Automotive Infotainment Domain Controller | Industrial PLC I/O Module Supply Integrity |
Use Scenario: Validating –5V analog sensor bias and +3.3V MCU core supply in head-unit ECUs operating across –40°C to +85°C. IC Role / Device Role / Timing Role: LTC2919IDDB-3.3#TRPBF uses SEL = open to configure ADJ1 for positive UV (3.3V core) and ADJ2 for negative UV (–5V bias), referenced to REF. Use Value: Achieves AEC-Q100 compliance with single device; avoids thermal drift errors via ±1.5% threshold accuracy over full automotive temp range. |
Use Scenario: Ensuring stable 24V field bus and isolated 5V logic supply in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: LTC2919IDDB-3.3#TRPBF monitors 24V via ADJ1 (resistor-divided to 0.5V), 5V via ADJ2, and VCC (3.3V) - all with open-drain outputs compatible with 24V pull-ups. Use Value: Supports wide-input-level interfacing without level shifters; 50µA quiescent current minimizes standby power loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3808G33DBVR | Single 3.3V UVLO only; no adjustable inputs or polarity selection; 350ms fixed timeout; SOT-23-6 package | Supports basic 3.3V monitoring only - cannot replace dual-rail or negative-rail supervision capability of LTC2919IDDB-3.3#TRPBF | Select when only VCC monitoring is required and board space is constrained; not suitable for ADJ1/ADJ2 functionality |
| MAX6326LT33D3+T | 3.3V UVLO with manual reset and watchdog; no adjustable inputs; 1.6V to 5.5V supply range; 8-pin SOIC | Lacks dual adjustable inputs and polarity configuration - limited to single-supply monitoring with reset hold capability | Choose for cost-sensitive designs needing only 3.3V UVLO with pushbutton reset; incompatible with multi-rail fault detection |
Compared with TPS3808G33DBVR and MAX6326LT33D3+T, the LTC2919IDDB-3.3#TRPBF uniquely integrates dual configurable comparators, 3.3V UVLO, and polarity-selectable inputs in a 3mm × 2mm DFN - enabling compact, flexible supervision of complex multi-rail systems where discrete solutions would require ≥3 ICs.
Availability
LTC2919IDDB-3.3#TRPBF is available at Aetrix Electronics and suitable for desktop computing, network server, and automotive infotainment applications requiring stable component supply, AEC-Q100-compliant monitoring, and compact 3mm × 2mm DFN packaging.
Supply support for LTC2919IDDB-3.3#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.
The LTC2919 product line delivers precision, low-power, multi-rail voltage supervision ICs designed for mission-critical power integrity in computing, networking, and automotive electronics - emphasizing threshold accuracy, glitch immunity, and configurability.
FAQ
What is the guaranteed VCC UVLO threshold for LTC2919IDDB-3.3#TRPBF?
The LTC2919IDDB-3.3#TRPBF has a factory-trimmed VCC UVLO threshold of 2.871V (–10% of 3.3V nominal), with ±0.049V hysteresis over the full –40°C to +85°C operating range. This value is specified in the Electrical Characteristics table and applies directly to the LTC2919IDDB-3.3#TRPBF without external calibration.
Can LTC2919IDDB-3.3#TRPBF monitor negative voltages, and how is polarity selected?
Yes, LTC2919IDDB-3.3#TRPBF supports negative voltage monitoring via its ADJ1 and ADJ2 inputs using the three-state SEL pin. When SEL = GND, both inputs operate in negative polarity mode - detecting undervoltage when the absolute value of the negative rail falls below threshold (e.g., –4.3V for a –5V supply). The LTC2919IDDB-3.3#TRPBF datasheet defines this behavior explicitly in Table 1 and Applications Information.
What is the minimum VCC voltage required for LTC2919IDDB-3.3#TRPBF to assert a valid logic-low RST output?
The LTC2919IDDB-3.3#TRPBF guarantees RST output voltage ≤ 0.15V when sinking 2500µA at VCC ≥ 3V, and ≤ 0.30V at VCC = 3V per Electrical Characteristics. Critically, it maintains guaranteed low-state operation down to VCC = 0.5V (≤0.15V at 5µA), enabling robust reset assertion during deep brownout conditions - a defined specification for the LTC2919IDDB-3.3#TRPBF.
Does LTC2919IDDB-3.3#TRPBF require external components for basic 3.3V supply monitoring?
No - the LTC2919IDDB-3.3#TRPBF integrates a precision 3.3V VCC UVLO function that operates without external resistors or capacitors. Only a 0.1µF bypass capacitor on VCC is recommended. For dual-rail monitoring, external resistor dividers are needed on ADJ1/ADJ2, but the core 3.3V supervision in the LTC2919IDDB-3.3#TRPBF is fully self-contained.
How does the TMR pin affect reset timeout behavior in LTC2919IDDB-3.3#TRPBF?
The TMR pin configures reset timeout mode: tying TMR to GND selects the internal 200ms timer; leaving TMR open yields ~400µs minimum; connecting TMR to VCC disables timeout (comparator mode); adding a capacitor to GND sets timeout to 9ms/nF (e.g., 22nF → 200ms). These modes are electrically defined in the LTC2919IDDB-3.3#TRPBF datasheet Absolute Maximum Ratings and Electrical Characteristics tables.
LTC2919IDDB-3.3#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 3
- Voltage - Threshold:
- 2.921V, Adj, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x2)
LTC2919IDDB-3.3#TRPBF FAQ
1.How can I place an order for LTC2919IDDB-3.3#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2919IDDB-3.3#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2919IDDB-3.3#TRPBF reliable?
The price and inventory of LTC2919IDDB-3.3#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2919IDDB-3.3#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC2919IDDB-3.3#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2919IDDB-3.3#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
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LTC2919IDDB-3.3#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2919IDDB-3.3#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2919IDDB-3.3#TRPBF?
For technical support, including LTC2919IDDB-3.3#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2919IDDB-3.3#TRPBF requirements.
6.How does Aetrix verify that LTC2919IDDB-3.3#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC2919IDDB-3.3#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2919IDDB-3.3#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC2919IDDB-3.3#TRPBF?
All LTC2919IDDB-3.3#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2919IDDB-3.3#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2919IDDB-3.3#TRPBF part is unused and in its original packaging.
Return procedure for LTC2919IDDB-3.3#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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