Analog Devices Inc. LTC2925CGN#PBF

Overview

LTC2925CGN#PBF from Analog Devices (formerly Linear Technology) is a triple-output power supply tracking and sequencing controller with electronic circuit breaker, adjustable power good timeout, and remote sense compensation. It controls three slave supplies without series FETs, supports optional fourth-supply control via external N-channel FET, and operates from 2.9V to 5.5V supply. Used in FPGA, microprocessor, and DSP core/I/O rail coordination where VCORE–VI/O voltage tracking and ramp-rate matching are required.

For engineers reviewing the LTC2925CGN#PBF datasheet, LTC2925CGN#PBF pinout, LTC2925CGN#PBF application, or LTC2925CGN#PBF equivalent, key selection criteria include its 24-lead SSOP package, 0.8V TRACK reference, ±5% FB–TRACK current matching, 50mV short-circuit sense threshold, and 10µA GATE drive current for precise ramp control in multi-rail systems.

Technical Context

The LTC2925CGN#PBF implements a wide-range current-mirror-based tracking cell that forces each TRACKx pin to 0.8V and mirrors current into corresponding FBx pins to regulate slave supply outputs. Its internal 10µA charge-pump-driven GATE output enables logic-level N-channel FET control with 5V-over-VCC gate drive capability.

It integrates four independent timing functions: shutdown delay (SDTMR), short-circuit protection (SCTMR), power good timeout (PGTMR), and RAMP buffer control - all configured via external capacitors and referenced to 1.23V thresholds. The device maintains supply stability by avoiding series pass elements on three controlled rails and isolates feedback paths using RAMPBUF buffering.

Key Specifications

Pinout & Package

Package: 24-lead plastic SSOP (GN package), 0.635mm pitch, exposed pad not present. Pin count and mechanical footprint match JEDEC MO-153.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar power supply tracking controller applications.

Compared with LTC2923CGN#PBF, LTC2925CGN#PBF adds critical fourth-rail support, electronic circuit breaker, and remote sense - essential for high-reliability FPGA servers. Versus TPS652860RHAR, it offers flexible FB injection for heterogeneous DC/DC topologies but requires external regulators.

Availability

LTC2925CGN#PBF is available at Aetrix Electronics and suitable for FPGA power management, server rail sequencing, and telecom power shelf designs requiring stable component supply and long-term industrial availability.

Supply support for LTC2925CGN#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains full product support, datasheet archives, and application engineering for legacy Linear parts including the LTC2925 family.

The LTC2925CGN#PBF belongs to Linear's precision power management IC portfolio, designed specifically for high-accuracy analog-controlled power sequencing in compute and communications infrastructure.

FAQ

What is the function of the REMOTE pin on the LTC2925CGN#PBF?

The REMOTE pin on the LTC2925CGN#PBF is a 15Ω analog switch that connects to the RAMP pin when the GATE voltage exceeds RAMP + 4.9V. It compensates for voltage drop across the external sense resistor and N-channel FET by feeding back the true source voltage to the tracking loop. This ensures accurate tracking even with significant IR losses, and is disabled when the FET is off or partially enhanced.

Can the LTC2925CGN#PBF control four independent power supplies without external components?

No - the LTC2925CGN#PBF natively controls three supplies via FB1/FB2/FB3 current injection. A fourth supply requires an external N-channel FET driven by the GATE pin, with RAMP tied to the FET source. The device does not integrate power switches; all four rails rely on external DC/DC converters, and only the master rail needs the FET for direct control.

How is the power good timeout duration set for the LTC2925CGN#PBF?

The power good timeout duration for the LTC2925CGN#PBF is set by a capacitor (CPGTMR) connected between PGTMR pin and GND. The internal 10µA current source charges CPGTMR; timeout occurs when voltage reaches 1.23V. Duration tPGTMR = (1.23V × CPGTMR) / 10µA. For example, a 1µF capacitor yields ~123ms timeout.

Does the LTC2925CGN#PBF require external resistors on TRACK pins for basic tracking operation?

Yes - the LTC2925CGN#PBF requires external resistive dividers between RAMPBUF, each TRACKx pin, and GND to define tracking ratios. TRACKx is internally biased to 0.8V; the resistor network determines how RAMPBUF voltage maps to slave output voltage. No tracking occurs if TRACKx pins are left floating or shorted.

What happens to the SDx outputs during a short-circuit fault on the LTC2925CGN#PBF?

During a short-circuit fault, the LTC2925CGN#PBF pulls GATE low with 20mA and asserts FAULT low, but the SDx outputs remain latched in their last active state - they are not automatically toggled. SDx pins only transition when ON rises above 1.23V (startup) or falls below 1.23V while RAMP <100mV (shutdown). External logic may be needed to coordinate SDx with fault events.