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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Power Supply Controllers, Monitors

Analog Devices Inc. LTC2925IUF#PBF

Name: LTC2925IUF#PBF
Brand: Analog Devices Inc.
SKU: LTC2925IUF#PBF
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: LTC2925IUF#PBF

Manufacturer:: Analog Devices Inc.

Category:: Power Supply Controllers, Monitors

Package:: 24-WFQFN Exposed Pad

Datasheet:: LTC2925IUF#PBF.pdf

Description:: IC POWER SUPPLY CONTROLLER 24QFN

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Product details

Overview

LTC2925IUF#PBF from Analog Devices (formerly Linear Technology) is a precision multiple power supply tracking and sequencing controller for microprocessor, FPGA, and DSP core/I/O rail coordination. It supports up to three FET-less slave supplies plus one optional fourth supply controlled via external N-channel MOSFET, features adjustable power good timeout (via PGTMR capacitor), electronic circuit breaker with 50mV sense threshold, and operates from 2.9V to 5.5V VCC across –40°C to +85°C.

For engineers reviewing the LTC2925IUF#PBF datasheet, LTC2925IUF#PBF pinout, LTC2925IUF#PBF application, or LTC2925IUF#PBF equivalent, key selection criteria include its 24-pin QFN (4mm × 4mm) package, 0.8V internal TRACK reference, ±5% current mirror matching between TRACKx and FBx pins, remote sense switch (15Ω R_REMOTE), and ability to control supplies without series pass elements - critical for high-efficiency, low-dropout sequencing in server and telecom power systems.

Technical Context

The LTC2925IUF#PBF implements a wide-range current-mirror-based tracking architecture where each TRACKx pin (0.8V reference) sources current mirrored to its corresponding FBx output, enabling precise voltage-ratio, offset, or coincident ramping of slave DC/DC converters. Its internal 10µA charge-pump gate driver delivers ≥5V above VCC to fully enhance logic-level N-channel FETs used for master supply control.

It integrates three independent timing functions: shutdown delay (SDTMR), short-circuit protection (SCTMR, 50mV threshold, 2µA/50µA current sources), and power good timeout (PGTMR, 10µA pull-up). All timers use external capacitors referenced to GND and feature programmable thresholds (1.23V typical) with hysteresis, enabling deterministic sequencing windows and fault recovery behavior.

Key Specifications

Parameter	Value and Actual Design Meaning
VCC Range	2.9V to 5.5V - supports standard 3.3V and 5V system rails; undervoltage lockout at 2.5V prevents erratic operation during brownout.
Operating Temp	–40°C to +85°C - qualified for industrial and extended-temperature embedded systems including base station power management.
TRACKx Reference	0.8V ±20mV - stable internal reference enables accurate resistor-divider-based tracking profiles (coincident, offset, ratiometric).
Current Mirror Match	±5% over full temperature range - ensures slave supply output accuracy remains within specification even under thermal stress.
Sense Threshold	50mV (SENSEP–SENSEN) - sets overcurrent trip point for electronic circuit breaker; compatible with low-value sense resistors (e.g., 0.015Ω).
GATE Drive	+5V above VCC (min) - guarantees full enhancement of standard logic-level N-channel MOSFETs without external level-shifting.
R_REMOTE	15Ω typical - low-resistance remote sense switch compensates for FET and sense resistor IR drop during ramp-up/down.

Pinout & Package

Package: 24-lead (4mm × 4mm) plastic QFN with exposed pad (Pin 25), rated θ_JA = 37°C/W. Compatible with standard reflow profiles and PCB thermal vias for thermal management in high-density power modules.

Pin/Terminal	Circuit Role	Design Meaning
VCC (Pin 22)	Positive supply input	Power source for internal circuitry; requires 0.1µF bypass capacitor to GND; UVLO resets device below 2.5V.
SENSEP / SENSEN (Pins 23/24)	Circuit breaker sense inputs	Differential pair measuring voltage across external sense resistor; triggers fault if >50mV sustained beyond SCTMR timeout.
ON (Pin 1)	Enable/control input	1.23V threshold with 75mV hysteresis; controls ramp direction (up/down); <0.4V clears latched faults.
SD1/SD2/SD3 (Pins 3/4/5)	Slave shutdown outputs	Open-drain outputs sinking >1mA at 2.3V; hold RUN/SS pins low until ON active and SDTMR timeout completes.
TRACK1/2/3 (Pins 12/11/9)	Tracking control inputs	0.8V-referenced nodes sourcing mirrored current to FB1/FB2/FB3; define slave supply tracking profile via resistor dividers.
FB1/2/3 (Pins 8/10/13)	Feedback control outputs	Current-sink outputs mirroring TRACKx current; interface directly to DC/DC converter feedback nodes (0–1.6V compatible).
GATE (Pin 16)	External FET gate driver	10µA current source/sink with 20mA fast-pull-down on fault; internal charge pump ensures ≥5V gate overdrive above VCC.
RAMP (Pin 15)	Ramp buffer input	Connects to source of external FET or ties to GATE; defines master ramp waveform tracked by all slaves.
REMOTE (Pin 14)	Remote sense switch	15Ω switch connecting RAMP to REMOTE when GATE > RAMP + 4.9V; compensates for IR drop in series FET path.
FAULT (Pin 17)	Fault indicator output	Open-drain output pulled low on circuit breaker trip or power good timeout; reset by pulling ON <0.4V.
STATUS (Pin 18)	Power good status	Open-drain output pulled low until GATE fully charged; indicates all supplies have reached regulation.
PGI (Pin 19)	Power good input	Pulled up with 10µA; connects to RST pin of external supply monitor; low state longer than PGTMR timeout triggers FAULT.

Key Features

Feature	Design Value
Three-FET-less supply control	Eliminates pass element losses and thermal derating for VCORE/VI/O rails, preserving efficiency and simplifying layout.
Adjustable power good timeout	Configurable via PGTMR capacitor (C = t × 10µA / 1.23V); prevents system hang if downstream monitor fails to assert.
Electronic circuit breaker	50mV sense threshold with programmable SCTMR timeout; 20mA fast-pull-down protects external FET during short-circuit events.
Remote sense compensation	15Ω R_REMOTE switch engages automatically when GATE is fully enhanced, correcting for voltage drop across FET and sense resistor.
Shutdown sequencing delay	SDTMR capacitor sets delay between ON assertion and supply ramp initiation, enabling staggered enable timing for noise-sensitive circuits.

Applications

Server CPU Power Sequencing	Telecom Line Card Bias Control
Use Scenario: Coordinating VCORE (1.2V), VDDQ (1.35V), and VCCIO (1.8V) ramps for Xeon or AMD EPYC processors with strict voltage sequencing requirements. IC Role / Device Role / Timing Role: Master sequencer controlling three DC/DC converters via FB pins; uses RAMPBUF-driven TRACK dividers to enforce coincident + offset ramp profiles per Intel/AMD spec. Use Value: Prevents latch-up by ensuring \|VCORE − VDDQ\| ≤ 0.3V during power-up/down; eliminates need for discrete RC networks or CPLD-based timing logic.	Use Scenario: Managing bias rails for RF front-end amplifiers and ADC/DAC signal chains in 5G baseband units requiring clean, staggered power delivery. IC Role / Device Role / Timing Role: Controls four supplies: three FET-less slaves (analog bias, digital core, I/O) plus one FET-controlled RF PA supply using GATE/RAMP/REMOTE. Use Value: Remote sense compensation maintains ±1% output accuracy despite 200mV IR drop across PA FET; PGTMR timeout guards against faulty LDO monitors.
FPGA Configuration Power Management	Industrial PLC Module Sequencing
Use Scenario: Sequencing configuration (1.0V), core (0.85V), and auxiliary (3.3V) rails for Xilinx Versal ACAPs where incorrect ramp order corrupts bitstream loading. IC Role / Device Role / Timing Role: Uses SD1/SD2/SD3 to hold RUN/SS pins of slave converters until ON is asserted and SDTMR delay expires, then tracks RAMP via TRACK/FB pairs. Use Value: Guarantees 10ms minimum delay before core rail activation, satisfying FPGA vendor's "power-on reset" timing window.	Use Scenario: Controlling isolated DC/DC outputs (5V, 12V, 24V) in programmable logic controller backplanes where EMI-sensitive analog I/O must power last. IC Role / Device Role / Timing Role: Implements Figure 4-style sequencing: 24V → 12V → 5V with individual SDx outputs enabling/disabling converters in strict order. Use Value: Avoids ground bounce and supply coupling during startup; FAULT output triggers PLC watchdog if any rail fails regulation check.

Server CPU Power Sequencing

Telecom Line Card Bias Control

Use Scenario: Coordinating VCORE (1.2V), VDDQ (1.35V), and VCCIO (1.8V) ramps for Xeon or AMD EPYC processors with strict voltage sequencing requirements.

IC Role / Device Role / Timing Role: Master sequencer controlling three DC/DC converters via FB pins; uses RAMPBUF-driven TRACK dividers to enforce coincident + offset ramp profiles per Intel/AMD spec.

Use Value: Prevents latch-up by ensuring |VCORE − VDDQ| ≤ 0.3V during power-up/down; eliminates need for discrete RC networks or CPLD-based timing logic.

Use Scenario: Managing bias rails for RF front-end amplifiers and ADC/DAC signal chains in 5G baseband units requiring clean, staggered power delivery.

IC Role / Device Role / Timing Role: Controls four supplies: three FET-less slaves (analog bias, digital core, I/O) plus one FET-controlled RF PA supply using GATE/RAMP/REMOTE.

Use Value: Remote sense compensation maintains ±1% output accuracy despite 200mV IR drop across PA FET; PGTMR timeout guards against faulty LDO monitors.

FPGA Configuration Power Management

Industrial PLC Module Sequencing

Use Scenario: Sequencing configuration (1.0V), core (0.85V), and auxiliary (3.3V) rails for Xilinx Versal ACAPs where incorrect ramp order corrupts bitstream loading.

IC Role / Device Role / Timing Role: Uses SD1/SD2/SD3 to hold RUN/SS pins of slave converters until ON is asserted and SDTMR delay expires, then tracks RAMP via TRACK/FB pairs.

Use Value: Guarantees 10ms minimum delay before core rail activation, satisfying FPGA vendor's "power-on reset" timing window.

Use Scenario: Controlling isolated DC/DC outputs (5V, 12V, 24V) in programmable logic controller backplanes where EMI-sensitive analog I/O must power last.

IC Role / Device Role / Timing Role: Implements Figure 4-style sequencing: 24V → 12V → 5V with individual SDx outputs enabling/disabling converters in strict order.

Use Value: Avoids ground bounce and supply coupling during startup; FAULT output triggers PLC watchdog if any rail fails regulation check.

Equivalent & Alternatives

The following parts are listed as comparable options for similar power supply tracking and sequencing applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS652860RHAR	Integrated triple-buck PMIC with built-in tracking; no external FET support; fixed 0.6V FB reference; smaller 20-pin VQFN.	Best for cost-sensitive, space-constrained designs needing integrated conversion-not for systems requiring external high-current FETs or flexible rail count.	Select LTC2925IUF#PBF when external FET control, 0.8V TRACK reference, or four-rail sequencing (3+1) is required.
MAX16050ATL+	Quad supply sequencer with 12-bit ADC monitoring; no current-mirror tracking; relies on DACs and comparators; larger 32-pin TQFN.	Suited for systems needing real-time voltage telemetry and programmable fault response-not for analog, resistor-based tracking simplicity.	Select LTC2925IUF#PBF when deterministic analog tracking, minimal external components, and circuit breaker protection are priorities.

Compared with TPS652860RHAR and MAX16050ATL+, the LTC2925IUF#PBF offers unique analog current-mirror tracking that preserves DC/DC converter loop stability without adding poles/zeros, supports external high-current FETs for scalable master rail design, and integrates a dedicated electronic circuit breaker-making it optimal for high-reliability, thermally demanding power architectures.

Availability

LTC2925IUF#PBF is available at Aetrix Electronics and suitable for server motherboard design, 5G telecom power modules, FPGA-based test equipment, and industrial PLC power subsystems requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LTC2925IUF#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.

The LTC2925IUF#PBF belongs to ADI's precision power management portfolio, designed specifically for complex multi-rail sequencing in compute, communications, and industrial systems where reliability, thermal robustness, and analog control fidelity are critical.

FAQ

What is the operating temperature range of the LTC2925IUF#PBF?

The LTC2925IUF#PBF is specified for operation from –40°C to +85°C, making it suitable for industrial and extended-temperature applications. This grade is confirmed by the 'I' suffix in the part number and matches the data sheet's LTC2925I specifications. The QFN package provides low thermal resistance (θ_JA = 37°C/W), supporting reliable performance in thermally constrained environments where the LTC2925IUF#PBF is deployed.

How does the LTC2925IUF#PBF achieve supply tracking without series pass elements?

The LTC2925IUF#PBF achieves FET-less tracking using a precision current-mirror architecture: each TRACKx pin holds at 0.8V and sources current mirrored to its corresponding FBx pin, which connects to the feedback node of a slave DC/DC converter. By selecting resistor dividers between RAMPBUF and TRACKx, the LTC2925IUF#PBF forces the slave output to track the master ramp waveform - eliminating pass transistor losses while maintaining tight regulation and transient response.

Can the LTC2925IUF#PBF control more than three supplies?

Yes - the LTC2925IUF#PBF natively controls three slave supplies via its FB1/FB2/FB3 outputs, and supports a fourth supply using its GATE pin to drive an external N-channel MOSFET. In this configuration, the RAMP pin connects to the FET source, and the TRACKx/FBx channels track the resulting master rail. The LTC2925IUF#PBF's remote sense switch (REMOTE pin) compensates for IR drop across the FET and sense resistor, ensuring accurate tracking of the fourth supply.

What is the purpose of the PGI and PGTMR pins on the LTC2925IUF#PBF?

The PGI (Power Good Input) pin connects to the RST output of an external supply monitor IC and is pulled up with 10µA. The PGTMR (Power Good Timer) pin sets the timeout duration using an external capacitor. If PGI remains low longer than the PGTMR timeout period after ON is asserted, the LTC2925IUF#PBF pulls FAULT low and shuts down all supplies - preventing system lockup due to monitor failure. This dual-pin mechanism is integral to the LTC2925IUF#PBF's fault-tolerant sequencing capability.

Does the LTC2925IUF#PBF provide overcurrent protection?

Yes - the LTC2925IUF#PBF includes an integrated electronic circuit breaker. It monitors voltage across an external sense resistor via SENSEP and SENSEN pins. When the differential exceeds 50mV for longer than the time set by the SCTMR capacitor, the LTC2925IUF#PBF pulls GATE low with 20mA and asserts FAULT. The circuit breaker resets only after ON is pulled below 0.4V and SCTMR discharges below ~100mV, ensuring safe recovery in the LTC2925IUF#PBF's protection scheme.

LTC2925IUF#PBF Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 24-WFQFN Exposed Pad

Packaging:: Tube

Product Status:: Active

Programmable:: Not Verified

Applications:: Power Supply Controller

Voltage - Input:: -

Voltage - Supply:: 2.9V ~ 5.5V

Current - Supply:: 1.5 mA

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 24-QFN (4x4)

LTC2925IUF#PBF FAQ

1.How can I place an order for LTC2925IUF#PBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC2925IUF#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC2925IUF#PBF reliable?

The price and inventory of LTC2925IUF#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2925IUF#PBF is usually 5 days.

3.What payment methods are accepted for LTC2925IUF#PBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2925IUF#PBF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for LTC2925IUF#PBF?

LTC2925IUF#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC2925IUF#PBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC2925IUF#PBF?

For technical support, including LTC2925IUF#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2925IUF#PBF requirements.

6.How does Aetrix verify that LTC2925IUF#PBF is sourced from the original manufacturer or authorized distributors?

All LTC2925IUF#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2925IUF#PBF meets industry standards.

7.What is the process for return or replacement of LTC2925IUF#PBF?

All LTC2925IUF#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2925IUF#PBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC2925IUF#PBF part is unused and in its original packaging.

Return procedure for LTC2925IUF#PBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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