Analog Devices Inc. LTC2926CUFD#PBF
- Part No.:
- LTC2926CUFD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Supply Controllers, Monitors
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
LTC2926CUFD#PBF.pdf
- Description:
- IC POWER SUPPLY CONTROLLER 20QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC2926CUFD#PBF from Analog Devices (formerly Linear Technology) is a precision MOSFET-controlled power supply tracker IC that manages up to three rail sequences-master + two slaves-with adjustable ramp rates, voltage offsets, and time delays. It integrates dual slave gate drivers (SGATE1/SGATE2), master gate drive (MGATE), remote sense switching control (RSGATE), and status/fault I/O. Used in FPGA, microprocessor, and server power sequencing where VCORE/VI/O tracking must avoid latch-up.
For engineers reviewing the LTC2926CUFD#PBF datasheet, LTC2926CUFD#PBF pinout, LTC2926CUFD#PBF application, or LTC2926CUFD#PBF equivalent, key selection criteria include its 20-lead QFN (4mm × 5mm) package, ±3% FB-to-TRACK current matching, 0.8V internal reference, 5.5V gate drive headroom above VCC, and fault-latched disconnect behavior with 1.23V input thresholds and 75mV hysteresis on ON/PGI/PGTMR pins.
Technical Context
The LTC2926CUFD#PBF implements a servo-based tracking architecture: each TRACK pin is held at 0.800V (±24mV over temperature), and its sourced current is mirrored to the corresponding FB pin to regulate slave supply output via external N-channel MOSFET source followers. The master ramp is generated either by MGATE driving an external capacitor (10µA constant current) or by tying MGATE to RAMP.
Its fault management uses a latched state machine triggered by low-voltage assertion on FAULT (≤0.5V), STATUS/PGI (≤1.0V after PGTMR timeout), or undervoltage on VCC (<2.4V). Fault recovery requires ON pin voltage <0.5V to clear the latch. Integrated charge pumps ensure MGATE, SGATE1/2, and RSGATE reach ≥5.0V above VCC for logic-level MOSFET enhancement.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.9V to 5.5V - supports common logic rails including 3.3V and 5V systems without level-shifting. |
| Internal Reference Voltage | 0.800V (±16mV) - sets precise tracking point for TRACK/FB servo loop; enables accurate offset and ratiometric profiles. |
| FB-to-TRACK Current Mismatch | ±3% - ensures matched slave regulation across temperature and load, critical for tight tracking tolerance. |
| Gate Drive Headroom | ≥5.0V above VCC - guarantees full enhancement of logic-level N-channel MOSFETs (e.g., IRF7413Z) even at low VCC = 2.9V. |
| ON Pin Threshold & Hysteresis | 1.23V ±13mV threshold with 75mV hysteresis - provides noise-immune enable/disable control with clean state transitions. |
| Operating Temperature | 0°C to 70°C - commercial-grade rating suitable for non-extended industrial environments like servers and communications equipment. |
| Package | 20-lead QFN (4mm × 5mm, exposed pad) - compact footprint with θJA = 43°C/W for efficient thermal dissipation in dense PCB layouts. |
Pinout & Package
Package: 20-lead plastic QFN (4mm × 5mm), exposed pad (Pin 21) connected to GND. Thermal resistance θJA = 43°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 19) | Positive supply input | Power source for internal circuitry; requires 0.1µF bypass to GND; UVLO triggers reset below 2.4V. |
| MGATE (Pin 10) | Master gate driver output | Sources/sinks 10µA to charge/discharge external capacitor; drives master MOSFET gate; clamped to VCC + 1V if tied to RAMP. |
| SGATE1 / SGATE2 (Pins 3, 14) | Slave gate drivers | Control external N-MOSFETs for slave supplies; provide ≥5.0V gate drive headroom above VCC for full enhancement. |
| RSGATE (Pin 11) | Remote sense switch gate driver | Enables integrated D1/S1 and D2/S2 switches after ramp completion; opens before ramp-down to prevent undershoot. |
| TRACK1 / TRACK2 (Pins 20, 17) | Tracking profile inputs | Set to 0.800V; current sourced here mirrors to FB1/FB2 to define slave output voltage vs. master ramp. |
| FB1 / FB2 (Pins 1, 16) | Feedback node interfaces | Connect to slave supply feedback dividers; internally clamped to ≤2.4V to protect supply generators. |
| STATUS/PGI (Pin 12) | Status output / Power Good input | Open-drain output pulled up by 10µA; asserts high when tracking complete; pulls low on fault or PGTMR timeout. |
| FAULT (Pin 7) | Fault input/output | Negative-logic I/O: 8.5µA pull-up to VCC–0.7V; latches low on sub-0.5V assertion; forces immediate shutdown of all gates and switches. |
| ON (Pin 5) | Enable/control input | 1.23V threshold with 75mV hysteresis; controls ramp direction; resets fault latch when <0.5V. |
| PGTMR (Pin 6) | Power Good timer input | Capacitor-connected node; charged by 10µA current when ON high; fault latched if >1.23V while STATUS/PGI remains low. |
| RAMP (Pin 9) | Master ramp signal input | Accepts external ramp source; weakly clamped to VCC + 1V; must not be driven low-impedance above VCC. |
| RAMPBUF (Pin 18) | Buffered ramp output | Low-impedance copy of RAMP; drives TRACK resistive dividers; capable of ±3mA sourcing/sinking. |
| D1/S1, D2/S2 (Pins 4, 2, 13, 15) | Integrated remote sense switches | 10Ω max on-resistance; connect between load and supply sense node to compensate MOSFET drop; auto-enabled post-ramp. |
| GND (Pin 8) | Ground reference | Primary return path; exposed pad (Pin 21) must be connected to system GND for thermal and electrical integrity. |
Key Features
| Feature | Design Value |
|---|---|
| Three-rail tracking & sequencing | Supports coincident, ratiometric, offset, and sequential ramp profiles for VCORE/VI/O coordination in FPGAs and processors. |
| Integrated remote sense switching | Dual 10Ω switches (D1/S1, D2/S2) automatically engage post-ramp to eliminate MOSFET VDS error in slave supply feedback paths. |
| Fault-latched protection | Single-event fault (e.g., PGI low, FAULT low, or VCC UVLO) disables all gate drivers and switches until explicit ON-pin reset. |
| Charge-pump gate drive | Ensures MGATE, SGATE1/2, and RSGATE reach ≥5.0V above VCC - enabling use of low-VGS(th) logic-level MOSFETs without external boost. |
| Adjustable ramp timing | Ramp rate set by single capacitor on MGATE; time delays and offsets configured via resistor networks on TRACK/FB pins. |
| Robust I/O thresholds | All digital inputs (ON, PGTMR, STATUS/PGI, FAULT) feature 1.23V thresholds with ≥30mV hysteresis for noise immunity in noisy power environments. |
Applications
| VCORE/VI/O Tracking for FPGAs | Multi-Rail Server Power Sequencing |
|---|---|
Use Scenario: Coordinating 1.2V VCORE and 2.5V VI/O ramps in Xilinx or Intel FPGAs to prevent latch-up during power-up/down. IC Role / Device Role / Timing Role: LTC2926CUFD#PBF acts as master-slave tracker with adjustable offset, using TRACK1/FB1 for VCORE and TRACK2/FB2 for VI/O. Use Value: Maintains ΔV ≤ 300mV between rails throughout ramp-meeting FPGA absolute maximum ratings and eliminating need for discrete timing ICs. | Use Scenario: Sequencing 12V, 5V, and 3.3V rails in rack-mounted servers with strict bring-up order and voltage margining. IC Role / Device Role / Timing Role: LTC2926CUFD#PBF configures one rail as master (e.g., 12V), others as slaves with time-delayed enable via PGTMR and ON pin control. Use Value: Eliminates external RC timers and comparators; reduces BOM count by 4+ components per rail while supporting field-upgradable sequencing profiles. |
| Communications Baseband Power Management | DSP/Microprocessor Core-Periphery Coordination |
Use Scenario: Managing 1.8V analog front-end, 1.2V DSP core, and 3.3V I/O in wireless baseband units requiring simultaneous ramp-down to avoid data corruption. IC Role / Device Role / Timing Role: LTC2926CUFD#PBF operates in coincident tracking mode, using RAMPBUF to synchronize all three rails via shared TRACK network. Use Value: Achieves <50µs inter-rail skew during ramp transitions-critical for JESD204B SerDes lock stability and ADC/DAC reference settling. | Use Scenario: Aligning 1.1V ARM Cortex-A core and 1.8V peripheral I/O in embedded processors where core voltage must track within ±2% of I/O during dynamic DVFS transitions. IC Role / Device Role / Timing Role: LTC2926CUFD#PBF uses ratiometric tracking (RTA/RTB resistor network) to maintain fixed VOUT/VREF ratio independent of master ramp slope. Use Value: Enables seamless frequency scaling without violating core-I/O voltage differential limits-reducing software complexity versus firmware-controlled GPIO sequencing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power supply tracking applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2925CUFD#PBF | Two-channel tracker only; no PGTMR or STATUS/PGI; lacks RSGATE and integrated sense switches. | Suitable only for dual-rail systems without power-good monitoring or remote sense compensation. | Select when cost sensitivity outweighs need for third rail, fault reporting, or MOSFET drop compensation. |
| TPS652862ARSLR | Integrated buck converters + sequencer; fixed 1.2V/1.8V/3.3V outputs; no external MOSFET support; no TRACK/FB flexibility. | Targeted at space-constrained apps needing monolithic PMIC-not modular MOSFET-based tracking. | Choose only if board area is critical and rail voltages match factory defaults; not a functional substitute for LTC2926CUFD#PBF's programmability. |
Compared with LTC2925CUFD#PBF, the LTC2926CUFD#PBF adds third-rail control, fault-latched shutdown, and automatic remote sense switching-enabling robust, field-configurable sequencing in high-reliability systems. Versus TPS652862ARSLR, it trades integration for design flexibility: external MOSFETs allow arbitrary voltage combinations and higher current scalability beyond 5A.
Availability
LTC2926CUFD#PBF is available at Aetrix Electronics and suitable for FPGA power sequencing, server multi-rail management, and communications baseband supply coordination requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for LTC2926CUFD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, formed through the acquisition of Linear Technology in 2017.
The LTC2926CUFD#PBF belongs to ADI's Power Management portfolio, specifically designed for precision analog-controlled power sequencing in high-reliability computing and infrastructure systems where deterministic ramp behavior and fault containment are mandatory.
FAQ
What is the function of the RAMPBUF pin on the LTC2926CUFD#PBF?
The RAMPBUF pin on the LTC2926CUFD#PBF provides a low-impedance buffered replica of the RAMP signal, capable of sourcing or sinking up to ±3mA. It drives the resistive divider networks connected to TRACK1 and TRACK2, ensuring accurate tracking profile generation without loading the sensitive RAMP node. Unlike the high-impedance RAMP pin (which handles only 10µA), RAMPBUF maintains signal integrity across PCB traces and multiple divider branches-critical for consistent multi-rail tracking performance in the LTC2926CUFD#PBF.
How does the LTC2926CUFD#PBF handle fault conditions and recovery?
The LTC2926CUFD#PBF uses a latched fault architecture: assertion of FAULT ≤0.5V, STATUS/PGI ≤1.0V after PGTMR timeout, or VCC <2.4V immediately pulls MGATE, SGATE1, SGATE2, and RSGATE to GND and opens D1/S1 and D2/S2 switches. Recovery requires pulling the ON pin below 0.5V to clear the latch-no automatic retry. This ensures system safety by preventing uncontrolled re-enabling after overvoltage, undervoltage, or loss-of-power events in the LTC2926CUFD#PBF.
Can the LTC2926CUFD#PBF track more than two slave supplies?
No-the LTC2926CUFD#PBF supports exactly two slave supplies via dedicated SGATE1/SGATE2 outputs and FB1/FB2 inputs. Its architecture is optimized for master + dual-slave configurations (e.g., VCORE + VI/O + AUX). To manage three independent rails with tracking, a second LTC2926CUFD#PBF or alternate solution is required. The device does not support daisy-chaining or multiplexing additional channels; all TRACK/FB pairs and gate drivers are fixed-function and non-expandable in the LTC2926CUFD#PBF.
What is the purpose of the RSGATE pin on the LTC2926CUFD#PBF?
The RSGATE pin on the LTC2926CUFD#PBF drives the gates of internal remote sense switches (D1/S1 and D2/S2) and optional external N-MOSFETs. It rises only after MGATE, SGATE1, and SGATE2 reach full enhancement, closing the sense path to compensate for MOSFET VDS drop in slave supplies. During ramp-down, RSGATE falls below 1.23V before MGATE/SGATEs discharge-ensuring sense switches open first to avoid undershoot. This precise timing coordination is integral to the LTC2926CUFD#PBF's accuracy in high-current applications.
Does the LTC2926CUFD#PBF require external MOSFETs for operation?
Yes-the LTC2926CUFD#PBF is a controller IC and requires external N-channel MOSFETs for all rail control functions. MGATE drives a master MOSFET (e.g., for a 12V rail), SGATE1/SGATE2 drive slave MOSFETs (e.g., for 3.3V/1.8V rails), and RSGATE can drive external sense-switch MOSFETs. No internal power switches exist; the LTC2926CUFD#PBF provides only gate drive signals, current mirroring, and sequencing logic-making external MOSFET selection (e.g., RDS(on), Qg, VGS(th)) critical to system performance.
LTC2926CUFD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Power Supply Controller
- Voltage - Input:
- -
- Voltage - Supply:
- 2.9V ~ 5.5V
- Current - Supply:
- 2.5 mA
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN (4x5)
LTC2926CUFD#PBF FAQ
1.How can I place an order for LTC2926CUFD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2926CUFD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2926CUFD#PBF reliable?
The price and inventory of LTC2926CUFD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2926CUFD#PBF is usually 5 days.
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Once your LTC2926CUFD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2926CUFD#PBF?
For technical support, including LTC2926CUFD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2926CUFD#PBF requirements.
6.How does Aetrix verify that LTC2926CUFD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2926CUFD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2926CUFD#PBF meets industry standards.
7.What is the process for return or replacement of LTC2926CUFD#PBF?
All LTC2926CUFD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2926CUFD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2926CUFD#PBF part is unused and in its original packaging.
Return procedure for LTC2926CUFD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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