Analog Devices Inc. LTC2930CDD#PBF
- Part No.:
- LTC2930CDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Power Supply Controllers, Monitors
- Package:
- 12-WFDFN Exposed Pad
- Datasheet:
-
LTC2930CDD#PBF.pdf
- Description:
- IC 6 POWER SUPPLY MONITOR 12DFN
- Quantity:
- Payment:

- Shipping:

Inventory:352
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2930CDD#PBF from Analog Devices (formerly Linear Technology) is a configurable six-supply voltage monitor IC with ±1.5% threshold accuracy, adjustable reset timeout via external capacitor (2ms/nF), manual reset input, and guaranteed RST output operation down to VCC = 1V. It supports 16 preset combinations of 5V/3.3V/3V/2.5V/1.8V/1.5V and ±adjustable thresholds (0.5V nominal), and is used in multivoltage systems requiring reliable power-up/power-down sequencing and brownout detection.
For engineers reviewing the LTC2930CDD#PBF datasheet, LTC2930CDD#PBF pinout, LTC2930CDD#PBF application, or LTC2930CDD#PBF equivalent, key selection criteria include its 12-lead 3mm × 3mm DFN package, 52μA quiescent current, ±1.5% over-temperature threshold accuracy, 0°C to 70°C operating range, and support for both positive and negative adjustable inputs (e.g., –5.2V monitoring).
Technical Context
The LTC2930CDD#PBF implements six independent high-impedance voltage comparators with user-selectable thresholds via a resistive divider on the VPG pin, enabling 16 distinct mode configurations. Its internal bandgap reference (1.210V ±18mV) feeds both the VPG threshold selection network and the –ADJ input offset circuitry.
Reset assertion is synchronized across all six inputs: RST pulls low when any monitored supply falls below its configured threshold and remains low for the CRT-set timeout after all supplies recover. The open-drain RST output features a weak 6μA internal pull-up to V2 and guarantees valid logic states down to VCC = 1V, with glitch immunity built into all comparator paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Current | 52μA typical - enables use in battery-powered and ultra-low-power systems without compromising monitoring fidelity. |
| Threshold Accuracy | ±1.5% over temperature - ensures precise reset triggering across 0°C to 70°C, minimizing false resets in margin-critical applications. |
| Reset Timeout Range | 25μs (open CRT) to >10s (10nF) - programmable via external capacitor (2ms/nF scaling) to match microprocessor reset timing requirements. |
| VCC Operating Range | 1V minimum for RST validity - guarantees correct reset state during deep brownout, supporting robust system recovery even as main supplies collapse. |
| Input Thresholds | Fixed: 5V/3.3V/3V/2.5V/1.8V/1.5V; Adjustable: 0.5V nominal (±18mV); Negative: –ADJ mode referenced to GND - supports mixed-rail systems including –5.2V. |
| Package | 12-lead 3mm × 3mm DFN (DD) with exposed pad - provides compact footprint and thermal performance suitable for space-constrained PCB layouts. |
| Operating Temp | 0°C to 70°C (C-grade) - validated for commercial desktop, notebook, and telecom equipment environments. |
Pinout & Package
Package: 12-lead 3mm × 3mm plastic DFN (DD) with exposed pad (Pin 13), RoHS-compliant, lead-free finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V5 (Pin 1) | Adjustable voltage input 5 | High-impedance comparator input with 0.5V nominal threshold; tie to V1 if unused. |
| V3 (Pin 2) | Voltage input 3 | Selectable threshold (2.5V/1.8V/1.5V/ADJ); bypass not required but recommended for noise immunity. |
| V1 (Pin 3) | Voltage input 1 / VCC source | Selectable 5V or 3.3V threshold; greater of V1/V2 sets internal VCC; requires ≥0.1μF bypass to GND. |
| CRT (Pin 4) | Reset timeout capacitor | Connect external capacitor to GND to set delay (2ms/nF); open = ~25μs minimum timeout. |
| RST (Pin 5) | Open-drain reset output | Pulls low on fault; weak 6μA internal pull-up to V2; external pull-up required for VOH > V2 or faster rise times. |
| MR (Pin 6) | Manual reset input | Active-low; internally pulled up; debounced via CRT timing; pulse width ≥150ns required at VCC = 3.3V. |
| GND (Pin 7) | Ground reference | Primary return path; exposed pad (Pin 13) is also GND and may be connected for improved thermal performance. |
| VPG (Pin 8) | Mode select input | Accepts voltage divider tap between VREF and GND to select one of 16 configurations; no capacitance allowed. |
| VREF (Pin 9) | Buffered reference output | 1.210V ±18mV; sources/sinks ±1mA; drives VPG divider and –ADJ offset circuitry; stable with ≤1000pF load. |
| V4 (Pin 10) | Voltage input 4 | Selectable 1.8V/1.5V/ADJ/–ADJ; –ADJ mode uses VREF to shift ground-referenced negative rail sensing (e.g., –5.2V). |
| V2 (Pin 11) | Voltage input 2 / VCC source | Selectable 3.3V/3V/2.5V; greater of V1/V2 sets internal VCC; requires ≥0.1μF bypass to GND; RST pull-up target. |
| V6 (Pin 12) | Adjustable voltage input 6 | High-impedance comparator input with 0.5V nominal threshold; tie to V1 if unused. |
Key Features
| Feature | Design Value |
|---|---|
| 16-mode configuration | Enables flexible deployment across diverse multivoltage systems (e.g., 5V/3.3V/1.8V/–5.2V/2.5V/12V) without redesigning the BOM. |
| ±1.5% threshold accuracy | Reduces required system voltage margin by ~1.5% compared to ±3% supervisors, improving reliability in tight-tolerance rails. |
| Adjustable reset timeout | Eliminates need for fixed-timing supervisors; supports custom reset hold times from microseconds to seconds via single capacitor. |
| –ADJ input capability | Allows direct monitoring of negative supplies (e.g., –5.2V) using standard 1% resistors and VREF-based level shifting - no external op-amps needed. |
| Guaranteed RST at VCC ≥ 1V | Ensures deterministic reset behavior during deep undervoltage events, critical for fail-safe shutdown in industrial and automotive subsystems. |
Applications
| Desktop and Notebook Computers | Telecom Equipment |
|---|---|
Use Scenario: Monitoring core, I/O, memory, and auxiliary rails (e.g., 12V, 5V, 3.3V, 1.8V, 1.2V, –5.2V) during power-up, brownout, and thermal shutdown. IC Role / Device Role / Timing Role: Centralized six-rail supervisor providing synchronized reset assertion and recovery timing via CRT-configured timeout. Use Value: Prevents CPU lockup or data corruption by ensuring all supplies stabilize before release of system reset, leveraging ±1.5% accuracy to avoid false triggers near rail limits. | Use Scenario: Validating redundant DC/DC outputs (e.g., +5V, +3.3V, +1.8V, –48V derived, +12V, +2.5V) in line cards and baseband units. IC Role / Device Role / Timing Role: Fault-detection hub with manual reset override for field maintenance and OR-ed reset aggregation across multiple boards. Use Value: Enables hot-swap compatibility and graceful service interruption by holding reset until all rails exceed thresholds, with CRT-adjustable hold time matching ASIC boot sequences. |
| Network Servers | Automotive Infotainment |
Use Scenario: Coordinating power sequencing for CPU, GPU, memory, storage controllers, and management engines across multi-board chassis. IC Role / Device Role / Timing Role: Primary supervisor with individual rail visibility (via VPG configuration) and manual reset for BMC-initiated reboots. Use Value: Reduces firmware complexity by offloading rail validation and reset timing to hardware, while 52μA current supports always-on management subsystems. | Use Scenario: Monitoring head unit supplies including 12V battery, 5V USB, 3.3V MCU, 1.8V DSP, –5.2V audio bias, and 2.5V sensor interface under wide ambient temperature swings. IC Role / Device Role / Timing Role: Automotive-grade (C-temp) voltage guardian with glitch-immune comparators and VCC ≥ 1V RST guarantee for cold-crank resilience. Use Value: Meets AEC-Q200 stress requirements indirectly via 125°C H-grade sibling; ±1.5% accuracy ensures reliable operation despite battery voltage sag to 6V. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar six-supply monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC2932CDD#PBF | Same 12-lead DFN package; adds pin-selectable tolerance (5%/7.5%/10%/12.5%) and reset disable for margin testing; identical VPG configuration and –ADJ support. | Targeted at production test and margin validation where adjustable tolerance is required; otherwise functionally interchangeable in standard monitoring roles. | Choose LTC2932CDD#PBF if tolerance flexibility or reset disable during voltage margining is needed; otherwise LTC2930CDD#PBF offers simpler configuration and lower cost. |
| LTC2909CMS8#PBF | 8-lead MSOP; monitors three inputs (UV/OV/negative) with shunt-regulated VCC; no six-input capability; fixed 5% tolerance; no VPG configuration matrix. | Designed for compact dual-rail + negative monitoring (e.g., 5V UV/OV + –12V), not full six-rail coverage; lacks CRT-adjustable timeout and manual reset. | Choose LTC2909CMS8#PBF only for space-constrained dual-rail + negative applications; not a functional substitute for six-supply monitoring. |
Compared with LTC2930CDD#PBF, LTC2932CDD#PBF extends functionality with tolerance selection and margining features but shares identical pinout and core monitoring architecture, whereas LTC2909CMS8#PBF serves a fundamentally different scope-tri-rail with UV/OV/negative detection-and cannot replace six-input supervision.
Availability
LTC2930CDD#PBF is available at Aetrix Electronics and suitable for desktop computers, telecom equipment, and network servers requiring stable component supply, precise multirail monitoring, and long-term lifecycle support.
Supply support for LTC2930CDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC2930CDD#PBF belongs to Linear's precision power monitoring product line, designed specifically for complex multivoltage systems in computing, communications, and industrial infrastructure where accuracy, configurability, and reliability are non-negotiable.
FAQ
What is the operating temperature range of the LTC2930CDD#PBF?
The LTC2930CDD#PBF is rated for 0°C to 70°C (commercial grade). This range is explicitly defined in the Absolute Maximum Ratings table and confirmed in the Order Information section, distinguishing it from the I-grade (–40°C to 85°C) and H-grade (–40°C to 125°C) variants. Operation outside this range may result in undefined behavior or parametric deviation.
How does the LTC2930CDD#PBF configure its six voltage thresholds?
The LTC2930CDD#PBF selects one of 16 preset combinations using an external resistive divider connected between VREF and GND, with the tap point applied to the VPG pin. Table 1 in the datasheet lists exact resistor values (e.g., 121kΩ/100kΩ for Mode 13) that produce specific VPG/VREF ratios. The device samples VPG during a 150μs setup window after VCC rises above 2.4V.
Can the LTC2930CDD#PBF monitor negative voltages like –5.2V?
Yes, the LTC2930CDD#PBF supports negative voltage monitoring on V4 via the –ADJ mode. In this mode, VREF (1.210V) provides the reference offset, and the trip voltage is calculated as VTRIP = –VREF × R3/R4. For –5.2V, the datasheet recommends R3 = 487kΩ and R4 = 121kΩ, yielding –4.87V (within ±1.5% of –5.2V).
What is the minimum VCC required for the RST output to remain valid on the LTC2930CDD#PBF?
The RST output of the LTC2930CDD#PBF is guaranteed to be in the correct logic state for VCC ≥ 1V, as specified in the Electrical Characteristics table under "VCC Minimum Internal Operating Voltage". Below 1V, RST behavior is not characterized and may become indeterminate.
How is the reset timeout period adjusted on the LTC2930CDD#PBF?
The reset timeout period on the LTC2930CDD#PBF is set by connecting an external capacitor (CRT) between Pin 4 and GND. The relationship is linear: tRST ≈ 2ms per nanofarad (e.g., 47nF yields ~94ms). Leaving CRT open results in a minimum timeout of ~25μs. Ceramic capacitors with low leakage are recommended for accuracy.
LTC2930CDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 12-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Six Power Supply Monitor
- Voltage - Input:
- -
- Voltage - Supply:
- 1V ~ 7V
- Current - Supply:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-DFN (3x3)
LTC2930CDD#PBF FAQ
1.How can I place an order for LTC2930CDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2930CDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2930CDD#PBF reliable?
The price and inventory of LTC2930CDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2930CDD#PBF is usually 5 days.
3.What payment methods are accepted for LTC2930CDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2930CDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2930CDD#PBF?
LTC2930CDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2930CDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2930CDD#PBF?
For technical support, including LTC2930CDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2930CDD#PBF requirements.
6.How does Aetrix verify that LTC2930CDD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2930CDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2930CDD#PBF meets industry standards.
7.What is the process for return or replacement of LTC2930CDD#PBF?
All LTC2930CDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2930CDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2930CDD#PBF part is unused and in its original packaging.
Return procedure for LTC2930CDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2930CDD#PBF Tags

-
UC3845AD8TR
Texas Instruments

-
UC2843AD8TR
Texas Instruments

-
LM3880MFX-1AE/NOPB
Texas Instruments

-
LM3880MFX-1AA/NOPB
Texas Instruments

-
INA234AIYBJR
Texas Instruments

-
INA700AYWFR
Texas Instruments

-
LM3880MF-1AE/NOPB
Texas Instruments

-
LM3880MF-1AA/NOPB
Texas Instruments

-
LM3881MM/NOPB
Texas Instruments

-
UCC2802DTR
Texas Instruments

-
NCP4305DMTTWG
onsemi
-
INA237AIDGSR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

