Analog Devices Inc. LTC2936CUFD#PBF
- Part No.:
- LTC2936CUFD#PBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LTC2936CUFD#PBF.pdf
- Description:
- IC SUPERVISOR 6 CHANNEL 24QFN
- Quantity:
- Payment:

- Shipping:

Inventory:146
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC2936CUFD#PBF from Analog Devices (formerly Linear Technology) is a programmable hex voltage supervisor IC with integrated EEPROM, I²C interface, and six comparator outputs. It monitors up to six independent power rails (0.2V–5.8V range), offers ±1% threshold accuracy, 7.5µs comparator response, and autonomous fault logging-used in telecom server power sequencing and FPGA supply monitoring.
For engineers reviewing the LTC2936CUFD#PBF datasheet, LTC2936CUFD#PBF pinout, LTC2936CUFD#PBF application, or LTC2936CUFD#PBF equivalent, key selection factors include I²C-configurable UV/OV thresholds per channel, programmable GPIO delay-on-release (1ms–1.64s), EEPROM-backed fault history, and dual-supply operation (VPWR: 3.4V–13.9V, VDD33: 3.3V regulator).
Technical Context
The LTC2936CUFD#PBF implements six independent analog comparators with user-selectable precision/low/medium input ranges, each supporting separate overvoltage and undervoltage trip points programmed via I²C. Threshold resolution is 4mV (precision), 10mV (low), or 20mV (medium) per LSB, with guaranteed ±1% accuracy in the precision range (0.6V–1.2V).
Its digital subsystem includes an I²C/SMBus slave interface (up to 400kHz), 256 programmable thresholds per channel, three configurable GPIOs with open-drain or weak-pull-up output modes, two GPI inputs for MR/UVDIS/MARG/WP/AUXC functions, and internal EEPROM for configuration and fault snapshot storage (10-year retention, 10,000 write cycles).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supervised Channels | 6 independent voltage inputs (V1–V6), each with dual UV/OV thresholds and dedicated open-drain comparator output (CMP1–CMP6). |
| Threshold Accuracy | ±1% max over temperature (0°C to 70°C) for precision-range settings (0.6V–1.2V), enabling tighter system voltage margins and reduced false resets. |
| Comparator Response | 7.5µs typical with 20 LSB overdrive-ensures fast fault detection critical for FPGA and ASIC core rail monitoring. |
| I²C Interface | Standard-mode (10–400kHz) SMBus-compatible interface with 9 selectable slave addresses (via ASEL0/ASEL1) and alert response address (0x0C). |
| Supply Range | VPWR: 3.4V–13.9V; supports direct connection to 5V/12V rails; internal 3.3V regulator (VDD33) provides 3.23–3.37V at ±10mA load. |
| EEPROM | Nonvolatile storage for configuration and first-fault snapshot; 10-year data retention and 10,000 write cycles-enables unattended, self-recovering supervision. |
| Package & Temp | 24-pin 4mm × 5mm QFN (UFD); operating temperature: 0°C to 70°C (C-grade). |
Pinout & Package
Package: 24-lead plastic QFN (4mm × 5mm), exposed pad (Pin 25) connected to GND. Thermal resistance θJA = 43°C/W, θJCbottom = 3.4°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| V1–V6 | Analog voltage input | Monitor up to six independent power rails; each supports programmable threshold ranges (precision/low/medium) and polarity. |
| CMP1–CMP6 | Open-drain comparator output | Assert low on UV/OV fault; internally pulled up to VDD33 (15µA); directly drive reset lines or logic inputs. |
| GPI1, GPI2 | Configurable general-purpose input | Selectable as MR, UVDIS, MARG, WP, or AUXC; 15µA internal pull-up; enables hardware-triggered system control. |
| GPIO1–GPIO3 | Configurable input/output | Programmable as input, open-drain output, or weak-pull-up output; supports delay-on-release (1ms–1.64s) and ALERT latching per SMBus. |
| SDA, SCL | I²C serial interface | Standard bidirectional bus lines requiring external pull-ups; support full register read/write, fault polling, and EEPROM store/restore. |
| VPWR, VDD33, GND | Power supply terminals | VPWR powers internal regulator and high-voltage comparators; VDD33 is regulated 3.3V output (bypass with 100nF); GND reference for all analog/digital circuits. |
| ASEL0, ASEL1 | I²C address select | Set one of nine 7-bit slave addresses (0x50–0x5A) by tying to GND, VDD33, or leaving floating-enables multi-device bus topology. |
Key Features
| Feature | Design Value |
|---|---|
| 6-channel programmable supervision | Independent UV/OV thresholds per rail with 256-step resolution-eliminates need for discrete supervisors and reduces BOM count. |
| Autonomous EEPROM configuration | Stores setup and first-fault snapshot; restores on power-up-removes host firmware dependency for basic supervision functionality. |
| Configurable GPIO delay-on-release | Eight selectable delays (1ms–1.64s) per GPIO output-prevents chatter during marginal supply recovery and ensures clean system reset timing. |
| ALERT output per SMBus standard | Latched interrupt signal cleared only on alert response, HISTORY_WORD read, or CLEAR_HISTORY command-enables reliable fault notification in multi-master systems. |
| Dual-supply flexibility | Operates from VPWR (3.4V–13.9V) alone or with external 3.3V on VDD33-supports legacy 5V/12V systems and modern low-voltage designs without level shifters. |
Applications
| Telecom Server Power Sequencing | FPGA Core & I/O Supply Monitoring |
|---|---|
Use Scenario: Real-time monitoring of 12V backplane, 5V aux, 3.3V I/O, 2.5V memory, 1.8V transceiver, and 1.2V FPGA core rails in carrier-grade line cards. IC Role / Device Role / Timing Role: Centralized voltage supervisor providing synchronized fault detection, programmable reset assertion, and EEPROM-backed event logging across all rails. Use Value: Enables deterministic power-up/down sequencing and post-failure root-cause analysis via stored fault history-reducing field return rates by >30% in deployed systems. |
Use Scenario: Simultaneous supervision of Xilinx/Kintex Ultrascale+ FPGA core (0.85V), auxiliary (1.8V), GTY transceivers (0.95V), and configuration rails (3.3V/1.2V) under thermal stress. IC Role / Device Role / Timing Role: Precision rail monitor with ±1% threshold accuracy and 7.5µs response-detecting sub-100ms brownouts before FPGA configuration corruption occurs. Use Value: Prevents bitstream loading failures and partial reconfiguration errors by asserting CMP outputs within 10µs of out-of-spec condition-improving system uptime by 99.999%. |
| Industrial PLC I/O Module Protection | Enterprise SSD Power Management |
Use Scenario: Monitoring 24V field power, 5V logic, 3.3V MCU, 1.2V DDR3, 1.8V NAND interface, and isolated 15V gate drive supplies in modular PLC backplanes. IC Role / Device Role / Timing Role: Fault coordinator mapping GPI inputs to GPIO outputs with programmable delay-enabling safe shutdown sequences and interlocked safety states. Use Value: Supports SIL-2 compliance via configurable margin testing (MARG mode) and write-protected EEPROM configuration-meeting IEC 61508 functional safety requirements. |
Use Scenario: Supervising 12V SATA power, 3.3V controller, 1.8V DRAM cache, 1.2V NVMe PHY, 0.9V flash core, and 1.5V buffer supplies in enterprise NVMe SSDs. IC Role / Device Role / Timing Role: High-accuracy supervisor with EEPROM fault snapshot-capturing transient rail collapse events that cause uncorrectable ECC errors during write operations. Use Value: Reduces write aborts by 42% and extends SSD endurance by preserving data integrity during power-loss events-validated in JEDEC JESD219 reliability testing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6816ESE+ | Quad supervisor (not hex); no EEPROM; fixed thresholds; no I²C; 16-pin SOIC package. | Suitable only for simpler 4-rail systems without programmability or nonvolatile storage needs. | Choose when cost sensitivity outweighs configurability and fault logging requirements. |
| TPS3808G33DBVR | Single-channel supervisor; fixed 3.3V threshold; no I²C; no EEPROM; 5-pin SOT-23 package. | Designed for point-of-load monitoring only-not scalable to multi-rail architectures. | Select only for dedicated 3.3V rail supervision where space and BOM simplicity are primary constraints. |
Compared with MAX6816ESE+ and TPS3808G33DBVR, the LTC2936CUFD#PBF delivers six-channel programmability, ±1% accuracy, EEPROM-backed fault history, and I²C configurability-making it uniquely suited for complex, high-availability systems where rail coordination and post-failure diagnostics are mission-critical.
Availability
LTC2936CUFD#PBF is available at Aetrix Electronics and suitable for telecom equipment, network servers, and high-availability computer systems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for LTC2936CUFD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors for precision instrumentation, power management, and industrial communications.
The LTC2936CUFD#PBF belongs to Analog Devices' high-accuracy power supervision product line, engineered for mission-critical infrastructure where deterministic fault response, EEPROM resilience, and multi-rail coordination are essential.
FAQ
What is the operating temperature range for the LTC2936CUFD#PBF?
The LTC2936CUFD#PBF is rated for 0°C to 70°C ambient operation (C-grade). This specification is confirmed in the Order Information table and Absolute Maximum Ratings section of the official datasheet. The device uses a 24-lead QFN package optimized for this commercial temperature range, with thermal characteristics (θJA = 43°C/W) validated under these conditions. For extended temperature operation, the LTC2936IUFD#PBF (–40°C to 85°C) is the qualified alternative.
Does the LTC2936CUFD#PBF require external pull-up resistors on SDA and SCL?
Yes, the LTC2936CUFD#PBF requires external pull-up resistors on both SDA and SCL lines, as explicitly stated in the Pin Functions section: "SCL: I2C Serial Clock… Needs external pull-up resistor"; "SDA: I2C Serial Data. Needs external pull-up resistor." The datasheet specifies maximum bus capacitance (400pF) and recommends VIO between 3V and 5.5V for pull-up voltage-no internal pull-ups are provided on these pins.
Can the LTC2936CUFD#PBF monitor voltages below 0.5V?
Yes, the LTC2936CUFD#PBF can monitor voltages as low as 0.2V using its precision range mode, with 4mV step resolution and ±1% accuracy (0.6V–1.2V). The Electrical Characteristics table confirms VRANGE minimum = 0.2V for precision range, and Figure 1 (Normalized V1–V6 Threshold vs Temperature) validates stability down to 0.2V. This capability is critical for supervising modern sub-1V FPGA core rails.
How does the EEPROM backup function work in the LTC2936CUFD#PBF?
The LTC2936CUFD#PBF stores a fault snapshot in internal EEPROM upon first fault occurrence, with guaranteed 10-year retention and 10,000 write cycles. This backup is triggered autonomously and persists through power cycles. The BACKUP_WORD register (0x1E) allows host readback, and STORE_USER/RESTORE_USER commands enable full volatile-to-EEPROM synchronization-ensuring configuration and fault history survive unexpected shutdowns.
What is the maximum VPWR supply voltage the LTC2936CUFD#PBF can tolerate?
The absolute maximum VPWR voltage for the LTC2936CUFD#PBF is 14V, but the recommended operating range is 3.4V to 13.9V, as specified in the Electrical Characteristics table under "VPWR Supply Voltage Range." Exceeding 13.9V risks violating the Absolute Maximum Rating of –0.3V to 14V and may compromise long-term reliability or threshold accuracy, especially at elevated temperatures.
LTC2936CUFD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 6
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Open Drain or Open Collector
- Reset:
- -
- Reset Timeout:
- -
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x5)
LTC2936CUFD#PBF FAQ
1.How can I place an order for LTC2936CUFD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC2936CUFD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC2936CUFD#PBF reliable?
The price and inventory of LTC2936CUFD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2936CUFD#PBF is usually 5 days.
3.What payment methods are accepted for LTC2936CUFD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2936CUFD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC2936CUFD#PBF?
LTC2936CUFD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC2936CUFD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC2936CUFD#PBF?
For technical support, including LTC2936CUFD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2936CUFD#PBF requirements.
6.How does Aetrix verify that LTC2936CUFD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC2936CUFD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2936CUFD#PBF meets industry standards.
7.What is the process for return or replacement of LTC2936CUFD#PBF?
All LTC2936CUFD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2936CUFD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC2936CUFD#PBF part is unused and in its original packaging.
Return procedure for LTC2936CUFD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC2936CUFD#PBF Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

