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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc. LTC2963CUDC-1#TRPBF

Name: LTC2963CUDC-1#TRPBF
Brand: Analog Devices Inc.
SKU: LTC2963CUDC-1#TRPBF
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: LTC2963CUDC-1#TRPBF

Manufacturer:: Analog Devices Inc.

Category:: Supervisors

Package:: 20-WFQFN Exposed Pad

Datasheet:: LTC2963CUDC-1#TRPBF.pdf

Description:: IC SUPERVISOR 4 CHANNEL 20QFN

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Product details

Overview

LTC2963CUDC-1#TRPBF from Analog Devices is a quad configurable power supply supervisor IC with watchdog timer, designed for reliable system reset and fault monitoring in multi-rail power domains. It delivers ±0.5% threshold accuracy over temperature, supports 16 programmable voltage thresholds per channel (including 5V/3.3V/2.5V/1.8V/1.5V/1.2V/1.0V and ±ADJ modes), and features adjustable reset timeout (12–240 ms) and non-windowed watchdog with selectable initial timeout (1×/8×/64× upper period). It is used in telecom server power sequencing where precise, glitch-immune supervision of four independent supplies prevents spurious resets during brownout or margining.

For engineers reviewing the LTC2963CUDC-1#TRPBF datasheet, LTC2963CUDC-1#TRPBF pinout, LTC2963CUDC-1#TRPBF application, or LTC2963CUDC-1#TRPBF equivalent, key selection considerations include its 20-lead 3mm × 4mm QFN package, C-grade (0°C to 70°C) operation, integrated watchdog status output (WDO), RDIS-enabled reset disable for voltage margining, and DVCC-configurable push-pull/open-drain RST output.

Technical Context

The LTC2963CUDC-1#TRPBF implements a 4-channel analog comparator bank with a 4-bit ADC-based threshold selection architecture, where each PG input voltage (0 V to VREF) maps to one of 16 preset thresholds via external 1% resistors. Its ±0.5% accuracy is achieved through trimmed bandgap reference (1.195 V ±0.5%) and comparator offset compensation across –40°C to 125°C.

It integrates two independent RC-timed functions: a reset timeout controlled by CRT on RT (12 ms/nF, up to 240 ms), and a non-windowed watchdog timer controlled by CWT on WT (100 ms/nF, up to 2 s), with WDS enabling three initial timeout multipliers (1×/8×/64×). The RST output is guaranteed functional down to VCC = 1 V, and WDO operates as an open-drain status flag synchronized to watchdog expiration.

Key Specifications

Parameter	Value and Actual Design Meaning
VCC Range	2.25 V to 5.5 V - powers core logic and enables RST pull-up; operation guaranteed down to 1 V for safe power-up reset assertion.
Threshold Accuracy	±0.5% over temperature - ensures tight margin between supply tolerance and reset trigger, reducing false resets and relaxing PSU design requirements.
Reset Timeout Range	12 ms to 240 ms - set via CRT capacitor on RT pin; internal 200 ms default when RT tied to VCC.
Watchdog Upper Timeout	100 ms to 2 s - set via CWT capacitor on WT pin; internal 1.6 s when WT tied to VCC.
Initial Watchdog Timeout	1×, 8×, or 64× upper timeout - selected by WDS logic level (low/open/high), allowing extended initialization time after reset.
RST Output Type	Configurable push-pull (DVCC ≥ 1.6 V) or open-drain (DVCC = GND) - supports direct interfacing to 1.8 V/3.3 V/5 V logic without level shifters.
Supply Monitor Inputs	V1–V4 with ±ADJ capability - enables undervoltage, overvoltage, and negative voltage monitoring using external resistor dividers.

Pinout & Package

Package: 20-lead 3 mm × 4 mm plastic QFN (UDC), exposed pad (Pin 21) optional PCB ground connection. Thermal resistance θJA = 52°C/W, θJC = 6.8°C/W.

Pin/Terminal	Circuit Role	Design Meaning
RDIS	Reset Disable Input	Logic-low disables RST assertion - enables safe voltage margining without triggering system reset.
MR	Manual Reset Input	Pulled up internally to VCC; falling edge forces immediate RST low - supports pushbutton reset with built-in debounce.
DVCC	Digital Logic Supply	Sets RST/WDO output swing: ≥1.6 V enables push-pull; GND configures open-drain - decouples logic level from VCC.
VCC	Analog Core Supply	Powers comparators, reference, and timing circuits; RST weakly pulled up to this rail.
RST	Reset Output	Asserts low if any Vn falls below threshold; held low for tRST after all channels recover - primary system reset signal.
GND	Device Ground	Reference for all analog inputs and outputs; exposed pad connects internally to GND.
REF	Buffered Reference Output	1.195 V ±0.5% reference for PG divider networks - drives ≤1 mA, stable with ≤1000 pF bypass.
PG1–PG4	Threshold Select Inputs	Each accepts 0–VREF voltage to select one of 16 thresholds per channel - enables precise, resistor-based configuration.
V1–V4	Monitor Inputs	Accept supply voltages directly (up to 6 V); high-impedance (±15 nA in ±ADJ mode) minimizes loading.
RT	Reset Timeout Capacitor Input	Connect CRT to GND for adjustable timeout (12 ms/nF); tie to VCC for fixed 200 ms - sets duration RST stays low after recovery.
WDI	Watchdog Input	Rising/falling edges reset watchdog counter - must occur before timeout expires to prevent WDO/RST assertion.
WDO	Watchdog Output	Open-drain status flag - pulls low on watchdog timeout; cleared only by valid WDI edge or undervoltage event.
WDS	Initial Watchdog Timeout Select	Three-state input (low/open/high) selects 1×/8×/64× upper timeout - accommodates boot-time latency in supervised processors.
WT	Watchdog Timeout Capacitor Input	Connect CWT to GND for adjustable timeout (100 ms/nF); tie to VCC for fixed 1.6 s - defines watchdog window duration.

Key Features

Feature	Design Value
±0.5% threshold accuracy over temperature	Reduces required system voltage margin by ~1% vs ±1% supervisors, enabling smaller bulk capacitors and relaxed PSU regulation specs.
Configurable non-windowed watchdog with initial timeout scaling	WDS pin allows 3× boot-time flexibility - avoids premature watchdog timeout during processor initialization sequences.
DVCC-configurable RST/WDO output drive	Eliminates need for external level shifters when interfacing to mixed-voltage logic domains (e.g., 1.8 V MCU + 3.3 V peripherals).
Reset disable (RDIS) for voltage margining	Enables safe testing of microprocessor supply limits without issuing disruptive system resets - critical for production burn-in and validation.
Four independent monitor inputs with ±ADJ mode	Supports simultaneous monitoring of positive rails, negative rails, and overvoltage conditions using single device and shared REF.

Applications

Telecom Server Power Sequencing	Automotive ADAS Domain Controller Supervision
Use Scenario: Monitoring four independent DC/DC outputs (12 V, 5 V, 3.3 V, 1.8 V) in a 1U rack server with strict power-up order and brownout immunity. IC Role / Device Role / Timing Role: Quad supervisor asserts RST until all rails stabilize above thresholds; watchdog guards against firmware lockup during runtime. Use Value: ±0.5% accuracy prevents nuisance resets during transient load steps; adjustable tRST ensures clean release after sequential rail ramp-up.	Use Scenario: Supervising safety-critical power rails (5 V sensor bias, 3.3 V MCU core, 1.2 V GPU, –5 V analog front-end) in autonomous driving ECU. IC Role / Device Role / Timing Role: Detects undervoltage on any rail and triggers hardware reset; WDO feeds ASIL-B watchdog chain for fault containment. Use Value: RDIS enables in-system voltage margining per ISO 26262; –ADJ mode monitors negative supply integrity without extra components.
Industrial PLC I/O Module Power Management	High-Reliability Network Switch FPGA Configuration
Use Scenario: Ensuring stable operation of isolated 24 V, 5 V, 3.3 V, and 1.2 V supplies powering analog I/O, communication PHYs, and microcontrollers. IC Role / Device Role / Timing Role: Monitors rail health continuously; MR input supports field-service reset; RST coordinates cold-start sequence with isolated DC/DC enable signals. Use Value: Guaranteed RST operation down to VCC = 1 V ensures robust reset assertion during slow-ramp industrial AC/DC startup.	Use Scenario: Validating power integrity before releasing FPGA configuration reset and enabling PCIe link training in carrier-grade switches. IC Role / Device Role / Timing Role: Supervises 12 V aux, 3.3 V management, 1.8 V transceiver, and 1.0 V core rails; WDO feeds FPGA's internal watchdog or external safety monitor. Use Value: Adjustable watchdog timeout (via WT) aligns with FPGA configuration time; ±ADJ mode verifies 1.0 V rail against 0.5 V reference for enhanced noise immunity.

Telecom Server Power Sequencing

Automotive ADAS Domain Controller Supervision

Use Scenario: Monitoring four independent DC/DC outputs (12 V, 5 V, 3.3 V, 1.8 V) in a 1U rack server with strict power-up order and brownout immunity.

IC Role / Device Role / Timing Role: Quad supervisor asserts RST until all rails stabilize above thresholds; watchdog guards against firmware lockup during runtime.

Use Value: ±0.5% accuracy prevents nuisance resets during transient load steps; adjustable tRST ensures clean release after sequential rail ramp-up.

Use Scenario: Supervising safety-critical power rails (5 V sensor bias, 3.3 V MCU core, 1.2 V GPU, –5 V analog front-end) in autonomous driving ECU.

IC Role / Device Role / Timing Role: Detects undervoltage on any rail and triggers hardware reset; WDO feeds ASIL-B watchdog chain for fault containment.

Use Value: RDIS enables in-system voltage margining per ISO 26262; –ADJ mode monitors negative supply integrity without extra components.

Industrial PLC I/O Module Power Management

High-Reliability Network Switch FPGA Configuration

Use Scenario: Ensuring stable operation of isolated 24 V, 5 V, 3.3 V, and 1.2 V supplies powering analog I/O, communication PHYs, and microcontrollers.

IC Role / Device Role / Timing Role: Monitors rail health continuously; MR input supports field-service reset; RST coordinates cold-start sequence with isolated DC/DC enable signals.

Use Value: Guaranteed RST operation down to VCC = 1 V ensures robust reset assertion during slow-ramp industrial AC/DC startup.

Use Scenario: Validating power integrity before releasing FPGA configuration reset and enabling PCIe link training in carrier-grade switches.

IC Role / Device Role / Timing Role: Supervises 12 V aux, 3.3 V management, 1.8 V transceiver, and 1.0 V core rails; WDO feeds FPGA's internal watchdog or external safety monitor.

Use Value: Adjustable watchdog timeout (via WT) aligns with FPGA configuration time; ±ADJ mode verifies 1.0 V rail against 0.5 V reference for enhanced noise immunity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad supervisor with watchdog applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MAX6361AUK+T	Triple supervisor (not quad); no watchdog; fixed thresholds only (no PG programming); SOT23-6 package.	Lacks channel count, configurability, and watchdog - suitable only for simpler 3-rail systems without runtime fault detection.	Select only if system has ≤3 rails and requires minimal BOM count; not a functional replacement for LTC2963CUDC-1#TRPBF.
TPS389033DSER	Quad supervisor with watchdog; 1.8 V to 5.5 V VCC; ±1.5% threshold accuracy; 16-pin WSON; no RDIS or ±ADJ mode.	Lower accuracy increases risk of false resets under thermal stress; lacks reset disable and negative/overvoltage monitoring capability.	Consider for cost-sensitive designs where ±1.5% accuracy suffices and negative rail monitoring is unnecessary.

Compared with MAX6361AUK+T and TPS389033DSER, the LTC2963CUDC-1#TRPBF provides unique value in its combination of quad monitoring, ±0.5% accuracy, full programmability via PG inputs, RDIS-enabled margining, and true ±ADJ mode - making it irreplaceable for high-integrity, multi-rail systems requiring both precision and flexibility.

Availability

LTC2963CUDC-1#TRPBF is available at Aetrix Electronics and suitable for telecom infrastructure, automotive control systems, and industrial PLCs requiring stable component supply, long-term lifecycle support, and guaranteed C-grade performance (0°C to 70°C).

Supply support for LTC2963CUDC-1#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and industrial markets since 1965.

The LTC2963CUDC-1#TRPBF belongs to the LTC2962/LTC2963/LTC2964 family of configurable quad supervisors, engineered specifically for mission-critical power monitoring in systems demanding ultra-precise reset thresholds, flexible timing, and integrated watchdog reliability.

FAQ

What is the operating temperature range of the LTC2963CUDC-1#TRPBF?

The LTC2963CUDC-1#TRPBF is rated for the C-grade temperature range of 0°C to 70°C. This specification is confirmed in the "ORDER INFORMATION" table of the official datasheet, where the part number suffix "CUDC-1" explicitly denotes the commercial temperature grade. It is not rated for extended industrial (–40°C to 85°C) or automotive (–40°C to 125°C) ranges.

Does the LTC2963CUDC-1#TRPBF support overvoltage monitoring?

Yes, the LTC2963CUDC-1#TRPBF supports overvoltage monitoring via its –ADJ mode. When configured in –ADJ, the comparator references the 0.5 V internal threshold, so a positive supply monitored through an external resistor divider will assert RST when the input exceeds the programmed threshold - effectively functioning as an overvoltage detector. This is explicitly documented in the "DESCRIPTION" and "PIN FUNCTIONS" sections.

How is the watchdog timeout configured on the LTC2963CUDC-1#TRPBF?

The watchdog timeout on the LTC2963CUDC-1#TRPBF is configured using an external capacitor (CWT) connected between the WT pin and GND, yielding a timeout of 100 ms/nF. Alternatively, tying WT to VCC selects a fixed 1.6 s timeout, while leaving WT open results in ~2 ms (parasitic-dependent). These configurations are defined in the "ELECTRICAL CHARACTERISTICS" table and "PIN FUNCTIONS" section.

Can the LTC2963CUDC-1#TRPBF be used without connecting DVCC?

Yes - grounding the DVCC pin configures both RST and WDO as open-drain outputs pulled up weakly to VCC (6 µA). This is a supported and documented configuration in the "PIN FUNCTIONS" section, which states: "Ground the DVCC pin to configure the RST and WDO as open drain outputs. Do not leave DVCC open." Leaving DVCC unconnected is prohibited.

What is the minimum VCC voltage required for reliable reset assertion in the LTC2963CUDC-1#TRPBF?

The LTC2963CUDC-1#TRPBF guarantees correct RST output state down to VCC = 1 V, as stated in the "DESCRIPTION" section: "The RST output is guaranteed to be in the correct state for VCC input voltage down to 1V." This ensures robust power-on reset assertion even during slow-ramping or brownout conditions.

LTC2963CUDC-1#TRPBF Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: -

Package/Case:: 20-WFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: Multi-Voltage Supervisor

Number of Voltages Monitored:: 4

Voltage - Threshold:: Adjustable/Selectable

Output:: Open-Drain or Push-Pull

Reset:: Active Low

Reset Timeout:: 160ms Minimum

Operating Temperature:: 0°C ~ 70°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 20-QFN (3x4)

LTC2963CUDC-1#TRPBF FAQ

1.How can I place an order for LTC2963CUDC-1#TRPBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC2963CUDC-1#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC2963CUDC-1#TRPBF reliable?

The price and inventory of LTC2963CUDC-1#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC2963CUDC-1#TRPBF is usually 5 days.

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We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC2963CUDC-1#TRPBF transactions.

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4.How is shipping managed for LTC2963CUDC-1#TRPBF?

LTC2963CUDC-1#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC2963CUDC-1#TRPBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC2963CUDC-1#TRPBF?

For technical support, including LTC2963CUDC-1#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC2963CUDC-1#TRPBF requirements.

6.How does Aetrix verify that LTC2963CUDC-1#TRPBF is sourced from the original manufacturer or authorized distributors?

All LTC2963CUDC-1#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC2963CUDC-1#TRPBF meets industry standards.

7.What is the process for return or replacement of LTC2963CUDC-1#TRPBF?

All LTC2963CUDC-1#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC2963CUDC-1#TRPBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC2963CUDC-1#TRPBF part is unused and in its original packaging.

Return procedure for LTC2963CUDC-1#TRPBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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