Analog Devices Inc. LTC3110EUF#TRPBF
- Part No.:
- LTC3110EUF#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Battery Chargers
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LTC3110EUF#TRPBF.pdf
- Description:
- IC BATT CHG SUPERCAP 24QFN
- Quantity:
- Payment:

- Shipping:

Inventory:900
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Product details
Overview
LTC3110EUF#TRPBF from Analog Devices is a 2A bidirectional buck-boost DC/DC regulator with integrated supercapacitor charger and active voltage balancer. It operates across 0.1V–5.5V VCAP and 1.8V–5.25V VSYS ranges, delivers ±1% backup voltage accuracy and ±2% programmable charge current (125mA–2A), and supports autonomous charge-to-backup switchover in server backup and RF system power-fail hold-up applications.
For engineers reviewing the LTC3110EUF#TRPBF datasheet, LTC3110EUF#TRPBF pinout, LTC3110EUF#TRPBF application, or LTC3110EUF#TRPBF equivalent, key selection criteria include bidirectional current capability, VMID-based capacitor balancing, Burst Mode® quiescent current (40µA), shutdown current (<1µA), and compatibility with 4mm × 4mm QFN-24 thermal layout requirements.
Technical Context
The LTC3110EUF#TRPBF implements a proprietary four-switch buck-boost topology with independent control of SW1 (switches A/B) and SW2 (switches C/D), enabling seamless voltage regulation when VCAP is above, below, or equal to VSYS without inductor current discontinuity. Its direction logic is governed by DIR pin hysteresis (1.045V/1.095V thresholds) and mode selection via MODE pin (Burst vs. PWM).
It integrates dual feedback loops: FB for VSYS regulation (0.6V reference) and FBVCAP for end-of-charge control (1.061V/1.095V thresholds), plus an open-collector comparator (CMPIN/CMP OUT) and dedicated balancer output (VMID) with ±300mA balancing current capability at 5V VCAP.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Bidirectional Current | 2A continuous; supports 3.5A DC backup current limit and 6A peak switching capability for transient load handling. |
| VCAP Operating Range | 0.1V to 5.5V; enables direct interface with single/dual supercapacitors or Li-ion/LiFePO₄ batteries without external level-shifting. |
| VSYS Backup Range | 1.8V to 5.25V; regulated with ±1% accuracy over –40°C to 125°C, suitable for FPGA, ASIC, and memory backup rails. |
| Charge Current Accuracy | ±2% programmable range (125mA–2A) via PROG resistor; gain of 200µA/A ensures stable current setting across temperature. |
| Quiescent Current | 40µA in Burst Mode standby; <1µA in shutdown-critical for long-term capacitor self-discharge preservation in always-on systems. |
| Switching Frequency | Fixed 1.2MHz nominal; dynamically folds back below 900kHz at low VCAP/VSYS to maintain stability during brownout conditions. |
| VMID Balancing Current | ±300mA at 5V VCAP; actively equalizes series-connected supercapacitors to prevent overvoltage on individual cells. |
Pinout & Package
Package: 24-lead (4mm × 4mm) plastic QFN with exposed PGND pad (Pin 25), rated for –40°C to 125°C operating junction temperature and θJA = 37°C/W on 4-layer board.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCAP (Pins 19, 20) | Bidirectional energy storage interface | Connects to supercapacitor/battery stack; sinks current in backup mode, sources current in charge mode; supports 0.1V–5.5V operation. |
| VSYS (Pins 10, 12) | System rail input/output | Supplies charge current to VCAP or delivers backup power to system load; requires 47µF bypass capacitor to PGND. |
| SW1 (Pins 17, 18), SW2 (Pins 13, 14) | Internal switch node connections | Drive buck-boost inductor; SW1 connects switches A/B, SW2 connects switches C/D; require short, wide PCB traces to minimize EMI. |
| PROG (Pin 7) | Charge current programming input | Resistor to SGND sets average IVSYS (125mA–2A); 200µA/A gain enables precise, temperature-stable current limiting. |
| DIR (Pin 4) | Mode direction control with hysteresis | Logic-high (>1.095V) enables charging; logic-low (<1.045V) enables backup; hysteresis prevents chatter during transitions. |
| VMID (Pin 21) | Active capacitor balancing output | Drives midpoint of series supercapacitors; regulates VMID to 0.5 × VCAP; suspend function activates if VMID deviates >±120mV. |
| FB (Pin 6) | VSYS feedback input | Resistor divider tap for 1.8V–5.25V VSYS regulation; internal 0.6V reference ensures ±1% output accuracy over full temp range. |
| FBVCAP (Pin 2) | End-of-charge voltage monitor | Programmable threshold (1.061V/1.095V) sets final VCAP voltage; initiates charge foldback and termination sequence. |
| CHRG (Pin 8) | Charge mode status indicator | Open-drain output pulled low during charging; released in backup mode-enables µC monitoring without additional logic. |
| CAPOK (Pin 22) | VCAP voltage OK flag | Pulled low when FBVCAP < falling threshold (1.061V); released when VCAP reaches programmed end-of-charge level. |
| RSEN (Pin 11) | Current sense node | Internal connection to switch D source; used for high-side current sensing; max 1.6A DC current rating. |
| PGND (Pins 15, 16, Exposed Pad 25) | Power ground return | Must be soldered to PCB ground plane; carries high pulsed currents from SW1/SW2; separates high-current paths from SGND. |
| SGND (Pin 3) | Signal ground reference | Reference for FB, FBVCAP, CMPIN, PROG; requires Kelvin connection to analog ground plane, isolated from PGND noise. |
| MODE (Pin 24) | Operation mode select | High = fixed-frequency PWM (low-noise, high-efficiency); Low = Burst Mode® (40µA IQ); no effect in charge mode. |
| RUN (Pin 5) | Enable/shutdown control | ≥1.0V = active; ≤0.3V = shutdown (<1µA IVCAP); internal 6MΩ pull-down ensures safe default state. |
Key Features
| Feature | Design Value |
|---|---|
| Autonomous charge-to-backup switchover | Zero-latency transition triggered by DIR pin or power-fail detection-no µC intervention required for hold-up during AC loss. |
| Integrated VMID-based capacitor balancing | Active linear buffer delivers ±300mA balancing current to enforce 50% VCAP division across series supercaps, eliminating need for passive resistors. |
| Programmable ±2% charge current limit | Set via single PROG resistor (1.5kΩ–24.3kΩ); maintains accuracy over –40°C to 125°C without calibration or trimming. |
| Burst Mode® operation | Reduces no-load IQ to 40µA while maintaining regulation-extends supercapacitor hold-up time by >3× versus PWM mode in light-load backup. |
| Dual independent feedback loops | Separate FB (VSYS) and FBVCAP (VCAP) paths enable simultaneous regulation of system rail and storage voltage with independent accuracy and response. |
| Open-collector general-purpose comparator | CMPIN/CMP OUT provides flexible supervision (e.g., system voltage monitoring) with 0.59V/0.65V thresholds and hysteresis for noise immunity. |
Applications
| Server Power-Fail Hold-Up | RAID Controller Backup |
|---|---|
Use Scenario: Maintains PCIe/NVMe controller operation during 10–100ms AC mains interruption using dual 10F supercapacitors. IC Role / Device Role / Timing Role: Bidirectional buck-boost regulator and charger managing energy flow between 12V bus and VCAP stack; executes sub-100µs mode transition. Use Value: Enables safe flash write completion and cache flush without battery replacement; ±1% VSYS accuracy prevents FPGA configuration corruption. |
Use Scenario: Powers RAID controller memory and NVRAM during unexpected power loss in enterprise storage enclosures. IC Role / Device Role / Timing Role: Provides regulated 3.3V backup rail from supercapacitor bank; uses VMID to balance two 5.5V/10F capacitors in series. Use Value: Eliminates electrolytic capacitor aging concerns; 40µA Burst Mode IQ extends hold-up duration to >30 seconds at 100mA load. |
| RF Transceiver Battery Backup | Industrial PLC Real-Time Clock Hold-Up |
Use Scenario: Sustains LTE/5G baseband processor operation during brief battery swap or primary supply glitch in remote radio units. IC Role / Device Role / Timing Role: Acts as bidirectional charger/balancer for LiFePO₄ cell; regulates 2.8V VSYS rail with ±1% accuracy during backup. Use Value: Prevents call drop or handover failure; programmable 2A charge current enables <15-minute recharge from 12V auxiliary supply. |
Use Scenario: Preserves RTC, SRAM, and configuration registers in programmable logic controllers during factory power brownouts. IC Role / Device Role / Timing Role: Delivers 3.0V backup from single 5.5V/1F supercapacitor; uses DIR pin to auto-detect VSYS collapse and initiate backup. Use Value: Guarantees deterministic 72-hour hold-up at 10µA load; <1µA shutdown current minimizes capacitor self-discharge over years of shelf life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional buck-boost regulator and supercapacitor charger applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX17599ATJ+T | Single-direction (buck-only) controller; requires external MOSFETs and separate balancer IC; no integrated VMID or DIR logic. | Suitable only for charge-only or backup-only systems; cannot autonomously switch modes or balance capacitors. | Select only when discrete FET control, higher voltage (60V) support, or cost-driven BOM simplification outweighs need for integration and bidirectionality. |
| TPS63802DSKR | Unidirectional buck-boost; lacks charge current programming, VCAP supervision, VMID, or DIR-controlled mode switching. | Designed for portable power path management-not for supercapacitor backup or active balancing. | Choose only for low-power (1A), non-critical backup where capacitor balancing and precise charge termination are unnecessary. |
Compared with MAX17599ATJ+T and TPS63802DSKR, the LTC3110EUF#TRPBF uniquely integrates bidirectional energy flow control, programmable charge current, and active capacitor balancing in a single QFN package-eliminating external components and firmware coordination required by alternatives.
Availability
LTC3110EUF#TRPBF is available at Aetrix Electronics and suitable for server power-fail hold-up, RAID controller backup, and RF transceiver battery backup applications requiring stable component supply, long-lifecycle assurance, and qualified industrial-grade thermal performance.
Supply support for LTC3110EUF#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, power management, and industrial systems.
The LTC3110 product line was designed specifically for high-reliability energy buffering in mission-critical backup systems-delivering integrated bidirectional regulation, supercapacitor charging, and active voltage balancing without external support circuitry.
FAQ
What is the maximum continuous current capability of the LTC3110EUF#TRPBF in backup mode?
The LTC3110EUF#TRPBF supports up to 2A continuous output current in backup mode, with a guaranteed DC current limit of 3.5A to 4.5A and peak switching capability of 6A. This enables robust hold-up under dynamic loads in server and storage applications. The actual deliverable current depends on VCAP/VSYS differential, thermal design, and PCB layout-verified per the 4-layer board θJA = 37°C/W specification.
How does the LTC3110EUF#TRPBF implement automatic supercapacitor balancing?
The LTC3110EUF#TRPBF uses its VMID pin as an active linear voltage balancer that regulates the midpoint of two series-connected supercapacitors to exactly half of VCAP. It delivers ±300mA balancing current at 5V VCAP and suspends charging if VMID deviates beyond ±120mV-preventing overvoltage without external resistors or discrete op-amps. This function is enabled automatically during charge mode and disabled in backup mode.
Can the LTC3110EUF#TRPBF operate with a single supercapacitor instead of a series stack?
Yes, the LTC3110EUF#TRPBF fully supports single supercapacitor configurations. In this case, the VMID pin must be bypassed with a 1nF capacitor to PGND per datasheet guidance. All core functions-including bidirectional regulation, charge current programming, end-of-charge termination, and Burst Mode® operation-remain fully operational without modification.
What is the purpose of the RSEN pin on the LTC3110EUF#TRPBF?
The RSEN pin on the LTC3110EUF#TRPBF is the internal current sense node connected to the source of Switch D. It allows high-side current sensing for accurate charge current regulation and overcurrent protection. Unlike typical sense-resistor implementations, RSEN is not externally accessible-it interfaces directly with the internal current limit comparator and requires no external components. Maximum DC current through RSEN is rated at 1.6A.
Does the LTC3110EUF#TRPBF require external compensation components for stability?
No, the LTC3110EUF#TRPBF uses internal compensation for both its VSYS (FB) and VCAP (FBVCAP) feedback loops. The device is optimized for standard ceramic output capacitors (e.g., 47µF at VSYS, 1µF at VCAP) and 1.5µH–2.2µH inductors as shown in the典型 application schematics. External compensation is neither required nor supported-simplifying layout and reducing BOM count.
LTC3110EUF#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Battery Chemistry:
- Supercapacitor
- Number of Cells:
- -
- Current - Charging:
- -
- Programmable Features:
- -
- Fault Protection:
- Over Temperature, Over Voltage
- Charge Current - Max:
- -
- Battery Pack Voltage:
- -
- Voltage - Supply (Max):
- 5.5V
- Interface:
- -
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
LTC3110EUF#TRPBF FAQ
1.How can I place an order for LTC3110EUF#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3110EUF#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3110EUF#TRPBF reliable?
The price and inventory of LTC3110EUF#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3110EUF#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3110EUF#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3110EUF#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3110EUF#TRPBF?
LTC3110EUF#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3110EUF#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3110EUF#TRPBF?
For technical support, including LTC3110EUF#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3110EUF#TRPBF requirements.
6.How does Aetrix verify that LTC3110EUF#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3110EUF#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3110EUF#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3110EUF#TRPBF?
All LTC3110EUF#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3110EUF#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3110EUF#TRPBF part is unused and in its original packaging.
Return procedure for LTC3110EUF#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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