My Inquiry
My Account
Analog Devices Inc. LTC3128IFE#PBF
- Part No.:
- LTC3128IFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3128IFE#PBF.pdf
- Description:
- IC REG BUCK BOOST ADJ 3A 24TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:386
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3128IFE#PBF from Analog Devices (formerly Linear Technology) is a monolithic buck-boost supercapacitor charger IC with accurate average input current limiting, active charge balancing, and programmable maximum capacitor voltage. It operates from 1.73V to 5.5V input, delivers up to 3A input current, regulates output from 1.8V to 5.5V, and supports stacked supercapacitor backup power systems in industrial servers and RAID storage.
For engineers reviewing the LTC3128IFE#PBF datasheet, LTC3128IFE#PBF pinout, LTC3128IFE#PBF application, or LTC3128IFE#PBF equivalent, key selection criteria include its ±2% accurate 0.5–3A programmable input current limit, 1.8–3.0V per-capacitor voltage regulation, active balancing for unmatched capacitors, and thermally enhanced 24-lead TSSOP package with exposed pad.
Technical Context
The LTC3128IFE#PBF implements a proprietary fixed-frequency (1.2 MHz typical) buck-boost switching algorithm enabling seamless mode transitions between buck, boost, and buck-boost without discontinuity in inductor current or loop dynamics. Its dual-loop control includes a hysteretic voltage loop for sleep-state entry at regulation and an internally compensated average input current loop referenced to a 50 mΩ internal sense resistor.
It integrates four N-channel and two P-channel MOSFETs (RDS(ON) 40–95 mΩ), a zero-current comparator to prevent reverse inductor current, thermal regulation that reduces current limit above 135°C, and dedicated comparators for power-good (96.75% FB threshold), power-fail (0.58 V reference), and maximum capacitor voltage (programmable via MAXV pin).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 1.73 V to 5.5 V - supports single-cell Li-ion, USB, or wide-input industrial rails without external LDO pre-regulation. |
| VOUT Range | 1.8 V to 5.5 V - configurable via FB divider; enables direct charging of 2.5 V, 3.3 V, or 5 V supercapacitor stacks. |
| Avg Input Current Limit | 0.5 A to 3.0 A (±2%) - set by single PROG resistor; maintains precise source loading during backup power charging. |
| Max Cap Voltage | 1.8 V to 3.0 V per capacitor - programmed via MAXV resistor; prevents overvoltage stress on individual cells in stacked configurations. |
| Switching Frequency | 1.2 MHz typical - enables compact 3.3 µH inductor and low-profile ceramic output capacitors. |
| Quiescent Current | <2 µA from VOUT in Burst Mode - extends hold-up time in battery-backed or energy-harvesting systems. |
| Thermal Shutdown | 165 °C (typical) - protects against sustained overload; auto-restarts at ~155 °C after die cooling. |
Pinout & Package
Package: 24-Lead Plastic TSSOP (FE), 4 mm × 8.65 mm × 1.1 mm, exposed thermal pad (Pin 25, GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SW1 (Pins 1, 4) | Switch node A/B connection | Connects internal high-side N-MOSFET (A) and low-side N-MOSFET (B); ties to one end of power inductor. |
| RSENP (Pin 5) | Sense resistor power output | High-current return path for external system loads sharing input source; requires local ≥10 µF ceramic decoupling. |
| RSENS (Pin 6) | Sense resistor signal input | Measures voltage drop across internal 50 mΩ sense resistor; must be short/wide trace to RSENP for accuracy. |
| RUN (Pin 7) | Logic-controlled enable | Active-high shutdown control: ≥1.2 V = normal operation; ≤0.3 V = full shutdown (<1 µA IQ). |
| PROG (Pin 8) | Input current limit programming | Sets average IIN via resistor to GND (RPROG = 11 kΩ/A); includes capacitor for noise filtering. |
| VIN (Pin 11) | Main input supply | Primary power input and internal VCC rail; requires local ≥10 µF ceramic decoupling to GND. |
| PFO (Pin 13) | Power fail open-drain output | Sinks current when monitored supply (via PFI) falls below programmed threshold; compatible with 3.3 V/5 V logic. |
| PFI (Pin 14) | Power fail monitor input | Accepts resistive divider from monitored rail; 0.58 V internal reference enables adjustable undervoltage detection. |
| MAXV (Pin 15) | Max capacitor voltage programming | Sets per-capacitor overvoltage limit (1.8–3.0 V) via resistor to GND; disables balancer if tied to GND. |
| FB (Pin 16) | Output voltage feedback | 0.58 V reference input; configures VOUT via resistor divider (1.8–5.5 V range); enables single-capacitor operation. |
| PGOOD (Pin 17) | Power-good open-drain output | Pulls low when VOUT drops below 96.75% of programmed value; provides system-level power status signaling. |
| MID (Pin 18) | Active balancer mid-point sense | Connects to junction of stacked capacitors; enables charge redistribution when imbalance exceeds 60 mV. |
| VOUTS (Pin 19) | Output voltage sense | Remote sensing point for VOUT; minimizes IR drop error in high-current paths. |
| VOUTP (Pins 20, 21) | Synchronous rectifier output | High-current output node; connects directly to output filter capacitor bank (e.g., 940 mF total). |
| SW2 (Pins 23, 24) | Switch node C/D connection | Connects internal low-side N-MOSFET (C) and high-side N-MOSFET (D); ties to other end of power inductor. |
| GND (Pins 2, 3, 12, 25) | Ground reference | Signal and power ground; exposed pad (Pin 25) must be soldered to PCB thermal plane for θJA = 38 °C/W. |
Key Features
| Feature | Design Value |
|---|---|
| Accurate average input current limit | ±2% tolerance over temperature; enables predictable source loading in energy-constrained backup systems. |
| Active charge balancing | 60 mV imbalance threshold; moves charge bidirectionally using main power inductor - eliminates need for lossy passive resistors. |
| Programmable per-capacitor voltage limit | 1.8–3.0 V range set by single resistor; prevents overstress in mismatched supercapacitor stacks. |
| Burst Mode® operation | <2 µA VOUT quiescent current; extends hold-up duration in ultra-low-power memory backup applications. |
| Integrated power monitoring | Dedicated PGOOD and PFO comparators with hysteresis; provides reliable system-level power status without external components. |
Applications
| Industrial Backup Power | RAID Controller Hold-Up |
|---|---|
Use Scenario: Maintaining volatile cache and configuration data during AC mains failure in programmable logic controllers and HMIs. IC Role / Device Role / Timing Role: Buck-boost supercapacitor charger with active balancing ensures rapid, safe charging of 2×2.7 V supercaps for 10–30 s hold-up. Use Value: Eliminates battery replacement cycles and enables maintenance-free operation in sealed enclosures with wide temperature range (-40°C to 125°C). | Use Scenario: Preserving write-cached data in enterprise storage arrays during unexpected power loss. IC Role / Device Role / Timing Role: Charges stacked supercapacitors to 5.4 V while enforcing 2.7 V/cell limit and balancing leakage mismatches. Use Value: Guarantees deterministic 100 ms+ data flush window with no voltage droop-induced corruption, even with aging capacitors. |
| Memory Backup for Real-Time Clocks | RF Transceiver Energy Buffering |
Use Scenario: Providing continuous power to RTC and SRAM in base stations and edge gateways during brownouts. IC Role / Device Role / Timing Role: Low-quiescent-current charger maintaining 3.3 V rail from single 3.3 V supercapacitor with FB-programmed regulation. Use Value: Achieves <1 µA shutdown IQ and <2 µA sleep IQ - extends backup runtime beyond 72 hours on 1 F capacitance. | Use Scenario: Supplying burst power for LTE/5G PA ramp-up in small-cell radios where primary supply has limited peak current capability. IC Role / Device Role / Timing Role: Fast-charging 1 F stack from 3.6 V Li-ion to 4.2 V with 3 A input limit and active balancing for cycle longevity. Use Value: Delivers 2.5 A transient current within 100 µs of demand, reducing required primary supply headroom by 40%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar supercapacitor charger applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3129IFE#PBF | Higher 4 A max input current; adds I2C interface for dynamic current/voltage programming; same 24-lead TSSOP package. | Required for systems needing real-time reconfiguration (e.g., adaptive hold-up time based on load profile). | Select LTC3129IFE#PBF when firmware-controlled parameter adjustment or >3 A charging is needed; otherwise LTC3128IFE#PBF offers lower cost and simpler resistor-based setup. |
| TPS65218D0RSLR | Multi-rail PMIC with integrated 2 A supercapacitor charger; fixed 2.5 V/3.3 V outputs; 48-pin VQFN; no active balancing or per-cell voltage limit. | Suitable for cost-sensitive consumer devices with single-rail requirements and no stacked-capacitor topology. | Choose TPS65218D0RSLR only for compact, low-complexity designs where stacking and balancing are unnecessary; LTC3128IFE#PBF remains superior for industrial reliability-critical backup. |
Compared with LTC3129IFE#PBF and TPS65218D0RSLR, the LTC3128IFE#PBF delivers optimal balance of precision analog control (±2% IIN, 60 mV balancing threshold), minimal external components, and proven thermal robustness in 24-lead TSSOP - making it the preferred choice for fixed-parameter, high-reliability supercapacitor backup systems.
Availability
LTC3128IFE#PBF is available at Aetrix Electronics and suitable for industrial servers, RAID storage subsystems, and communications infrastructure requiring stable component supply with guaranteed long-term availability and full traceability.
Supply support for LTC3128IFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, formed through the acquisition of Linear Technology in 2017.
The LTC3128 belongs to ADI's Power by Linear™ supercapacitor charger product line, engineered specifically for high-efficiency, high-reliability backup power systems where precise current limiting, cell balancing, and extended temperature operation are critical.
FAQ
What is the operating temperature range for the LTC3128IFE#PBF?
The LTC3128IFE#PBF is specified for –40°C to +125°C junction temperature operation and is guaranteed across this full range. Its 24-lead TSSOP package features an exposed thermal pad (Pin 25) that must be soldered to the PCB ground plane to achieve the rated θJA of 38°C/W, ensuring reliable performance in industrial environments. The "I" grade designation confirms this extended temperature qualification.
How does the LTC3128IFE#PBF implement active charge balancing for stacked supercapacitors?
The LTC3128IFE#PBF uses its internal power switches and main inductor to actively transfer charge between stacked capacitors. When the voltage difference at the MID pin exceeds 60 mV, it modulates switches C and D to either boost charge from the bottom capacitor or buck charge from the top capacitor. This bidirectional inductor-based method achieves efficient balancing without external resistors, and the LTC3128IFE#PBF disables balancing if MAXV is grounded for single-capacitor use.
Can the LTC3128IFE#PBF charge a single supercapacitor, or is it only for stacked configurations?
Yes, the LTC3128IFE#PBF fully supports single supercapacitor charging. In that case, tie the MAXV pin to GND to disable the per-cell voltage comparator and active balancer, and configure the output voltage using the FB pin with a resistor divider (1.8 V to 5.5 V range). The MID pin must also be grounded. The LTC3128IFE#PBF then operates as a standard buck-boost charger with accurate input current limiting and low-quiescent-power sleep mode.
What is the purpose of the RSENP and RSENS pins on the LTC3128IFE#PBF?
RSENP is the high-current power return path for external system loads sharing the same input source as the LTC3128IFE#PBF, allowing coordinated current limiting. RSENS is the low-impedance signal input that senses the voltage drop across the internal 50 mΩ sense resistor. These pins enable the LTC3128IFE#PBF to accurately regulate total input current drawn by both itself and attached loads - critical for USB-powered or current-limited backup systems.
Does the LTC3128IFE#PBF require external compensation components for stability?
No, the LTC3128IFE#PBF features internally compensated control loops. The voltage loop and average input current loop are factory-tuned for stability with standard external components (e.g., 3.3 µH inductor, 10 µF input/output ceramics). Only the PROG pin requires an external RC network (resistor + capacitor) for noise filtering - values are calculated as RPROG = 11 kΩ/A and CPROG ≈ 1600 pF / RPROG(kΩ). No additional compensation network is needed.
LTC3128IFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck-Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 1.73V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.8V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 3A
- Frequency - Switching:
- 1.2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
LTC3128IFE#PBF FAQ
1.How can I place an order for LTC3128IFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3128IFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3128IFE#PBF reliable?
The price and inventory of LTC3128IFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3128IFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3128IFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3128IFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3128IFE#PBF?
LTC3128IFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3128IFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3128IFE#PBF?
For technical support, including LTC3128IFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3128IFE#PBF requirements.
6.How does Aetrix verify that LTC3128IFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3128IFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3128IFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3128IFE#PBF?
All LTC3128IFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3128IFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3128IFE#PBF part is unused and in its original packaging.
Return procedure for LTC3128IFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3128IFE#PBF Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
