Analog Devices Inc. LTC3260IDE#TRPBF
- Part No.:
- LTC3260IDE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 14-WFDFN Exposed Pad
- Datasheet:
-
LTC3260IDE#TRPBF.pdf
- Description:
- IC REG CHARGE PUMP INV 14DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3260IDE#TRPBF from Analog Devices is a low-noise dual-polarity power supply IC integrating an inverting charge pump (–VIN or –0.94•VIN), a positive LDO+ (up to 50mA, adjustable 1.2V–32V), and a negative LDO– (up to 50mA, adjustable –1.2V to –32V), all operating from a single 4.5V–32V input. It delivers ±12V outputs from 15V input in instrumentation-grade bias supplies with <100µVRMS output noise and 100µA quiescent current in Burst Mode.
For engineers reviewing the LTC3260IDE#TRPBF datasheet, LTC3260IDE#TRPBF pinout, LTC3260IDE#TRPBF application, or LTC3260IDE#TRPBF equivalent, key selection criteria include bipolar LDO noise rejection of VOUT ripple, programmable 50kHz–500kHz oscillator frequency via RT pin, thermal protection, ceramic-capacitor stability, and AEC-Q100 qualification for automotive sensor biasing.
Technical Context
The LTC3260IDE#TRPBF implements a two-stage architecture: a wide-input inverting charge pump (4.5V–32V) feeding a negative LDO–, while VIN directly powers the positive LDO+. Its dual-mode operation-Burst Mode (100µA IQ, –0.94•VIN regulation) and constant-frequency mode (50kHz–500kHz, –VIN inversion)-enables trade-offs between ultra-low power and low-ripple performance.
Each LDO features independent enable logic (EN+, EN–), adjustable output via precision ±1.2V references (ADJ+/ADJ–), and dedicated reference bypass pins (BYP+/BYP–) supporting 10nF capacitors to reduce output noise to 100µVRMS. The charge pump's effective open-loop resistance (ROL) scales inversely with oscillator frequency and flying capacitor value, directly impacting maximum deliverable load current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 4.5V to 32V - supports industrial rails (12V, 24V) and wide-input battery systems without pre-regulation. |
| Charge Pump Output | –VIN (constant freq.) or –0.94•VIN (Burst Mode) - enables precise bipolar rail generation with minimal external components. |
| LDO+ Output Current | Up to 50mA - sufficient for powering op-amps, ADC references, and low-power microcontrollers. |
| LDO– Output Current | Up to 50mA - powered from VOUT, enabling clean negative bias for precision analog front-ends. |
| Quiescent Current | 100µA with both LDOs on (Burst Mode) - extends battery life in portable medical instruments. |
| Oscillator Frequency | Programmable 50kHz–500kHz via RT resistor - allows EMI optimization and ripple/noise trade-off tuning. |
| Output Noise | 100µVRMS (with 10nF BYP+ and BYP– caps) - meets low-noise requirements for high-resolution data acquisition. |
| Package | 14-pin 3mm × 4mm DFN (0.75mm height) - compact footprint with exposed GND pad for thermal management. |
Pinout & Package
Package: 14-lead (4mm × 3mm) plastic DFN with exposed GND pad (Pin 15), 0.75mm profile, θJA = 43°C/W. Exposed pad must be soldered to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN+ | Positive LDO enable input | Logic-high enables LDO+; soft-start limits inrush current over 75µs. |
| RT | Oscillator frequency programming node | Resistor to GND sets fOSC (50–500kHz); 0Ω → 500kHz default. |
| BYP– | LDO– reference bypass | 10nF cap to GND reduces LDO– output noise by filtering internal –1.2V reference. |
| ADJ– | LDO– feedback input | Serves at –1.2V; sets VLDO– = –1.2V × (R1/R2 + 1) via external divider. |
| LDO– | Negative LDO output | Requires ≥2µF low-ESR ceramic cap to GND for stability; max 50mA sink. |
| VOUT | Charge pump output | Drives LDO–; regulated to –VIN (constant freq.) or –0.94•VIN (Burst Mode). |
| C– / C+ | Flying capacitor terminals | Switch high-current charge transfer; require short, low-inductance routing. |
| VIN | Main input supply | Powers LDO+ and charge pump; requires ≥2µF low-ESR ceramic bypass. |
| LDO+ | Positive LDO output | Requires ≥2µF low-ESR ceramic cap to GND; max 50mA source. |
| EN– | Charge pump & LDO– enable | Logic-high activates charge pump and LDO–; initiates soft-start sequence. |
| MODE | Operating mode select | High = Burst Mode (low IQ); Low = constant frequency (low ripple). |
| ADJ+ | LDO+ feedback input | Serves at +1.2V; sets VLDO+ = 1.2V × (R1/R2 + 1) via external divider. |
| BYP+ | LDO+ reference bypass | 10nF cap to GND reduces LDO+ output noise by filtering internal +1.2V reference. |
| GND | Ground reference & thermal path | Exposed pad (Pin 15) is system GND; mandatory solder connection for thermal performance. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent LDO regulation | Separate EN+, EN– and ADJ+/ADJ– pins allow asynchronous start-up and independent voltage programming for asymmetric ±VOUT needs. |
| Ultra-low-noise bipolar output | 100µVRMS noise (with BYP+ and BYP– caps) and LDO rejection of VOUT ripple enable high-fidelity analog signal chains. |
| Configurable efficiency/noise trade-off | Selectable Burst Mode (100µA IQ) or constant-frequency (50–500kHz) operation optimizes for battery life or spectral purity. |
| Robust protection suite | Integrated short-circuit current limiting (160mA typ.), thermal shutdown (>175°C), and UVLO (3.4V–4.0V) ensure reliable operation under fault conditions. |
| Ceramic-capacitor compatibility | Stable with ≥2µF low-ESR ceramics on all outputs; eliminates need for bulky tantalum or electrolytic capacitors. |
| AEC-Q100 qualified variants | Industrial temperature grade (–40°C to 125°C) and automotive-grade versions available for mission-critical biasing applications. |
Applications
| Portable Medical Ultrasound Front-End | High-Resolution Data Acquisition System |
|---|---|
Use Scenario: Powering low-noise transimpedance amplifiers and 24-bit sigma-delta ADCs in handheld ultrasound probes. IC Role / Device Role / Timing Role: LTC3260IDE#TRPBF generates ultra-clean ±12V analog supply rails from a single 15V Li-ion battery pack. Use Value: 100µVRMS noise and LDO rejection of VOUT ripple preserve SNR >110dB in sensitive analog signal paths. | Use Scenario: Biasing precision op-amps and reference buffers in benchtop multimeters and calibration equipment. IC Role / Device Role / Timing Role: LTC3260IDE#TRPBF provides stable, adjustable ±5V/±10V rails with independent enable control for modular subsystem power sequencing. Use Value: Programmable 50kHz–500kHz oscillator allows EMI filtering below critical measurement bands while maintaining <0.03mV/mA load regulation. |
| Automotive Radar Signal Conditioning | Industrial Process Control Sensor Interface |
Use Scenario: Supplying low-noise bias to RF mixers and IF amplifiers in 77GHz radar modules operating in engine compartments. IC Role / Device Role / Timing Role: LTC3260IDE#TRPBF delivers ±12V from 12V vehicle battery with AEC-Q100-compliant thermal robustness and UVLO protection. Use Value: –40°C to 125°C operation, thermal shutdown (>175°C), and 43°C/W θJA enable reliable performance in thermally constrained enclosures. | Use Scenario: Powering isolated analog input channels in PLC analog I/O modules interfacing with 4–20mA sensors. IC Role / Device Role / Timing Role: LTC3260IDE#TRPBF generates isolated ±15V rails for op-amp-based current loop receivers and voltage references. Use Value: Dual LDO independence allows staggered power-up to avoid inrush current peaks during cold start in distributed control systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-polarity regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX1044CSA+ | Ideal diode-based charge pump only (no integrated LDOs); fixed –VIN output; no programmable frequency or Burst Mode. | Requires external regulators for low-noise ±VOUT; suitable only where LDO post-regulation is unnecessary. | Select MAX1044CSA+ only when cost-sensitive designs can tolerate higher output ripple and lack LDO noise suppression. |
| TPS60403DBVR | Single-output inverting charge pump (–VIN only); no negative LDO; 60mA output; fixed 500kHz switching. | Cannot generate independent positive/negative rails; lacks LDO– stage and ADJ–/BYP– noise reduction capability. | Choose TPS60403DBVR only for simple inverted-rail generation where bipolar LDO regulation is not required. |
Compared with MAX1044CSA+ and TPS60403DBVR, the LTC3260IDE#TRPBF uniquely integrates dual LDOs with programmable noise-performance modes, making it the only option capable of delivering independently regulated, ultra-low-noise ±VOUT from a single input without external regulators.
Availability
LTC3260IDE#TRPBF is available at Aetrix Electronics and suitable for portable medical equipment, industrial instrumentation, and automotive radar signal conditioning requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC3260IDE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and automotive markets.
The LTC3260IDE#TRPBF belongs to Analog Devices' µPower DC/DC converter product line, designed specifically for low-noise, bipolar bias generation in high-fidelity analog signal chains where EMI sensitivity and power efficiency are critical.
FAQ
What is the maximum output current capability of the LTC3260IDE#TRPBF's LDO+ and LDO– regulators?
The LTC3260IDE#TRPBF supports up to 50mA output current from both its positive LDO+ and negative LDO– regulators. Each LDO is independently rated: ILDO+ ≤ 50mA (source), ILDO– ≤ 50mA (sink). These ratings assume proper thermal management and use of ≥2µF low-ESR ceramic output capacitors. Exceeding 50mA may trigger current limiting or thermal shutdown.
How does the MODE pin affect the operation of the LTC3260IDE#TRPBF?
The MODE pin selects between two distinct charge pump operating modes in the LTC3260IDE#TRPBF: logic high enables Burst Mode (regulating VOUT to –0.94•VIN with ~100µA quiescent current), while logic low enables constant-frequency mode (inverting to –VIN at 50kHz–500kHz). This pin does not affect LDO regulation but determines charge pump efficiency versus ripple trade-offs.
Can the LTC3260IDE#TRPBF generate non-symmetric output voltages such as +5V and –12V?
Yes, the LTC3260IDE#TRPBF supports independent adjustment of LDO+ and LDO– outputs. VLDO+ is set by a resistor divider from LDO+ to ADJ+ to GND using the +1.2V reference; VLDO– is set similarly using the –1.2V reference at ADJ–. This allows asymmetric configurations like +5V/–12V, provided each LDO remains within its absolute voltage range (LDO+: 1.2V–32V; LDO–: –32V to –1.2V).
What is the purpose of the BYP+ and BYP– pins on the LTC3260IDE#TRPBF?
The BYP+ and BYP– pins on the LTC3260IDE#TRPBF provide dedicated bypass connections for the internal +1.2V and –1.2V reference voltages. Connecting a 10nF capacitor from each pin to GND significantly reduces output voltage noise - down to 100µVRMS - by filtering reference noise before it propagates into LDO regulation loops.
Does the LTC3260IDE#TRPBF require external compensation components for stability?
No, the LTC3260IDE#TRPBF is internally compensated and stable with standard ceramic output capacitors. It requires only ≥2µF low-ESR ceramic capacitors on LDO+ and LDO– outputs (and recommended 10µF on VOUT and VIN) - no external compensation networks, resistors, or capacitors are needed for loop stability across its full operating range.
LTC3260IDE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 14-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Charge Pump
- Number of Outputs:
- 1
- Frequency - Switching:
- 50kHz ~ 500kHz
- Voltage/Current - Output 1:
- Adj, 100mA
- Voltage/Current - Output 2:
- -
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 4.5V ~ 32V
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-DFN (4x3)
LTC3260IDE#TRPBF FAQ
1.How can I place an order for LTC3260IDE#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3260IDE#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3260IDE#TRPBF reliable?
The price and inventory of LTC3260IDE#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3260IDE#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3260IDE#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3260IDE#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3260IDE#TRPBF?
LTC3260IDE#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3260IDE#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3260IDE#TRPBF?
For technical support, including LTC3260IDE#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3260IDE#TRPBF requirements.
6.How does Aetrix verify that LTC3260IDE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3260IDE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3260IDE#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3260IDE#TRPBF?
All LTC3260IDE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3260IDE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3260IDE#TRPBF part is unused and in its original packaging.
Return procedure for LTC3260IDE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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