Analog Devices Inc. LTC3265EDHC#TRPBF

Overview

LTC3265EDHC#TRPBF from Analog Devices (formerly Linear Technology) is a low-noise dual-polarity power supply IC integrating a boost charge pump, inverting charge pump, and two post-regulating LDOs - delivering ±15V outputs from a single 12V input with <100µVRMS output noise. It supports up to 50mA per LDO, operates across –40°C to 125°C, and features programmable 50kHz–500kHz switching frequency for instrumentation-grade bias generation in precision analog systems.

For engineers reviewing the LTC3265EDHC#TRPBF datasheet, LTC3265EDHC#TRPBF pinout, LTC3265EDHC#TRPBF application, or LTC3265EDHC#TRPBF equivalent, key selection criteria include bipolar LDO current capability (±50mA), Burst Mode quiescent current (135µA), VOUT± ripple rejection performance, and DFN-18 package thermal design with exposed GND pad soldering requirement.

Technical Context

The LTC3265EDHC#TRPBF implements a two-stage architecture: first, charge pumps generate intermediate rails (VOUT+ = 2•VIN_P or 0.94•2•VIN_P; VOUT– = –VIN_N or –0.94•VIN_N), then independent positive/negative LDOs regulate those rails to user-adjustable outputs. Each LDO uses internal 1.2V/–1.2V references with external resistor dividers for voltage programming.

Operation mode is controlled by the MODE pin: high enables Burst Mode (hysteretic regulation, 135µA IQ) for ultra-low-power light-load operation; low enables constant-frequency mode (50–500kHz via RT resistor) for lower ripple and higher load stability. EN+ and EN– independently enable boost/inverting paths and their respective LDOs.

Key Specifications

Pinout & Package

Package: 18-lead (5mm × 3mm × 0.75mm) plastic DFN with exposed GND pad (Pin 19), rated θJA = 42°C/W. Exposed pad must be soldered to PCB ground plane for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-polarity regulator applications.

Compared with MAX1759EUB+T and LT3467EDD#TRPBF, the LTC3265EDHC#TRPBF uniquely integrates complete bipolar regulation - including boost, inversion, and dual LDOs - in one 5×3mm DFN, enabling compact, low-noise, low-IQ designs impossible with either alternative alone.

Availability

LTC3265EDHC#TRPBF is available at Aetrix Electronics and suitable for high-precision data acquisition systems, portable medical instrumentation, and industrial process control transmitters requiring stable component supply across extended temperature ranges (–40°C to 125°C).

Supply support for LTC3265EDHC#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices acquired Linear Technology in 2017 and maintains its legacy of high-performance analog ICs, particularly in power management and precision signal conditioning.

The LTC3265EDHC#TRPBF belongs to Linear's low-noise power management portfolio, designed specifically for instrumentation, medical, and test equipment requiring clean, bipolar, and highly configurable supply rails.

FAQ

What is the maximum allowable input voltage on the VIN_N pin of the LTC3265EDHC#TRPBF?

The LTC3265EDHC#TRPBF supports an absolute maximum VIN_N voltage of 36V, with recommended operating range from 4.5V to 32V. Exceeding 32V may degrade long-term reliability or trigger overvoltage protection. When VIN_N is tied to VOUT+, the resulting VOUT– becomes –VOUT+, enabling symmetric ±15V outputs from a 12V input - a key configuration used in the LTC3265EDHC#TRPBF typical application circuit.

How does the MODE pin affect the output voltage accuracy of the LTC3265EDHC#TRPBF?

When MODE = high (Burst Mode), the LTC3265EDHC#TRPBF regulates VOUT+ to 0.94 × 2 × VIN_P and VOUT– to –0.94 × VIN_N, introducing a fixed 6% scaling error relative to ideal doubling/inversion. In constant-frequency mode (MODE = low), VOUT+ = 2 × VIN_P and VOUT– = –VIN_N - achieving exact ratios. This difference directly impacts LDO output accuracy since LDO+ and LDO– regulate from these intermediate rails; thus, the LTC3265EDHC#TRPBF's final output precision depends on MODE selection and VIN tolerance.

Can the LTC3265EDHC#TRPBF operate with only one LDO enabled?

Yes - the LTC3265EDHC#TRPBF supports independent enable control: EN+ activates the boost pump and LDO+, while EN– activates the inverting pump and LDO–. Either can be held low to disable its respective rail without affecting the other. For example, holding EN– low disables VOUT– and LDO–, leaving only positive rail operation active. This feature enables flexible power sequencing and partial-system shutdown, making the LTC3265EDHC#TRPBF suitable for mixed-signal systems where analog sections require different supply states.

What is the purpose of the BYP+ and BYP– pins on the LTC3265EDHC#TRPBF?

The BYP+ and BYP– pins on the LTC3265EDHC#TRPBF provide access to the internal 1.2V and –1.2V reference nodes for the LDO+ and LDO– regulators. Connecting a 100nF capacitor from BYP+ to GND or BYP– to GND bypasses the reference, reducing output voltage noise to 100µVRMS. If unused, these pins must be left floating - connecting them directly to GND or other voltages will disrupt regulation. This noise-reduction mechanism is a key differentiator of the LTC3265EDHC#TRPBF in precision analog applications.

Does the LTC3265EDHC#TRPBF require external compensation components for LDO stability?

No - the LTC3265EDHC#TRPBF LDOs are internally compensated and stable with ≥2µF low-ESR ceramic output capacitors. The datasheet specifies no external compensation network is needed. However, an optional 10pF capacitor (COPT) between ADJ+ and GND (or ADJ– and GND) can improve transient response for fast load steps. This simplifies design and eliminates tuning effort - a core advantage of the LTC3265EDHC#TRPBF versus discrete LDO solutions requiring external compensation networks.