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Analog Devices Inc. LTC3265EFE#TRPBF
- Part No.:
- LTC3265EFE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3265EFE#TRPBF.pdf
- Description:
- IC REG CHARG PUMP INV DL 20TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,445
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Product details
Overview
LTC3265EFE#TRPBF from Analog Devices (formerly Linear Technology) is a low-noise dual-polarity power supply IC integrating a boost charge pump, inverting charge pump, and two post-regulating LDOs - delivering ±15V outputs from a single 12V input. It supports up to 50mA per LDO, operates with ceramic capacitors only, and features programmable 50kHz–500kHz switching frequency and 135µA quiescent current in Burst Mode® with both LDOs active.
For engineers reviewing the LTC3265EFE#TRPBF datasheet, LTC3265EFE#TRPBF pinout, LTC3265EFE#TRPBF application, or LTC3265EFE#TRPBF equivalent, key selection criteria include bipolar output noise performance (100µVRMS), dual independent enable/control logic (EN+, EN–), MODE-selectable operation (Burst vs constant-frequency), and thermal-enhanced 20-lead TSSOP packaging for industrial instrumentation and precision analog biasing.
Technical Context
The LTC3265EFE#TRPBF implements two independent charge pump topologies: a boost converter (VIN_P → VOUT+ = 2×VIN_P or 0.94×2×VIN_P) and an inverting converter (VIN_N → VOUT– = –VIN_N or –0.94×VIN_N), each feeding a dedicated low-noise LDO (LDO+, LDO–). The MODE pin selects between low-quiescent Burst Mode® (hysteretic regulation) and fixed-frequency operation (50–500kHz via RT resistor).
Each LDO uses external resistor dividers for adjustable output (±1.2V to ±32V), with ADJ+/ADJ– pins referenced to precise ±1.200V internal references (±2.4mV tolerance). Soft-start circuitry ramps LDO regulation over 75µs, and built-in short-circuit protection limits VOUT+ to 220mA and VOUT– to 160mA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN_P Range | 4.5V to 16V - defines minimum system input for positive rail generation; requires ≥4.5V to avoid UVLO shutdown. |
| VIN_N Range | 4.5V to 32V - enables wide-range negative rail sourcing; supports asymmetric configurations (e.g., VIN_N = VIN_P or VIN_N = VOUT+). |
| LDO Output Current | ±50mA - maximum continuous load per regulator; sufficient for op-amp biasing, ADC/DAC reference supplies, and sensor excitation. |
| Quiescent Current (Burst) | 135µA with both LDOs on - enables ultra-low-power operation in battery-backed or always-on instrumentation systems. |
| Oscillator Frequency | 50kHz to 500kHz (RT-programmable) - higher frequencies reduce effective output impedance (ROL) and improve transient response. |
| LDO Output Noise | 100µVRMS (with 100nF BYP+/- caps) - meets stringent requirements for precision analog signal chains and low-phase-noise clock buffers. |
| Dropout Voltage | 400–800mV (LDO+), 200–500mV (LDO–) at full load - determines minimum headroom needed between charge pump output and regulated rail. |
Pinout & Package
Package: 20-lead plastic TSSOP (FE package), 4.4mm × 6.5mm × 1.1mm, exposed thermal pad (Pin 21 = GND), θJA = 38°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (NC) | No Connect | Unbonded die pad; must be left floating or grounded - no electrical function. |
| 2 (CBST–) | Boost Pump Flying Cap (–) | Connects to negative terminal of flying capacitor; critical for charge transfer timing and efficiency. |
| 3 (CBST+) | Boost Pump Flying Cap (+) | Connects to positive terminal of flying capacitor; forms charge-transfer path with CBST–. |
| 4 (VIN_P) | Boost Pump Input Supply | Main input for positive rail generation; must be bypassed with ≥10µF ceramic capacitor. |
| 5 (EN–) | Negative Rail Enable | Logic-high enables inverting pump and LDO–; internal 0.7µA pull-down prevents floating. |
| 6 (BYP–) | LDO– Reference Bypass | Connect 100nF cap to GND to reduce LDO– output noise; floating if unused. |
| 7 (ADJ–) | LDO– Feedback Input | Serves as inverting amplifier input referenced to –1.200V; sets output voltage via external resistor divider. |
| 8 (LDO–) | Negative Regulated Output | Delivers stable negative voltage (–1.2V to –32V); requires ≥2µF low-ESR ceramic capacitor to GND for stability. |
| 9 (VOUT–) | Inverting Pump Output | Feeds LDO–; regulated to –VIN_N (constant freq.) or –0.94×VIN_N (Burst Mode). |
| 10 (CINV–) | Inverting Pump Flying Cap (+) | Positive terminal connection for inverting pump flying capacitor. |
| 12 (RT) | Oscillator Frequency Set | 1.2V-referenced input; resistor to GND programs 50–500kHz switching frequency (GND = 500kHz default). |
| 15 (EN+) | Positive Rail Enable | Logic-high enables boost pump and LDO+; internal 0.7µA pull-down ensures defined state. |
| 16 (MODE) | Operation Mode Select | High = Burst Mode® (low IQ, higher ripple); Low = constant-frequency (lower ripple, higher IQ). |
| 17 (BYP+) | LDO+ Reference Bypass | Connect 100nF cap to GND to reduce LDO+ output noise; floating if unused. |
| 18 (ADJ+) | LDO+ Feedback Input | Serves as non-inverting amplifier input referenced to +1.200V; sets output voltage via external resistor divider. |
| 19 (LDO+) | Positive Regulated Output | Delivers stable positive voltage (1.2V to 32V); requires ≥2µF low-ESR ceramic capacitor to GND for stability. |
| 20 (VOUT+) | Boost Pump Output | Feeds LDO+; regulated to 2×VIN_P (constant freq.) or 0.94×2×VIN_P (Burst Mode). |
| 21 (GND) | Ground / Thermal Pad | Exposed pad - must be soldered to PCB ground plane for thermal performance (θJA = 38°C/W) and functional integrity. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable control (EN+, EN–) | Enables selective activation of positive/negative rails - critical for power sequencing in mixed-signal systems. |
| Burst Mode® with 135µA IQ (both LDOs on) | Reduces standby power in always-on instrumentation without compromising startup time or regulation accuracy. |
| Programmable 50–500kHz oscillator (RT pin) | Allows optimization of EMI profile, efficiency, and transient response - e.g., 500kHz minimizes ROL for fast load steps. |
| ±100µVRMS LDO output noise (with BYP caps) | Meets noise-sensitive applications like high-resolution SAR ADC references and low-distortion audio preamps. |
| Soft-start (75µs ramp) on LDO+ and LDO– | Prevents inrush current into downstream capacitance - avoids brownout during power-up of multi-rail systems. |
| Short-circuit protection (220mA/160mA limits) | Protects against accidental shorts on ±VOUT without latch-up - supports robust field-deployed instrumentation. |
Applications
| Industrial Precision Instrumentation | Low-Noise Bipolar Op-Amp Biasing |
|---|---|
Use Scenario: High-accuracy digital multimeters and portable oscilloscopes requiring stable, low-noise ±15V rails for front-end amplifiers and ADC drivers. IC Role / Device Role / Timing Role: Dual-polarity power supply IC generating clean, sequenced ±15V from a single 12V battery or DC bus. Use Value: 100µVRMS LDO noise and soft-start prevent measurement offset drift and ensure repeatable calibration across temperature. |
Use Scenario: Precision instrumentation-grade op-amps (e.g., LT1028, ADA4898) needing matched ±15V supplies with minimal PSRR coupling. IC Role / Device Role / Timing Role: Low-noise bipolar regulator providing independently enabled, ripple-isolated positive and negative rails. Use Value: Independent EN+/EN– pins allow staggered turn-on to minimize supply current surges; LDO rejection suppresses charge pump ripple by >60dB. |
| Medical Sensor Signal Conditioning | Portable Data Acquisition Systems |
Use Scenario: EEG/ECG front-end modules where ultra-low-noise analog supply rails directly impact signal-to-noise ratio (SNR) and common-mode rejection. IC Role / Device Role / Timing Role: Bipolar LDO-based power source delivering ±5V/±12V rails with <100µVRMS noise and zero cross-talk between rails. Use Value: BYP+/BYP– capacitor support reduces reference noise floor by 10× versus standard LDOs - enabling sub-µV-level biopotential resolution. |
Use Scenario: Battery-powered DAQ units requiring long runtime and stable analog rails for simultaneous 16-bit ADC sampling and FPGA I/O. IC Role / Device Role / Timing Role: Dual-output power manager with Burst Mode® operation extending battery life while maintaining rail accuracy during wake cycles. Use Value: 135µA quiescent current (both LDOs active) enables >1-year operation on a single Li-ion cell in sleep mode - verified per typical load profiles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-polarity regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3260EFE#TRPBF | Single-channel (positive-only) LDO-based charge pump regulator; no inverting pump or negative LDO. | Only suitable for unipolar biasing; cannot replace LTC3265EFE#TRPBF in bipolar rail designs. | Select only when only positive rail generation is required and space/thermal constraints favor smaller 16-lead TSSOP. |
| MAX1759EUB+T | Single inverting charge pump IC (no boost pump, no LDOs); outputs only VOUT–; requires external LDOs for regulation. | Lacks integrated positive rail and post-regulation - demands additional components for bipolar, low-noise operation. | Use only in cost-sensitive, low-complexity designs where ±15V noise specs are relaxed and board area allows discrete LDO addition. |
Compared with LT3260EFE#TRPBF and MAX1759EUB+T, the LTC3265EFE#TRPBF uniquely integrates both boost and inverting charge pumps with dual low-noise LDOs in one 20-lead TSSOP - eliminating external regulators, reducing BOM count by ≥4 components, and guaranteeing matched rail noise performance critical for precision analog systems.
Availability
LTC3265EFE#TRPBF is available at Aetrix Electronics and suitable for industrial instrumentation, medical sensor signal conditioning, portable data acquisition systems, and precision analog test equipment requiring stable component supply with guaranteed long-term availability.
Supply support for LTC3265EFE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for all Linear-branded ICs including the LTC3265 series.
The LTC3265 product line was designed specifically for low-noise, dual-polarity bias generation in high-precision analog systems - targeting applications where discrete charge pump + LDO solutions introduce unacceptable noise, layout complexity, or thermal inefficiency.
FAQ
What is the operating temperature range for the LTC3265EFE#TRPBF?
The LTC3265EFE#TRPBF is rated for –40°C to +125°C junction temperature. This grade is specified for industrial environments and validated across the full range with guaranteed performance for LDO output voltage accuracy, dropout, and noise. Derating applies above 125°C per thermal design guidelines in the datasheet.
Can the LTC3265EFE#TRPBF generate symmetric ±15V outputs from a 12V input?
Yes - the LTC3265EFE#TRPBF can generate symmetric ±15V outputs from a 12V input. Tie VIN_N to VOUT+ (not VIN_P), configure MODE = low for constant-frequency operation, and set ADJ+/ADJ– dividers to yield VLDO+ = +15V and VLDO– = –15V. This configuration ensures matched ripple rejection and thermal tracking between rails.
How does the RT pin affect LTC3265EFE#TRPBF performance in Burst Mode®?
In Burst Mode®, the RT pin sets burst cycle frequency - not switching frequency. A 0Ω (GND) connection yields optimal 500kHz burst rate, minimizing VOUT± droop between bursts and reducing average output impedance. Higher RT values lower burst rate, increasing ripple and degrading light-load regulation - thus GND is recommended for best Burst Mode® performance.
What is the minimum output capacitance required for stability on LTC3265EFE#TRPBF LDO+ and LDO–?
The LTC3265EFE#TRPBF requires ≥2µF low-ESR ceramic capacitors on both LDO+ and LDO– outputs, connected directly to GND. These capacitors must maintain ≥2µF capacitance across –40°C to +125°C and rated voltage; X7R or better dielectrics are recommended. Smaller values risk instability and oscillation under load transients.
Does the LTC3265EFE#TRPBF support independent enable/disable of its positive and negative rails?
Yes - the LTC3265EFE#TRPBF supports fully independent control: EN+ enables/disables the boost pump and LDO+, while EN– controls the inverting pump and LDO–. This allows flexible power sequencing (e.g., enable LDO+ first, then LDO– after stabilization) and dynamic rail shutdown to reduce system power in partial-operation modes.
LTC3265EFE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Ratiometric
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Charge Pump
- Output Type:
- Fixed
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 32V
- Voltage - Output (Min/Fixed):
- -Vin, 2Vin
- Voltage - Output (Max):
- -
- Current - Output:
- 100mA
- Frequency - Switching:
- 50kHz ~ 500kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP-EP
LTC3265EFE#TRPBF FAQ
1.How can I place an order for LTC3265EFE#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3265EFE#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3265EFE#TRPBF reliable?
The price and inventory of LTC3265EFE#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3265EFE#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3265EFE#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3265EFE#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3265EFE#TRPBF?
LTC3265EFE#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3265EFE#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3265EFE#TRPBF?
For technical support, including LTC3265EFE#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3265EFE#TRPBF requirements.
6.How does Aetrix verify that LTC3265EFE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3265EFE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3265EFE#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3265EFE#TRPBF?
All LTC3265EFE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3265EFE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3265EFE#TRPBF part is unused and in its original packaging.
Return procedure for LTC3265EFE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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