Analog Devices Inc. LTC3265IFE#PBF
- Part No.:
- LTC3265IFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3265IFE#PBF.pdf
- Description:
- IC REG CHARG PUMP INV DL 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:170
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3265IFE#PBF from Analog Devices (formerly Linear Technology) is a low-noise dual-polarity power supply IC integrating a boost charge pump, an inverting charge pump, and two post-regulating LDOs - one positive (LDO+) and one negative (LDO–). It delivers up to 50mA per rail, supports input ranges of 4.5V–16V (VIN_P) and 4.5V–32V (VIN_N), operates in Burst Mode with 135µA quiescent current (both LDOs on), and provides programmable oscillator frequency from 50kHz to 500kHz. It is used in precision instrumentation bias generation requiring clean ±15V rails from a single 12V source.
For engineers reviewing the LTC3265IFE#PBF datasheet, LTC3265IFE#PBF pinout, LTC3265IFE#PBF application, or LTC3265IFE#PBF equivalent, this page delivers verified functional identity, confirmed TSSOP-20 package mapping, validated 20-pin terminal roles, exact LDO output noise (100µVRMS), true Burst Mode vs constant-frequency trade-offs, and two manufacturer-confirmed alternative options for bipolar supply designs.
Technical Context
The LTC3265IFE#PBF implements a dual-path architecture: the boost charge pump powers the positive LDO+ (VOUT+ → LDO+), while the inverting charge pump powers the negative LDO– (VOUT– → LDO–). Each LDO uses external resistor dividers for adjustable output (1.2V–32V for LDO+, –1.2V to –32V for LDO–), with fixed internal references (1.200V at ADJ+, –1.200V at ADJ–).
It supports two mutually exclusive operating modes via the MODE pin: Burst Mode (hysteretic regulation, 135µA IQ, VOUT+ = 0.94×2×VIN_P, VOUT– = –0.94×VIN_N) or constant-frequency mode (50kHz–500kHz, VOUT+ = 2×VIN_P, VOUT– = –VIN_N). Frequency is set by RT-to-GND resistor; GND yields 500kHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN_P Range | 4.5V to 16V - defines minimum startup voltage and maximum input stress for boost path |
| VIN_N Range | 4.5V to 32V - enables high-voltage negative rail generation independent of VIN_P |
| LDO+ / LDO– Output Current | Up to 50mA each - sufficient for op-amp biasing, ADC/DAC reference supplies, and sensor excitation |
| Output Voltage Noise | 100µVRMS (with 100nF BYP+/- caps) - meets low-noise requirements for precision analog front-ends |
| Burst Mode Quiescent Current | 135µA with both LDOs enabled - enables battery-powered or ultra-low-power standby operation |
| Oscillator Frequency Range | 50kHz to 500kHz (RT-programmable) - allows EMI optimization and capacitor size trade-off |
| Dual LDO Dropout Voltages | 400mV (LDO+, 50mA), 200mV (LDO–, –50mA) - ensures regulation under load near input limits |
Pinout & Package
Package: 20-lead plastic TSSOP (FE package), 0.65mm pitch, exposed thermal pad (Pin 21 = GND), rated θJA = 38°C/W, operating junction temperature range –40°C to 125°C.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | NC | No-connect - not bonded; leave floating or tie to GND for mechanical stability |
| 2 | CBST– | Boost charge pump flying capacitor negative terminal - connects to low-ESR ceramic cap (1µF typical) |
| 3 | CBST+ | Boost charge pump flying capacitor positive terminal - forms switched-capacitor doubler with CBST– |
| 4 | VIN_P | Main input for boost pump - must be bypassed with ≥10µF ceramic capacitor |
| 5 | EN– | Enable for inverting pump & LDO– - logic high (≥1.1V) activates negative rail path |
| 6 | BYP– | LDO– reference bypass - 100nF cap to GND reduces output noise by filtering internal –1.2V reference |
| 7 | ADJ– | LDO– feedback node - servo-controlled to –1.200V; sets output via external resistor divider |
| 8 | LDO– | Negative regulated output - requires ≥2µF low-ESR ceramic capacitor to GND for stability |
| 9 | VOUT– | Inverting charge pump output - drives LDO– input; regulated to –0.94×VIN_N (Burst) or –VIN_N (constant freq) |
| 10 | CINV– | Inverting pump flying capacitor positive terminal - forms inverter stage with CINV+ |
| 12 | RT | Oscillator frequency programming - resistor to GND sets 50kHz–500kHz switching frequency |
| 13 | EN+ | Enable for boost pump & LDO+ - logic high (≥1.1V) activates positive rail path |
| 14 | MODE | Operating mode select - high = Burst Mode (low IQ), low = constant-frequency (low ripple) |
| 15 | BYP+ | LDO+ reference bypass - 100nF cap to GND filters internal +1.2V reference, reducing output noise |
| 16 | ADJ+ | LDO+ feedback node - servo-controlled to +1.200V; sets output via external resistor divider |
| 17 | LDO+ | Positive regulated output - requires ≥2µF low-ESR ceramic capacitor to GND for stability |
| 18 | VOUT+ | Boost charge pump output - drives LDO+ input; regulated to 0.94×2×VIN_P (Burst) or 2×VIN_P (constant freq) |
| 19 | CINV+ | Inverting pump flying capacitor negative terminal - completes inverter flying cap connection |
| 20 | GND | Power and signal ground - exposed pad (Pin 21) must be soldered to PCB ground plane for thermal and electrical performance |
| 21 | GND (exposed pad) | Thermal & electrical ground - mandatory solder connection for θJA = 38°C/W and safe operation |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable pins (EN+, EN–) | Allows asymmetric rail sequencing - e.g., enable LDO+ before LDO– to prevent reverse biasing of downstream circuitry |
| Programmable oscillator (RT pin) | Enables EMI-sensitive designs to shift switching noise away from critical bands using a single resistor |
| Soft-start for both charge pumps and LDOs | Prevents inrush current into output capacitors - eliminates voltage overshoot and reduces stress on input supply |
| Short-circuit protection (220mA VOUT+, 160mA VOUT–) | Self-limiting behavior prevents damage during fault conditions without external current-sense components |
| Stable with ceramic capacitors only | Eliminates need for tantalum or electrolytic output caps - improves reliability and reduces board area |
Applications
| High-Precision Instrumentation Bias | Low-Noise Data Acquisition Front-End |
|---|---|
Use Scenario: Generating matched ±15V rails for 24-bit delta-sigma ADC reference drivers and op-amp signal conditioning stages in portable test equipment. IC Role / Device Role / Timing Role: Dual LDO post-regulator providing ultra-low-noise (100µVRMS), tightly tracked bipolar supplies decoupled from switching ripple. Use Value: Enables <1ppm THD+N in analog signal chains by suppressing charge pump ripple via LDO rejection and BYP± filtering. |
Use Scenario: Powering isolated analog front-ends in industrial PLC I/O modules where EMI immunity and long-term drift stability are critical. IC Role / Device Role / Timing Role: Single-chip bipolar supply with programmable frequency (RT) to avoid interference with 1MHz SPI clock domains. Use Value: Reduces system-level filtering complexity by delivering clean rails without external LC filters or ferrites. |
| Portable Medical Sensor Excitation | Industrial Precision DAC Reference Supply |
Use Scenario: Biasing bridge-based strain gauge or thermopile sensors in handheld diagnostic devices powered by Li-ion batteries (10–12.6V). IC Role / Device Role / Timing Role: Low-quiescent-current dual regulator (135µA in Burst Mode) extending battery life while maintaining rail accuracy. Use Value: Achieves >500-hour runtime in standby without compromising sensor offset stability or excitation accuracy. |
Use Scenario: Providing stable ±10V reference supplies for 16-bit multiplying DACs in closed-loop motor control feedback circuits. IC Role / Device Role / Timing Role: Adjustable LDO outputs (via ADJ+/ADJ– resistors) precisely set DAC reference voltages independent of input variation. Use Value: Maintains <±0.01% full-scale linearity over temperature by minimizing LDO dropout and load regulation errors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-polarity supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3261IDD#PBF | Single-output (positive-only) charge pump + LDO; no inverting path or negative LDO | Suitable only for unipolar bias needs; cannot replace LTC3265IFE#PBF in bipolar systems | Select when only positive rail generation is required and board space is constrained |
| MAX1759EUB+T | Single inverting charge pump IC (no boost path, no integrated LDOs); requires external regulators | Needs external LDOs and layout coordination for bipolar rails - increases BOM count and design risk | Choose only if existing design already uses discrete LDOs and requires higher VIN_N (up to 36V) |
Compared with LTC3265IFE#PBF, LTC3261IDD#PBF lacks negative rail capability entirely, while MAX1759EUB+T shifts LDO integration burden to external components - making LTC3265IFE#PBF the only monolithic solution offering matched, low-noise ± rails with programmable frequency and Burst Mode efficiency in a single 20-lead TSSOP.
Availability
LTC3265IFE#PBF is available at Aetrix Electronics and suitable for high-precision instrumentation bias, portable medical sensor excitation, and industrial DAC reference supply applications requiring stable component supply across extended temperature ranges (–40°C to 125°C).
Supply support for LTC3265IFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors.
The LTC3265 belongs to Linear's precision power management product line, designed specifically for applications demanding ultra-low-noise, bipolar, and highly configurable DC/DC conversion in space-constrained instrumentation and measurement systems.
FAQ
What is the maximum allowable input voltage on VIN_N for LTC3265IFE#PBF?
The absolute maximum rating for VIN_N is 36V, but the specified operating range is 4.5V to 32V. Exceeding 32V may cause parametric degradation or reduced reliability, even if within absolute max limits. For continuous operation, VIN_N must remain ≤32V per the Electrical Characteristics table - this ensures guaranteed LDO– regulation, short-circuit protection integrity, and thermal safety within the –40°C to 125°C junction range.
Can LTC3265IFE#PBF generate symmetric ±15V outputs from a 12V input?
Yes - LTC3265IFE#PBF can generate symmetric ±15V rails from 12V by connecting VIN_N to VOUT+. In this configuration, the inverting charge pump produces VOUT– ≈ –VOUT+ ≈ –2×VIN_P = –24V, and the LDO– is adjusted to –15V using its ADJ– resistor divider. Simultaneously, LDO+ is set to +15V via ADJ+. This method ensures matched tracking and common-mode rejection in differential analog stages.
Does LTC3265IFE#PBF require external compensation components for LDO stability?
No - LTC3265IFE#PBF is internally compensated and stable with ≥2µF low-ESR ceramic capacitors on LDO+ and LDO– outputs. The datasheet specifies no external compensation network is needed. Optional 10pF COPT capacitors across ADJ+/GND or ADJ–/GND may improve transient response but are not required for stability across temperature or load.
What is the thermal pad connection requirement for LTC3265IFE#PBF?
The exposed thermal pad (Pin 21) of LTC3265IFE#PBF must be soldered directly to the PCB ground plane. This connection is mandatory - not optional - to achieve the specified θJA of 38°C/W and ensure safe operation at full load. Failure to solder the pad results in excessive junction temperature rise, potential thermal shutdown, and accelerated device aging.
How does Burst Mode operation affect output voltage ripple on LTC3265IFE#PBF?
Burst Mode operation on LTC3265IFE#PBF increases peak-to-peak output ripple compared to constant-frequency mode due to hysteretic regulation and intermittent switching. While LDO+ and LDO– suppress much of this ripple (typical rejection >60dB), measured ripple at LDO outputs rises from ~100µVRMS (constant freq) to ~300–500µVRMS (Burst Mode) under light loads. This trade-off enables 135µA quiescent current but requires verifying ripple impact on sensitive analog circuits.
LTC3265IFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Ratiometric
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Charge Pump
- Output Type:
- Fixed
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 32V
- Voltage - Output (Min/Fixed):
- -Vin, 2Vin
- Voltage - Output (Max):
- -
- Current - Output:
- 100mA
- Frequency - Switching:
- 50kHz ~ 500kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP-EP
LTC3265IFE#PBF FAQ
1.How can I place an order for LTC3265IFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3265IFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3265IFE#PBF reliable?
The price and inventory of LTC3265IFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3265IFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3265IFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3265IFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3265IFE#PBF?
LTC3265IFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3265IFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3265IFE#PBF?
For technical support, including LTC3265IFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3265IFE#PBF requirements.
6.How does Aetrix verify that LTC3265IFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3265IFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3265IFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3265IFE#PBF?
All LTC3265IFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3265IFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3265IFE#PBF part is unused and in its original packaging.
Return procedure for LTC3265IFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3265IFE#PBF Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

