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Analog Devices Inc. LTC3265MPFE#PBF
- Part No.:
- LTC3265MPFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3265MPFE#PBF.pdf
- Description:
- IC REG CHARG PUMP INV DL 20TSSOP
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
LTC3265MPFE#PBF from Analog Devices (formerly Linear Technology) is a low-noise dual-polarity power supply IC integrating a boost charge pump, inverting charge pump, and two post-regulating LDOs - delivering ±15V outputs from a single 12V input. It supports up to 50mA per rail, operates from –55°C to 150°C, and features programmable 50–500kHz switching frequency and 135µA quiescent current in Burst Mode with both LDOs active.
For engineers reviewing the LTC3265MPFE#PBF datasheet, LTC3265MPFE#PBF pinout, LTC3265MPFE#PBF application, or LTC3265MPFE#PBF equivalent, key selection criteria include bipolar output noise performance (100µVRMS), dual independent enable control (EN+/EN–), MODE-selectable operation (Burst vs constant-frequency), thermal robustness for extended temperature environments, and compatibility with ceramic capacitors without external compensation.
Technical Context
The LTC3265MPFE#PBF implements two independent charge pump topologies: a boost stage (VIN_P → VOUT+, regulated to 2•VIN_P or 0.94•2•VIN_P) and an inverting stage (VIN_N → VOUT–, regulated to –VIN_N or –0.94•VIN_N), each feeding a dedicated low-noise LDO (LDO+, LDO–). Both LDOs use internal 1.2V/–1.2V references and adjustable feedback via ADJ+/ADJ– pins.
Operation mode is controlled by the MODE pin: high enables Burst Mode (hysteretic regulation, ultra-low IQ), low enables constant-frequency operation (50–500kHz via RT resistor). Soft-start, short-circuit protection (220mA/160mA), and thermal shutdown (175°C trip) are integrated. The device requires no external compensation and remains stable with ≥2µF ceramic output capacitance per LDO.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN_P Range | 4.5V to 16V - defines minimum system input for positive rail generation |
| VIN_N Range | 4.5V to 32V - enables flexible negative rail sourcing (e.g., tied to VIN_P or VOUT+) |
| LDO Output Current | ±50mA - sufficient for precision op-amp biasing, ADC/DAC reference supplies, and sensor excitation |
| Quiescent Current (Burst) | 135µA with both LDOs on - enables battery-powered instrumentation with multi-day standby |
| Oscillator Frequency | 50kHz to 500kHz (RT-programmable) - trade-off between ripple, efficiency, and EMI filtering requirements |
| Output Voltage Noise | 100µVRMS (with 100nF BYP+/- caps) - meets low-noise analog signal chain requirements (e.g., 16-bit+ data converters) |
| Operating Temp Range | –55°C to 150°C - qualified for aerospace, downhole, and industrial control applications |
Pinout & Package
Package: 20-lead plastic TSSOP (FE package), thermally enhanced with exposed GND pad (Pin 21), θJA = 38°C/W. Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VOUT+ | Boost charge pump output | Drives LDO+; regulated to 2•VIN_P (constant freq) or 0.94•2•VIN_P (Burst Mode) |
| LDO+ | Positive LDO output | Adjustable 1.2–32V output; requires ≥2µF low-ESR ceramic capacitor to GND |
| ADJ+ | Positive LDO feedback | Servos to 1.2V; sets LDO+ voltage via external resistor divider (R1/R2) |
| BYP+ | Positive LDO reference bypass | Connect 100nF cap to GND to reduce output noise; floating if unused |
| MODE | Charge pump operating mode select | High = Burst Mode (low IQ); Low = constant-frequency (low ripple) |
| EN+ | Positive rail enable | Logic high enables boost pump and LDO+; internal pull-down (0.7µA) |
| RT | Oscillator frequency programming | Resistor to GND sets frequency (50–500kHz); 0Ω = 500kHz default |
| VIN_N | Inverting pump input | Tied to VIN_P (asymmetric) or VOUT+ (symmetric ± rails); bypassed with ceramic cap |
| EN– | Negative rail enable | Logic high enables inverting pump and LDO–; internal pull-down (0.7µA) |
| BYP– | Negative LDO reference bypass | Connect 100nF cap to GND to reduce LDO– noise; floating if unused |
| ADJ– | Negative LDO feedback | Servos to –1.2V; sets LDO– voltage via external resistor divider |
| LDO– | Negative LDO output | Adjustable –1.2V to –32V output; requires ≥2µF low-ESR ceramic capacitor to GND |
| VOUT– | Inverting charge pump output | Drives LDO–; regulated to –VIN_N (constant freq) or –0.94•VIN_N (Burst Mode) |
| CINV– / CINV+ | Inverting pump flying capacitor terminals | Connect external flying cap (e.g., 1µF ceramic) between these pins |
| CBST– / CBST+ | Boost pump flying capacitor terminals | Connect external flying cap (e.g., 1µF ceramic) between these pins |
| GND | Ground reference and thermal pad | Exposed pad (Pin 21) must be soldered to PCB ground for thermal performance and functionality |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable control | EN+ and EN– allow staged power-up/down of positive and negative rails - critical for avoiding latch-up in op-amp or ADC circuits |
| Programmable oscillator frequency | RT-resistor tuning (50–500kHz) enables optimization for EMI compliance, capacitor size, and load transient response |
| Ultra-low quiescent current | 135µA in Burst Mode with both LDOs active - extends battery life in portable test equipment and remote sensors |
| Integrated soft-start | 75µs LDO+ ramp and charge pump soft-start prevent inrush current damage to flying/output capacitors during power-up |
| Robust protection suite | Short-circuit limiting (220mA/160mA), thermal shutdown (175°C), and undervoltage lockout ensure reliable operation under fault conditions |
Applications
| Instrumentation Amplifier Bias Supply | Precision ADC Reference Generator |
|---|---|
Use Scenario: Powering dual-supply instrumentation amplifiers (e.g., LT1167, AD8421) in portable data loggers requiring <100µVRMS noise and ±15V rails. IC Role / Device Role / Timing Role: LTC3265MPFE#PBF generates clean, matched ±15V from a single 12V battery, with independent EN+/EN– enabling synchronized startup and low-power sleep. Use Value: Eliminates need for discrete DC/DC + LDO solutions, reducing BOM count by 4+ components while maintaining 100µVRMS noise floor across –55°C to 150°C. |
Use Scenario: Providing isolated, low-noise ±5V reference supplies for 16-bit SAR ADCs (e.g., LTC2378-16) in industrial process monitoring systems. IC Role / Device Role / Timing Role: LTC3265MPFE#PBF delivers tightly regulated ±5V (via ADJ+/ADJ– dividers) with 100µVRMS noise, rejecting VOUT± ripple via LDO post-regulation. Use Value: Enables >95dB SNR in ADC measurements without external filtering; Burst Mode reduces system idle power by >90% versus fixed-frequency alternatives. |
| Downhole Sensor Signal Conditioning | High-Temperature Op-Amp Power |
Use Scenario: Biasing front-end op-amps and transducer drivers in oil/gas downhole tools operating at 150°C ambient. IC Role / Device Role / Timing Role: LTC3265MPFE#PBF provides stable ±12V rails from a 15V bus, leveraging its –55°C to 150°C rating and thermal shutdown (175°C) for fault resilience. Use Value: Replaces legacy discrete solutions requiring derating above 125°C; exposed-pad TSSOP ensures θJA = 38°C/W for reliable junction temp control at full load. |
Use Scenario: Powering high-voltage, high-precision op-amps (e.g., LT6018, OPA454) in aerospace avionics where supply rejection and temperature stability are critical. IC Role / Device Role / Timing Role: LTC3265MPFE#PBF supplies ±15V at 50mA with <0.04mV/V line regulation and <0.03mV/mA load regulation - minimizing offset drift over input/load variation. Use Value: Achieves <1ppm/°C effective reference stability when paired with low-drift resistors, eliminating need for external trimming or calibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-polarity regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3265EFE#PBF | Same architecture and pinout; rated for –40°C to 125°C (vs –55°C to 150°C) | Not suitable for extended temperature environments (e.g., downhole, military) | Select when operating ambient stays within commercial/industrial range and cost sensitivity outweighs extended temp need |
| LTC3265MPDHC#PBF | Identical electrical specs and temp range; uses 18-lead DFN (3mm × 5mm) instead of 20-lead TSSOP | Higher power density but lower thermal dissipation (θJA = 42°C/W vs 38°C/W) | Select for space-constrained PCBs where thermal margin allows; avoid in high-ambient or high-load scenarios |
Compared with LTC3265EFE#PBF, the LTC3265MPFE#PBF adds 15°C wider low-temp capability and 25°C higher max junction rating - essential for mission-critical deployments. Versus LTC3265MPDHC#PBF, the TSSOP package offers superior thermal performance and easier reworkability despite larger footprint.
Availability
LTC3265MPFE#PBF is available at Aetrix Electronics and suitable for high-reliability instrumentation, downhole sensing, and aerospace power management requiring stable component supply across extreme temperature ranges and long production lifecycles.
Supply support for LTC3265MPFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, documentation, and manufacturing continuity for all LTC devices.
The LTC3265MPFE#PBF belongs to Linear's precision power management portfolio, designed specifically for low-noise, bipolar supply generation in test & measurement, medical imaging, and industrial control systems where EMI, thermal robustness, and long-term reliability are non-negotiable.
FAQ
What is the maximum allowable input voltage on VIN_N for LTC3265MPFE#PBF?
The absolute maximum rating for VIN_N is 36V, but the specified operating range is 4.5V to 32V. Exceeding 32V may cause parametric degradation or reduced lifetime, especially at high temperature. For reliable operation across –55°C to 150°C, VIN_N should remain ≤32V per the Electrical Characteristics table. The LTC3265MPFE#PBF uses internal clamping and thermal protection, but sustained overvoltage risks permanent damage.
Can LTC3265MPFE#PBF generate symmetric ±15V outputs from a 12V input?
Yes - tie VIN_N to VOUT+ (not VIN_P) to configure the inverting pump for –VOUT+, yielding –2•VIN_P. With VIN_P = 12V, VOUT+ ≈ 22.6V (0.94•2•12V in Burst Mode), so VOUT– ≈ –22.6V; then set LDO+ and LDO– to ±15V using ADJ+/ADJ– dividers. This configuration is explicitly validated in the Typical Application schematic (TA01a) and supports matched rail accuracy and noise rejection. The LTC3265MPFE#PBF's dual independent LDOs ensure precise symmetry without cross-coupling.
Does LTC3265MPFE#PBF require external compensation capacitors on the LDO outputs?
No - the LTC3265MPFE#PBF is internally compensated and stable with ≥2µF ceramic output capacitors on LDO+ and LDO–, as confirmed in the Applications Information section and Typical Performance Characteristics. Adding COPT (2–22pF) between ADJ+ and GND or ADJ– and GND can improve transient response, but it is optional. The LTC3265MPFE#PBF eliminates external compensation networks required by many discrete LDO solutions, simplifying layout and reducing BOM count.
How does Burst Mode operation affect output voltage ripple on LTC3265MPFE#PBF?
Burst Mode increases peak-to-peak ripple on VOUT+ and VOUT– due to hysteretic regulation and intermittent switching - typical ripple rises from ~10mV (constant frequency) to ~30–50mV depending on load and input. However, the downstream LDOs reject this ripple effectively: LDO+ and LDO– achieve <100µVRMS output noise even with Burst Mode active, as measured with 100nF BYP+/- caps. The LTC3265MPFE#PBF's architecture isolates ripple-sensitive analog loads from charge pump artifacts via post-regulation.
Is the exposed pad on the LTC3265MPFE#PBF package electrically connected, and how must it be handled?
Yes - the exposed pad (Pin 21) is internally connected to GND and must be soldered to a solid PCB ground plane. Per the FE Package drawing, failure to do so degrades thermal performance (θJA increases from 38°C/W to >60°C/W) and may cause functional instability or premature thermal shutdown. The LTC3265MPFE#PBF datasheet mandates exposed-pad soldering for both electrical integrity and thermal reliability - it is not optional. Use standard stencil design and reflow profile for exposed-pad TSSOP packages.
LTC3265MPFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Ratiometric
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Charge Pump
- Output Type:
- Fixed
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 32V
- Voltage - Output (Min/Fixed):
- -Vin, 2Vin
- Voltage - Output (Max):
- -
- Current - Output:
- 100mA
- Frequency - Switching:
- 50kHz ~ 500kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP-EP
LTC3265MPFE#PBF FAQ
1.How can I place an order for LTC3265MPFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3265MPFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3265MPFE#PBF reliable?
The price and inventory of LTC3265MPFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3265MPFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3265MPFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3265MPFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3265MPFE#PBF?
LTC3265MPFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3265MPFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3265MPFE#PBF?
For technical support, including LTC3265MPFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3265MPFE#PBF requirements.
6.How does Aetrix verify that LTC3265MPFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3265MPFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3265MPFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3265MPFE#PBF?
All LTC3265MPFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3265MPFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3265MPFE#PBF part is unused and in its original packaging.
Return procedure for LTC3265MPFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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