Analog Devices Inc. LTC3265MPFE#TRPBF
- Part No.:
- LTC3265MPFE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3265MPFE#TRPBF.pdf
- Description:
- IC REG CHARG PUMP INV DL 20TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3265MPFE#TRPBF from Analog Devices (formerly Linear Technology) is a low-noise dual-polarity power supply IC integrating a boost charge pump, an inverting charge pump, and two post-regulating LDOs - one positive (LDO+) and one negative (LDO–). It delivers up to 50mA per rail, supports input ranges of 4.5V–16V (VIN_P) and 4.5V–32V (VIN_N), operates in Burst Mode with 135µA quiescent current, and features programmable 50kHz–500kHz oscillator frequency. It is used in precision instrumentation bias generation requiring clean ±15V rails from a single 12V source.
For engineers reviewing the LTC3265MPFE#TRPBF datasheet, LTC3265MPFE#TRPBF pinout, LTC3265MPFE#TRPBF application, or LTC3265MPFE#TRPBF equivalent, key selection criteria include bipolar output noise performance (100µVRMS), dual independent enable control (EN+/EN–), MODE-selectable operation (Burst vs constant-frequency), thermal robustness (–55°C to 150°C), and compatibility with ceramic output capacitors without external compensation.
Technical Context
The LTC3265MPFE#TRPBF implements two independent charge pump topologies: a boost converter generating VOUT+ = 2•VIN_P (constant frequency) or 0.94•2•VIN_P (Burst Mode), and an inverting converter generating VOUT– = –VIN_N or –0.94•VIN_N, respectively. Each feeds a dedicated low-noise LDO - LDO+ referenced to +1.2V at ADJ+, LDO– referenced to –1.2V at ADJ– - both adjustable via external resistor dividers and stable with ≥2µF ceramic output capacitance.
Operation is controlled by three logic inputs: EN+ enables the boost pump and LDO+, EN– enables the inverter and LDO–, and MODE selects between low-quiescent Burst Mode (hysteretic regulation) and fixed-frequency mode (50kHz–500kHz, set by RT-to-GND resistor). Internal short-circuit protection limits VOUT+ to 220mA and VOUT– to 160mA; thermal shutdown activates above ~175°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN_P Range | 4.5V to 16V - defines minimum system input for positive rail generation; below 4.5V disables boost pump. |
| VIN_N Range | 4.5V to 32V - sets maximum input voltage for negative rail generation; supports wide-range industrial supplies. |
| LDO Output Current | ±50mA - maximum continuous load per rail; sufficient for op-amp biasing, ADC/DAC reference supplies, and sensor excitation. |
| Quiescent Current (Burst) | 135µA with both LDOs on - enables ultra-low-power operation in battery-backed or always-on instrumentation systems. |
| Oscillator Frequency | 50kHz to 500kHz (RT-programmable) - higher frequencies reduce effective output impedance but increase switching losses. |
| Output Voltage Noise | 100µVRMS (with 100nF BYP+/- caps) - critical for high-resolution analog signal chains where ripple couples into sensitive nodes. |
| Operating Temp Range | –55°C to 150°C - qualified for extended-temperature military, aerospace, and downhole industrial applications. |
Pinout & Package
Package: 20-lead plastic TSSOP (FE package), 5.0mm × 4.4mm × 1.2mm, exposed thermal pad (Pin 21 = GND), θJA = 38°C/W. Requires soldering of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN_P | Boost pump input | Primary positive supply input; must be bypassed with low-ESR ceramic capacitor (≥10µF). |
| VIN_N | Inverting pump input | Can be tied to VIN_P (asymmetric outputs) or VOUT+ (symmetric ±2•VIN_P); bypass required. |
| VOUT+ | Boost pump output | Feeds LDO+; regulated to 2•VIN_P (constant freq) or 0.94•2•VIN_P (Burst Mode). |
| VOUT– | Inverting pump output | Feeds LDO–; regulated to –VIN_N (constant freq) or –0.94•VIN_N (Burst Mode). |
| LDO+ | Positive LDO output | Adjustable rail (1.2V–32V); requires ≥2µF ceramic output cap; soft-start ramps over 75µs. |
| LDO– | Negative LDO output | Adjustable rail (–32V to –1.2V); same stability requirements as LDO+; soft-start synchronized to pump. |
| ADJ+ | LDO+ feedback reference | Servos to +1.2V; sets output via resistor divider; input current ≤ ±50nA ensures accuracy. |
| ADJ– | LDO– feedback reference | Servos to –1.2V; symmetric design enables matched positive/negative rail programming. |
| EN+ | Enable for boost + LDO+ | Logic-high (>1.1V) enables both stages; internal pull-down (0.7µA) prevents floating. |
| EN– | Enable for inverter + LDO– | Independent control allows staggered startup or rail-specific shutdown for power sequencing. |
| MODE | Charge pump operating mode | High = Burst Mode (low IQ, higher ripple); Low = constant frequency (lower ripple, higher IQ). |
| RT | Oscillator frequency set | 1.2V-regulated node; resistor to GND programs fOSC from 50kHz to 500kHz; GND = 500kHz default. |
| BYP+ | LDO+ reference bypass | Connect 100nF to GND to reduce reference noise and improve LDO+ output noise performance. |
| BYP– | LDO– reference bypass | Same function as BYP+; improves negative rail noise rejection and stability margin. |
| CBST+/CBST– | Boost pump flying cap | External capacitor (typically 1µF) forms charge transfer path; placement critical for EMI control. |
| CINV+/CINV– | Inverter flying cap | Separate flying cap (1µF) for inverting stage; decoupling minimizes cross-coupling between rails. |
| GND (Pin 21) | Power/thermal ground | Exposed pad - mandatory connection to PCB ground plane for thermal dissipation and noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable control | EN+ and EN– allow precise power sequencing - e.g., enable LDO+ before LDO– to avoid reverse bias on downstream circuitry. |
| Burst Mode + constant-frequency selection | MODE pin toggles between 135µA IQ (Burst) and lower-noise fixed-frequency operation - adaptive efficiency for varying load profiles. |
| Programmable oscillator (50–500kHz) | RT-to-GND resistor lets designers optimize trade-off between output impedance (ROL), EMI, and efficiency for specific layout constraints. |
| ±100µVRMS output noise | Achieved with 100nF BYP+/- caps - meets noise requirements for 16-bit+ SAR ADCs and precision op-amp front-ends without additional filtering. |
| –55°C to 150°C operation | MP-grade qualification enables use in harsh environments including avionics, oil/gas, and defense electronics without derating. |
| Integrated short-circuit & thermal protection | VOUT+ limited to 220mA, VOUT– to 160mA; thermal shutdown at ~175°C with hysteresis - protects against fault conditions without external circuitry. |
Applications
| High-Precision Instrumentation Bias | Industrial Data Acquisition Systems |
|---|---|
|
Use Scenario: Generating matched ±15V rails for low-noise op-amps and reference buffers in portable multimeters and calibration standards. IC Role / Device Role / Timing Role: Dual-rail power supply IC providing isolated, low-ripple, temperature-stable bias voltages with independent enable sequencing. Use Value: 100µVRMS noise and <0.04mV/V line regulation ensure measurement accuracy remains within ±0.005% FS across input voltage variations. |
Use Scenario: Powering 24-bit delta-sigma ADCs and isolated analog front-ends in PLC I/O modules operating from 24VDC field supplies. IC Role / Device Role / Timing Role: Bipolar supply generator converting unregulated 24V to clean ±12V rails, with EN– delayed to prevent latch-up during cold start. Use Value: 50mA per rail supports multiple channel drivers; –55°C to 150°C rating ensures reliability in cabinet-mounted industrial enclosures. |
| Medical Sensor Signal Conditioning | Test & Measurement Equipment |
|
Use Scenario: Supplying low-noise bias to EEG/ECG amplifier stages and photodiode transimpedance amplifiers in portable diagnostic devices. IC Role / Device Role / Timing Role: Ultra-low-quiescent dual-LDO regulator enabling >100-hour battery life while maintaining sub-µV noise floor in analog signal paths. Use Value: 135µA total IQ in Burst Mode extends battery runtime; BYP+/- caps suppress switching artifacts that would otherwise alias into bio-signals. |
Use Scenario: Providing stable ±15V supplies for oscilloscope vertical amplifiers and arbitrary waveform generator output stages. IC Role / Device Role / Timing Role: Precision bipolar power module delivering fast transient response (<40µs recovery) and minimal load-induced droop. Use Value: LDO+ dropout <800mV at 50mA ensures regulation even under heavy dynamic loads; soft-start prevents overshoot during power-on reset. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-polarity power supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT3467EDD#TRPBF | Single-output inverting charge pump + LDO; no boost stage; max |VOUT| = –36V; no Burst Mode; IQ = 1.2mA. | Only generates negative rail; cannot produce symmetric ±VOUT from single input; unsuitable for applications needing both polarities simultaneously. | Select only when only negative bias is required and higher IQ is acceptable. |
| TPS60403DBVR | Low-current (60mA) inverting charge pump only; no LDO regulation; fixed –2×VIN output; no programmable frequency or enable pins. | Lacks post-regulation → higher output ripple (>50mVpp); no thermal/short-circuit protection; not rated beyond 85°C. | Use only in cost-sensitive, non-critical consumer applications with light, static loads. |
Compared with LT3467EDD#TRPBF and TPS60403DBVR, the LTC3265MPFE#TRPBF uniquely integrates dual independent charge pumps with matched LDOs, Burst Mode efficiency, and extended temperature capability - making it the only option for high-reliability, low-noise, bipolar rail generation in demanding industrial and instrumentation designs.
Availability
LTC3265MPFE#TRPBF is available at Aetrix Electronics and suitable for high-precision instrumentation bias generation, industrial data acquisition systems, and medical sensor signal conditioning requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC3265MPFE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors for precision, power, and connectivity applications.
The LTC3265MPFE#TRPBF belongs to Linear's precision power management product line, designed specifically for low-noise, bipolar supply generation in test equipment, medical instruments, and industrial control systems where rail symmetry, ripple rejection, and thermal resilience are critical.
FAQ
What is the maximum allowable input voltage on VIN_N for the LTC3265MPFE#TRPBF?
The absolute maximum rating for VIN_N is 36V, but the specified operating range is 4.5V to 32V. Exceeding 32V may cause parametric degradation or violate guaranteed specifications; operation at 32V is validated across the full –55°C to 150°C junction temperature range for the MP grade. The LTC3265MPFE#TRPBF must be operated within this range to maintain LDO– regulation accuracy and thermal safety margins.
Can the LTC3265MPFE#TRPBF generate symmetric ±15V outputs from a 12V input?
Yes - tie VIN_N to VOUT+ (not VIN_P), configure MODE = high (Burst Mode), and set resistor dividers so ADJ+ and ADJ– each see 1.2V. With VIN_P = 12V, VOUT+ regulates to ~22.6V (0.94 × 2 × 12V), enabling LDO+ to deliver +15V and LDO– to deliver –15V relative to GND. This configuration is explicitly validated in the LTC3265MPFE#TRPBF typical application circuit (TA01b) and supports simultaneous ±15V at 20mA each.
Does the LTC3265MPFE#TRPBF require external compensation components for LDO stability?
No - the LTC3265MPFE#TRPBF LDOs are internally compensated and stable with ≥2µF ceramic output capacitors (low ESR) on both LDO+ and LDO–. No external compensation network is needed. An optional 10pF COPT capacitor between ADJ+ and GND (or ADJ– and GND) can improve transient response, but it is not required for stability. The LTC3265MPFE#TRPBF datasheet confirms unconditional stability under all load and temperature conditions when using recommended capacitors.
How does the MODE pin affect output ripple and efficiency of the LTC3265MPFE#TRPBF?
When MODE = high, the LTC3265MPFE#TRPBF enters Burst Mode: charge pumps operate intermittently to maintain regulation, reducing IQ to 135µA but increasing output ripple (due to hysteretic control). When MODE = low, it runs at fixed frequency (e.g., 500kHz), yielding lower ripple but higher IQ (~1–2mA). The LTC3265MPFE#TRPBF's MODE pin thus directly trades off efficiency versus noise - critical for optimizing battery life versus signal integrity in portable instrumentation.
Is the exposed thermal pad on the LTC3265MPFE#TRPBF electrically connected, and how must it be handled?
Yes - the exposed pad (Pin 21) is internally connected to GND and must be soldered to a PCB ground plane. It is not optional: failure to connect degrades thermal resistance (θJA increases from 38°C/W to >60°C/W), risks thermal shutdown under load, and compromises noise immunity. The LTC3265MPFE#TRPBF datasheet mandates this connection for both electrical functionality and rated thermal performance across its full –55°C to 150°C operating range.
LTC3265MPFE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Ratiometric
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Charge Pump
- Output Type:
- Fixed
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 32V
- Voltage - Output (Min/Fixed):
- -Vin, 2Vin
- Voltage - Output (Max):
- -
- Current - Output:
- 100mA
- Frequency - Switching:
- 50kHz ~ 500kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOP-EP
LTC3265MPFE#TRPBF FAQ
1.How can I place an order for LTC3265MPFE#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3265MPFE#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3265MPFE#TRPBF reliable?
The price and inventory of LTC3265MPFE#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3265MPFE#TRPBF is usually 5 days.
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5.How can I obtain technical support or documentation for LTC3265MPFE#TRPBF?
For technical support, including LTC3265MPFE#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3265MPFE#TRPBF requirements.
6.How does Aetrix verify that LTC3265MPFE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3265MPFE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3265MPFE#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3265MPFE#TRPBF?
All LTC3265MPFE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3265MPFE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3265MPFE#TRPBF part is unused and in its original packaging.
Return procedure for LTC3265MPFE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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