Analog Devices Inc. LTC3311HV#PBF
- Part No.:
- LTC3311HV#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 18-TFQFN Exposed Pad
- Datasheet:
-
LTC3311HV#PBF.pdf
- Description:
- IC REG BUCK ADJ 12.5A 18LQFN
- Quantity:
- Payment:

- Shipping:

Inventory:534
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Product details
Overview
LTC3311HV#PBF from Analog Devices is a monolithic, Silent Switcher® 1 synchronous step-down DC/DC converter delivering up to 12.5A output current from a 2.25V–5.5V input. It features peak current mode control, 500mV feedback reference, 100% duty cycle operation, and operates up to 5MHz switching frequency in a thermally enhanced 18-lead 3mm × 3mm LQFN package. It is AEC-Q100 qualified for automotive power rails feeding FPGA, ASIC, or µP cores.
For engineers reviewing the LTC3311HV#PBF datasheet, LTC3311HV#PBF pinout, LTC3311HV#PBF application, or LTC3311HV#PBF equivalent, key selection criteria include its ultralow EMI performance (CISPR25 Class 5 compliant), ±1% VOUT accuracy with remote sense, 35ns minimum on-time, dual MOSFET RDS(ON) of 4.5mΩ (NMOS) / 16mΩ (PMOS), and support for multi-phase paralleling in forced continuous mode.
Technical Context
The LTC3311HV#PBF employs constant-frequency peak current mode control with internal 500mV reference and programmable oscillator (0.5–5MHz via RT resistor). Its Silent Switcher 1 architecture uses symmetrical layout and integrated input capacitors to minimize PCB loop area and suppress radiated EMI without external filters.
It supports three operational modes: pulse-skipping for light-load efficiency, forced continuous conduction for predictable ripple and transient response, and synchronization to external clock via MODE/SYNC pin. The device integrates output overvoltage protection (105–115% VOUT), thermal shutdown, die temperature monitoring via SSTT pin, and robust short-circuit recovery using valley current limiting (IVALLEY(MAX) = 12–16A).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.25V to 5.5V - supports single-cell Li-ion, 3.3V/5V intermediate bus, and automotive cold-crank down to 2.25V. |
| IOUT Max | 12.5A - delivers full rated current with <1.2°C/W junction-to-board thermal resistance (θJB = 14°C/W). |
| VFB Accuracy | ±1% with remote sense - enables precise regulation despite PCB ground offsets up to ±100mV. |
| fSW Range | 0.5MHz to 5MHz - allows optimization of inductor size (e.g., 100nH at 2MHz) vs. efficiency trade-off. |
| RDS(ON) | NMOS: 4.5mΩ / PMOS: 16mΩ - minimizes conduction loss at high load; NMOS dominates heavy-load efficiency. |
| Min On-Time | 35ns - supports high VIN-to-VOUT ratios (e.g., 5V→0.5V at 2MHz) without pulse skipping. |
| PGOOD Threshold | 97–99% of regulated VOUT - provides tight power-good assertion for system sequencing and fault detection. |
Pinout & Package
Package: 18-lead 3mm × 3mm LQFN with exposed PGND pad (Pin 19), θJA = 42°C/W, θJCbottom = 9°C/W. Requires soldering of exposed pad to PCB ground plane with multiple thermal vias.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (1) | Enable input with precision threshold | 400mV rising threshold ±60mV hysteresis; 1μA shutdown current enables battery-sensitive systems. |
| AGND (2) | Remote sense ground reference | Kelvin connection point for FB divider low-side; rejects PCB IR drop for ±1% VOUT accuracy. |
| VIN (3,4,11,12) | Main input power supply | Four parallel pins reduce trace impedance and AC losses; must be bypassed locally to PGND with low-ESR caps. |
| PGND (5,10,19) | Power ground return path | Three dedicated pins + exposed pad form primary thermal and current return path; critical for EMI and thermal performance. |
| SW (6–9) | Switch node outputs | Four parallel SW pins connect directly to inductor; minimize voltage spikes and ringing in high-dI/dt paths. |
| MODE/SYNC (13) | Multi-phase sync & mode control | Accepts external clock (0.5–2.25MHz) or outputs synchronized clock; selects pulse-skipping vs. forced CCM. |
| PGOOD (14) | Open-drain power-good indicator | Pulled low if VOUT deviates >3% or during fault; 125μs delay filters transient noise. |
| RT (15) | Oscillator frequency programming | Resistor to AGND sets fSW (e.g., 274kΩ → 2MHz); also configures phase offset in multi-phase setups. |
| SSTT (16) | Soft-start, tracking, temp monitor | 10μA current charges external cap for controlled ramp; post-startup voltage ≈ 4mV/°C for die temp readback. |
| ITH (17) | Loop compensation node | Connects Type II/III compensation network to AGND; determines stability and transient bandwidth. |
| FB (18) | Feedback input (LTC3311 variant) | Regulated to 500mV; connects to resistive divider from VOUT; supports optional feedforward capacitor for phase margin. |
Key Features
| Feature | Design Value |
|---|---|
| Silent Switcher® 1 Architecture | Reduces radiated EMI by >30dB vs. conventional buck converters; meets CISPR25 Class 5 limits without ferrite beads or shielding. |
| Ultralow Minimum On-Time (35ns) | Enables high step-down ratios (e.g., 5V→0.5V at 2MHz) while maintaining PWM control-no need for external controllers. |
| Integrated Dual MOSFET Power Stage | 4.5mΩ NMOS + 16mΩ PMOS switches eliminate external FETs and drivers; reduces BOM count and layout complexity. |
| Active Voltage Positioning (AVP) | Adjusts VOUT based on load: higher at light load (+2mV/A), lower at full load (−2mV/A) to improve transient droop/surge margins. |
| Robust Short-Circuit Recovery | Valley current limit (IVALLEY(MAX)) holds top switch off until inductor current decays below safe threshold; automatic soft-start restart on fault clearance. |
Applications
| Automotive ADAS Core Supply | Industrial FPGA Power Rail |
|---|---|
Use Scenario: Powers vision processor SoC in automotive camera module requiring stable 1.2V/10A under engine start-stop and load dump conditions. IC Role / Device Role / Timing Role: Primary POL regulator with AEC-Q100 qualification, 100% duty cycle dropout support, and PGOOD sequencing for safety-critical boot. Use Value: ±1% VOUT accuracy with remote sense maintains SoC core voltage within spec despite 80mV chassis ground shift; Silent Switcher ensures radar/RF coexistence. | Use Scenario: Supplies 0.85V/12.5A to Xilinx Kintex Ultrascale+ FPGA in industrial PLC with strict EMI limits and thermal constraints. IC Role / Device Role / Timing Role: High-current, low-noise point-of-load converter with programmable 2MHz switching and multi-phase capability for dynamic load scaling. Use Value: 35ns min on-time enables clean 0.85V regulation from 3.3V rail; 4.5mΩ NMOS RDS(ON) keeps junction temp <115°C at full load in 60°C ambient. |
| Telecom Baseband Processor | Server DDR5 Memory Subsystem |
Use Scenario: Delivers 0.75V/12A to 5G baseband ASIC with fast transient demands and stringent conducted/radiated EMI requirements. IC Role / Device Role / Timing Role: Synchronous buck controller with pulse-skipping mode for idle efficiency and forced CCM for burst-mode transients. Use Value: 5MHz max fSW allows <150nH inductors; SSTT pin provides real-time die temp telemetry for dynamic frequency scaling. | Use Scenario: Provides tightly regulated 1.1V/12.5A to DDR5 memory modules in AI accelerator servers where voltage droop impacts signal integrity. IC Role / Device Role / Timing Role: Precision POL regulator with AVP and remote sensing to counteract IR drop across memory DIMM connectors. Use Value: Active voltage positioning (2mV/A slope) pre-biases VOUT upward at light load, reducing undershoot during sudden 10A load steps by >40mV. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3311JV#PBF | Same silicon, J-grade (–40°C to +150°C junction), identical electrical specs and pinout. | No automotive qualification; intended for industrial/commercial use only. | Select LTC3311HV#PBF for automotive AEC-Q100 compliance; LTC3311JV#PBF for cost-sensitive non-automotive designs. |
| MP2960GQ-Z | Monolithic 12A buck with 3.3–18V VIN, 0.6–5.5V VOUT, but no Silent Switcher EMI suppression or AVP. | Lacks CISPR25 Class 5 EMI certification and die temperature monitoring; requires external compensation. | Choose MP2960GQ-Z only if wider VIN range is mandatory and EMI filtering can be added externally. |
Compared with LTC3311HV#PBF, LTC3311JV#PBF offers identical performance without AEC-Q100 validation, while MP2960GQ-Z trades EMI robustness and advanced features for broader input voltage range-making LTC3311HV#PBF optimal for space-constrained, noise-sensitive automotive and telecom POL applications.
Availability
LTC3311HV#PBF is available at Aetrix Electronics and suitable for automotive ADAS systems, industrial FPGA power rails, and telecom baseband processors requiring stable component supply with AEC-Q100 qualification, ultralow EMI, and high-current density.
Supply support for LTC3311HV#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, communications, and automotive markets.
The LTC3311HV#PBF belongs to the Power by Linear™ family of monolithic DC/DC regulators, engineered specifically for high-efficiency, low-EMI point-of-load conversion in space- and noise-constrained applications such as automotive infotainment, 5G infrastructure, and AI edge computing.
FAQ
What is the maximum output current capability of the LTC3311HV#PBF?
The LTC3311HV#PBF delivers up to 12.5A continuous output current when properly heatsinked on a 4-layer PCB with ≥4 thermal vias under 5.5V input and 1.2V output conditions. Its 4.5mΩ NMOS RDS(ON) and 9°C/W θJCbottom enable this rating without external current sharing. Derating applies above 85°C ambient or with inadequate copper area.
Does the LTC3311HV#PBF support synchronization to an external clock?
Yes, the LTC3311HV#PBF supports external clock synchronization via the MODE/SYNC pin. Applying a square wave (0.5–2.25MHz) to this pin locks the internal oscillator to the external source with <10ns jitter, enabling deterministic timing in multi-rail systems. During sync, the device operates in forced continuous mode and automatically adjusts slope compensation.
How does the Silent Switcher® architecture in the LTC3311HV#PBF reduce EMI?
The LTC3311HV#PBF implements Silent Switcher® 1 through symmetrical power train layout, integrated input capacitors, and differential SW node routing. This cancels magnetic fields and minimizes high-di/dt loop area-achieving >30dB lower radiated emissions than conventional buck converters and meeting CISPR25 Class 5 limits without external EMI filters or shielding.
What is the function of the SSTT pin on the LTC3311HV#PBF?
The SSTT pin on the LTC3311HV#PBF serves three functions: (1) Soft-start timing via 10μA current charging an external capacitor; (2) Output voltage tracking during startup; (3) Die temperature monitoring post-startup (≈4mV/°C). During faults, it pulls low to trigger automatic soft-start recovery-ensuring robust operation after short-circuit events.
Can the LTC3311HV#PBF operate in 100% duty cycle mode?
Yes, the LTC3311HV#PBF supports true 100% duty cycle operation, allowing VOUT to track VIN down to VOUT = VIN − (IOUT × RDS(ON)_PMOS) − IOUT × RINDUCTOR. This enables seamless dropout behavior during low-input conditions like automotive cold-crank, maintaining regulation without discontinuous conduction or voltage collapse.
LTC3311HV#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- Silent Switcher®1
- Package/Case:
- 18-TFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.25V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.5V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 12.5A
- Frequency - Switching:
- 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 18-LQFN (3x3)
LTC3311HV#PBF FAQ
1.How can I place an order for LTC3311HV#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3311HV#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3311HV#PBF reliable?
The price and inventory of LTC3311HV#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3311HV#PBF is usually 5 days.
3.What payment methods are accepted for LTC3311HV#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3311HV#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3311HV#PBF?
LTC3311HV#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3311HV#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3311HV#PBF?
For technical support, including LTC3311HV#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3311HV#PBF requirements.
6.How does Aetrix verify that LTC3311HV#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3311HV#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3311HV#PBF meets industry standards.
7.What is the process for return or replacement of LTC3311HV#PBF?
All LTC3311HV#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3311HV#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3311HV#PBF part is unused and in its original packaging.
Return procedure for LTC3311HV#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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