Analog Devices Inc. LTC3370IUH#PBF
- Part No.:
- LTC3370IUH#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
LTC3370IUH#PBF.pdf
- Description:
- IC REG BUCK ADJ 2A QUAD 32QFN
- Quantity:
- Payment:

- Shipping:

Inventory:579
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3370IUH#PBF from Analog Devices (formerly Linear Technology) is a configurable 4-channel synchronous buck DC/DC power supply IC integrating eight 1A power stages. It supports input voltages from 2.25V to 5.5V per channel, delivers up to 4A per output via programmable stage combining, and operates at a default 2MHz switching frequency with ±10% tolerance. It enables autonomous power-up sequencing in automotive infotainment and industrial FPGA power systems.
For engineers reviewing the LTC3370IUH#PBF datasheet, LTC3370IUH#PBF pinout, LTC3370IUH#PBF application, or LTC3370IUH#PBF equivalent, key selection criteria include its 8-stage configurability (1A–4A per channel), precision enable thresholds (±30mV), PGOODALL fault reporting, die temperature monitoring (220mV @ 25°C, +7mV/°C), and 32-lead 5mm × 5mm QFN package with exposed thermal pad.
Technical Context
The LTC3370IUH#PBF implements a shared-power-stage architecture where eight independent 1A synchronous buck regulators are grouped into four output channels via C1–C3 configuration pins. Each channel draws from a dedicated VIN rail (VINA–VINH), enabling true input isolation across domains.
Its control logic supports dual operating modes: Burst Mode® for ultra-low-noise light-load efficiency (63µA for one active channel) or forced continuous conduction mode via PLL/MODE pin. Switching phases are staggered by 90° to reduce input ripple, and PGOODALL asserts low only when all enabled outputs meet regulation thresholds (98% for Buck 1, 95% for Bucks 2–4).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.25V to 5.5V per VIN rail - supports mixed-supply systems with independent domain inputs |
| Output Current Configurability | 1A to 4A per channel via C1–C3 pin programming - enables 2-, 3-, or 4-output designs from single IC |
| Switching Frequency | 1MHz to 3MHz (RT-programmable) or 2MHz default - balances efficiency vs. size; phase-shifted 90° reduces input capacitor stress |
| Enable Threshold Accuracy | VHI(ALLOFF) = 730–1200mV - ensures reliable power-up sequencing without external supervision |
| Quiescent Current | 63µA (1 channel active, Burst Mode) - extends battery life in always-on subsystems |
| Die Temperature Sensing | 220mV @ 25°C, +7mV/°C - provides direct analog readout for thermal management without external sensor |
| Overtemperature Protection | 170°C shutdown with 10°C hysteresis - prevents permanent damage during sustained overload |
Pinout & Package
The LTC3370IUH#PBF is housed in a thermally enhanced 32-lead 5mm × 5mm plastic QFN package with exposed GND pad (Pin 33), requiring soldering to PCB for thermal and electrical integrity. θJA = 34°C/W, θJC = 3°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINA–VINH (Pins 1,4,5,8,17,20,21,24) | Independent input supplies | Eight isolated VIN rails allow separate power domains (e.g., I/O, core, analog, memory) |
| SWA–SWH (Pins 2,3,6,7,18,19,22,23) | Buck switch nodes | Connect directly to external inductors; each drives one 1A power stage |
| FB1–FB4 (Pins 9,16,25,32) | Output voltage feedback | Resistor-divider inputs setting VOUT; FBx must be grounded if corresponding buck is disabled |
| EN1–EN4 (Pins 10,15,26,31) | Channel enable inputs | Active-high logic; precise thresholds (±30mV) support autonomous sequencing |
| C1–C3 (Pins 11–13) | Configuration control bits | Set 1A–4A per channel via binary encoding; tied to VCC or GND - no floating allowed |
| PGOODALL (Pin 14) | Global power-good status | Open-drain output low if any enabled buck falls below regulation threshold (95–98% of setpoint) |
| TEMP (Pin 30) | Digital die temperature monitor | Analog voltage output (220mV @ 25°C, +7mV/°C) for real-time thermal telemetry |
| RT (Pin 27) | Oscillator frequency programming | Resistor-to-GND sets fSW (1–3MHz); tie to VCC for 2MHz internal clock |
| PLL/MODE (Pin 28) | Mode & sync control | Pull to GND → Burst Mode; tie to VCC → forced CCM; drive with external clock → synchronization |
Key Features
| Feature | Design Value |
|---|---|
| 8 × 1A configurable power stages | Enables flexible multi-rail designs (e.g., 2×4A, 3×2.67A, 4×2A) without redesigning layout or BOM |
| Independent VIN supplies per stage | Supports heterogeneous input sources (e.g., 3.3V I/O + 5V USB + 2.5V battery backup) with no cross-coupling |
| 90° phase-shifted switching | Reduces RMS input current by ~30%, allowing smaller input capacitors and lower EMI |
| Zero-current shutdown | Draws <2.5µA total when all bucks disabled - critical for battery-backed retention circuits |
| Integrated die temperature sensing | Eliminates need for external thermal sensor; enables closed-loop thermal derating in firmware |
Applications
| Automotive ADAS Camera Module | Industrial PLC I/O Power |
|---|---|
Use Scenario: Dual-voltage power for image sensor (1.2V core) and ISP (1.8V I/O) with strict startup sequencing and thermal monitoring. IC Role / Device Role / Timing Role: Single-chip quad-buck regulator providing isolated, sequenced 1.2V/2A and 1.8V/2A rails with PGOODALL validation and die temp telemetry. Use Value: Reduces component count by 75% vs. discrete buck solutions while meeting AEC-Q100 Grade I (–40°C to 125°C) requirements. | Use Scenario: Distributed 3.3V and 5V rails for digital I/O expansion modules with variable load profiles and ambient temperature swings. IC Role / Device Role / Timing Role: Configurable 2-output buck (3.3V/3A + 5V/2A) using six combined stages, with independent VIN sourcing and auto-sequencing. Use Value: Enables field-reconfigurable power architecture via C1–C3 pins - no hardware change needed for new I/O variants. |
| FPGA Core & Auxiliary Rail Supply | Medical Imaging Sensor Bias |
Use Scenario: High-precision, low-noise 0.85V core and 1.2V auxiliary rails for Xilinx Zynq UltraScale+ MPSoC with dynamic voltage scaling. IC Role / Device Role / Timing Role: Four-buck configuration (0.85V/4A + 1.2V/2A + 1.8V/1A + 2.5V/1A) with Burst Mode for standby and forced CCM during processing. Use Value: Achieves <90% efficiency at 10mA load (Burst Mode) and <94% at full load - minimizes heat in sealed enclosures. | Use Scenario: Stable, low-ripple bias for CMOS image sensors in portable ultrasound probes requiring sub-100µV noise and thermal drift compensation. IC Role / Device Role / Timing Role: Triple-buck setup (2.8V/1A analog bias, 1.8V/1A digital, 3.3V/1A interface) with phase-shifted switching and TEMP-based gain calibration. Use Value: 90° phasing cuts input ripple by 40%, enabling smaller ceramic input caps; die temp data corrects sensor offset in real time. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multichannel buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65218D0RSLR | Fixed 4-output PMIC (1.0V/1.2V/1.8V/3.3V); no VIN isolation; max 3A total; no die temp sensing | Targeted at Sitara AM335x/AM437x processors; lacks independent VIN rails and programmable current staging | Select when using TI ARM processors and fixed-rail requirements outweigh flexibility needs |
| ISL91211AIRZ-T | 4-channel buck with 3A/3A/2A/2A fixed assignment; supports 2.5V–5.5V VIN; includes I²C interface | Requires microcontroller coordination; no pin-strapped configuration; higher quiescent current (120µA in DCM) | Choose for systems needing dynamic reconfiguration via host MCU rather than hardware-only setup |
Compared with TPS65218D0RSLR and ISL91211AIRZ-T, the LTC3370IUH#PBF uniquely combines hardware-configurable current staging, eight independent VIN inputs, integrated die temperature sensing, and zero-current shutdown - making it optimal for rugged, autonomous, thermally constrained embedded systems where layout simplicity and thermal intelligence are critical.
Availability
LTC3370IUH#PBF is available at Aetrix Electronics and suitable for automotive ADAS, industrial PLCs, FPGA power delivery, and medical imaging systems requiring stable component supply, extended temperature operation (–40°C to 125°C), and long-term obsolescence management.
Supply support for LTC3370IUH#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous automotive and industrial qualification standards.
The LTC3370IUH#PBF belongs to Linear's configurable multichannel buck regulator family, designed specifically for space-constrained, thermally demanding applications requiring flexible, isolated, and autonomous power delivery without microcontroller dependency.
FAQ
What is the operating temperature range for the LTC3370IUH#PBF?
The LTC3370IUH#PBF is rated for –40°C to 125°C junction temperature and is qualified for industrial and automotive applications. Its overtemperature protection activates at 170°C with 10°C hysteresis, and the exposed thermal pad (Pin 33) must be soldered to PCB copper for effective heat dissipation. This grade (I) guarantees full electrical specifications across the entire –40°C to 125°C range.
How do I configure the LTC3370IUH#PBF for a 3-output design with currents of 2A, 3A, and 3A?
To configure the LTC3370IUH#PBF for 2A/3A/3A outputs, set C1=LOW, C2=HIGH, C3=LOW per Table 1 in the datasheet. This assigns two 1A stages to Buck 1 (2A), three to Buck 2 (3A), and three to Buck 3 (3A), leaving Buck 4 disabled. Ensure FB4 and EN4 are grounded, and route appropriate inductors and feedback dividers for each active output. The LTC3370IUH#PBF supports exactly this 2+3+3 configuration out-of-the-box.
Does the LTC3370IUH#PBF support synchronization to an external clock?
Yes, the LTC3370IUH#PBF supports external clock synchronization via the PLL/MODE pin (Pin 28). When driven with a clean CMOS clock signal (1MHz–3MHz, tLOW/tHIGH > 40ns), all internal switches lock to the external frequency and operate in forced continuous conduction mode. Slope compensation automatically adapts to the applied clock frequency, preserving stability across the full range.
What is the purpose of the PGOODALL pin on the LTC3370IUH#PBF?
The PGOODALL pin (Pin 14) is an open-drain output that signals global power-good status. It pulls low if *any* enabled buck regulator's output falls below its respective PGOOD threshold (98% of setpoint for Buck 1, 95% for Bucks 2–4) or if all bucks are disabled. This single-pin fault indicator simplifies system-level power sequencing and monitoring without requiring individual PGOOD lines for each channel - a key feature of the LTC3370IUH#PBF.
Can the LTC3370IUH#PBF operate with different input voltages on each VIN pin?
Yes, the LTC3370IUH#PBF is explicitly designed for independent input supplies: VINA–VINH accept 2.25V to 5.5V each, and may be sourced from different rails (e.g., VINA = 3.3V, VINB = 5V, VINC = 2.5V). This isolation prevents cross-regulation and enables mixed-domain power architectures - a defining capability of the LTC3370IUH#PBF not found in most quad-buck PMICs.
LTC3370IUH#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 4
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 2A
- Frequency - Switching:
- 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-QFN (5x5)
LTC3370IUH#PBF FAQ
1.How can I place an order for LTC3370IUH#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3370IUH#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3370IUH#PBF reliable?
The price and inventory of LTC3370IUH#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3370IUH#PBF is usually 5 days.
3.What payment methods are accepted for LTC3370IUH#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3370IUH#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3370IUH#PBF?
LTC3370IUH#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3370IUH#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3370IUH#PBF?
For technical support, including LTC3370IUH#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3370IUH#PBF requirements.
6.How does Aetrix verify that LTC3370IUH#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3370IUH#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3370IUH#PBF meets industry standards.
7.What is the process for return or replacement of LTC3370IUH#PBF?
All LTC3370IUH#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3370IUH#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3370IUH#PBF part is unused and in its original packaging.
Return procedure for LTC3370IUH#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3370IUH#PBF Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
