Analog Devices Inc. LTC3407AEDD-2#PBF
- Part No.:
- LTC3407AEDD-2#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC3407AEDD-2#PBF.pdf
- Description:
- IC REG BUCK ADJ 800MA DL 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:628
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Product details
Overview
LTC3407AEDD-2#PBF from Analog Devices (formerly Linear Technology) is a dual-channel synchronous step-down DC/DC regulator IC designed for low-power portable systems. It delivers up to 800mA per channel from a 2.5V–5.5V input, features 2.25MHz fixed-frequency operation, 0.6V feedback reference, and integrated 0.35Ω P-channel / 0.30Ω N-channel MOSFETs - enabling compact 3mm × 3mm DFN designs in battery-powered digital cameras and cellular handsets.
For engineers reviewing the LTC3407AEDD-2#PBF datasheet, LTC3407AEDD-2#PBF pinout, LTC3407AEDD-2#PBF application, or LTC3407AEDD-2#PBF equivalent, key selection criteria include its dual-output burst-mode efficiency (95% peak), ±8.5% POR threshold, 40μA light-load quiescent current, and 100% duty-cycle dropout capability - all validated for –40°C to +85°C industrial temperature operation.
Technical Context
The LTC3407AEDD-2#PBF employs a constant-frequency current-mode control architecture with shared 2.25MHz clocking across both channels, enabling precise in-phase switching and fast transient response. Its error amplifier compares VFB against a trimmed 0.6V internal reference, while overvoltage/undervoltage comparators feed a 65,536-cycle POR timer that asserts an open-drain reset signal only when both outputs remain within ±8.5% regulation.
Operation supports two selectable light-load modes via the MODE/SYNC pin: Burst Mode® (40μA IQ, <35mVPk-Pk ripple) and Pulse Skip Mode (lower ripple, higher IQ). In dropout, the P-channel top switch remains fully on (100% duty cycle), sustaining output down to VIN – IOUT×RDS(ON), with thermal limits defined by θJA = 45°C/W and TJMAX = 125°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5V to 5.5V - supports single-cell Li-ion, 3.3V/5V rails, and USB-powered systems without external LDO pre-regulation. |
| Switching Frequency | 2.25MHz (typ) - enables use of sub-2.2μH inductors ≤1mm height and ceramic capacitors <10μF for ultra-thin PCB layouts. |
| Output Current per Channel | 800mA continuous - sufficient for dual-core processors, image sensors, or RF transceivers in handheld devices. |
| Feedback Reference Voltage | 0.6V ±2% - sets output from 0.6V to 5V using standard resistor dividers; minimizes divider current loss vs. 1.25V references. |
| Quiescent Current (Burst Mode) | 40μA (typ) - extends battery runtime in standby states (e.g., camera sleep mode) without compromising wake-up speed. |
| Power-On Reset Threshold | ±8.5% output deviation - provides deterministic system reset timing after power-up or brownout recovery. |
| Top/Bottom RDS(ON) | 0.35Ω / 0.30Ω (typ) - eliminates need for external Schottky diodes and reduces conduction loss at 800mA load. |
Pinout & Package
Package: 10-Lead (3mm × 3mm) Plastic DFN with exposed thermal pad (Pin 11 = PGND). Requires solder connection of exposed pad to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VFB1 (Pin 1) | Regulator 1 Feedback Input | Connects to resistive divider from VOUT1; 30nA input bias enables high-value dividers for minimal quiescent loss. |
| RUN/SS1 (Pin 2) | Regulator 1 Enable & Soft-Start | High = enable; RC network here controls output ramp rate to prevent inrush current in sensitive loads. |
| VIN (Pin 3) | Main Power Input | Supplies both channels; requires local 10μF ceramic decoupling to suppress high-frequency switching noise. |
| SW1 (Pin 4) | Regulator 1 Switch Node | Connects directly to inductor; voltage swings between VIN and GND - must be routed with minimal loop area. |
| GND (Pin 5) | Main Signal Ground | Reference for control circuitry; separate from PGND (exposed pad) but tied together at single point near CIN/COUT. |
| MODE/SYNC (Pin 6) | Mode Selection & Clock Sync | Tied to VIN = Burst Mode; tied to GND = Pulse Skip Mode; driven externally = synchronizes both channels to external clock. |
| SW2 (Pin 7) | Regulator 2 Switch Node | Identical function to SW1; independent inductor connection allows asymmetric output configurations. |
| POR (Pin 8) | Power-On Reset Output | Open-drain active-low signal; asserts until both VOUT1/VOUT2 stabilize within ±8.5% for ≥29ms (pulse skip) or longer (burst). |
| RUN/SS2 (Pin 9) | Regulator 2 Enable & Soft-Start | Independent control of second channel; enables staggered startup or dynamic power sequencing. |
| VFB2 (Pin 10) | Regulator 2 Feedback Input | Functionally identical to VFB1; supports independent output voltage programming per channel. |
Key Features
| Feature | Design Value |
|---|---|
| Dual synchronous buck topology | Eliminates external Schottky diodes, reducing BOM count and board area while improving efficiency at 800mA loads. |
| Burst Mode® operation | 40μA total quiescent current with <35mVPk-Pk output ripple - optimized for battery longevity in intermittent-use devices. |
| Externally synchronizable oscillator | Prevents beat frequencies in multi-regulator systems; forces Pulse Skip Mode during sync to ensure deterministic timing. |
| 100% duty-cycle dropout | Maintains regulated output as VIN approaches VOUT; critical for Li-ion discharge curves where voltage drops from 4.2V to 3.0V. |
| Power-On Reset with programmable delay | 65,536-cycle timer ensures reliable microcontroller initialization after power stabilization, even under light-load burst conditions. |
Applications
| Digital Camera Core Power | Cellular Phone Baseband |
|---|---|
Use Scenario: Dual-rail power for CMOS image sensor (1.8V) and ISP processor (2.5V) in compact camera modules. IC Role / Device Role / Timing Role: Dual synchronous buck regulator delivering tightly regulated, low-noise supplies with coordinated soft-start. Use Value: 2.25MHz switching avoids audible noise in lens actuation circuits while 40μA Burst Mode extends standby time between photo captures. |
Use Scenario: Independent 1.2V core and 2.8V I/O rails for baseband SoC in GSM/UMTS handsets. IC Role / Device Role / Timing Role: Dual-channel DC/DC converter with POR-driven reset sequencing for safe boot under variable battery voltage. Use Value: ±8.5% POR threshold ensures reliable MCU reset across full Li-ion discharge range (4.2V → 3.0V), preventing corrupted firmware execution. |
| Wireless Modem RF Front-End | PDA Application Processor |
Use Scenario: Clean 3.3V supply for PA driver and 1.8V for RF transceiver in DSL/wireless modems. IC Role / Device Role / Timing Role: High-frequency buck regulator minimizing EMI coupling into sensitive RF paths via small passive components. Use Value: Sub-2.2μH inductors and 10μF ceramic caps enabled by 2.25MHz operation reduce layout parasitics and improve RF isolation. |
Use Scenario: Dual-core ARM processor requiring 1.1V core and 3.3V peripheral voltage in palm-sized computing devices. IC Role / Device Role / Timing Role: Dual-output regulator with independent RUN/SS pins supporting dynamic voltage scaling and power gating. Use Value: 100% duty-cycle dropout sustains 1.1V core rail down to 1.2V input, maximizing usable battery capacity before shutdown. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023BRSBR | Triple-output (2 buck + 1 LDO); 2.25MHz switching; 0.6V ref; but higher 100μA IQ in low-power mode. | Includes integrated LDO for analog rails; suited for systems needing >2 regulated supplies. | Select if third rail or tighter analog supply noise specs are required; not drop-in due to pin count and feature set mismatch. |
| RT8059GQW | Dual 2A buck; 1.5MHz switching; 0.6V ref; 75μA IQ; no POR or SYNC pin; MSOP-10 package only. | Lacks power-on reset and external synchronization - unsuitable for sequenced boot or EMI-sensitive multi-regulator systems. | Choose for higher current needs where Burst Mode efficiency and deterministic reset are non-critical. |
Compared with TPS65023BRSBR and RT8059GQW, the LTC3407AEDD-2#PBF uniquely combines dual 800mA outputs, 40μA Burst Mode IQ, ±8.5% POR, and 2.25MHz sync capability in a 3mm × 3mm DFN - making it optimal for space-constrained, battery-sensitive dual-rail applications where timing determinism and ultra-low standby power are mandatory.
Availability
LTC3407AEDD-2#PBF is available at Aetrix Electronics and suitable for digital cameras, cellular handsets, wireless modems, and portable medical monitors requiring stable component supply across industrial temperature ranges.
Supply support for LTC3407AEDD-2#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors.
The LTC3407A series was engineered specifically for ultra-compact, high-efficiency dual-output power conversion in portable consumer electronics - emphasizing low quiescent current, small passives, and robust thermal performance in DFN packages.
FAQ
What is the maximum output current per channel for the LTC3407AEDD-2#PBF?
The LTC3407AEDD-2#PBF delivers up to 800mA continuously per channel under typical conditions (TA = 25°C, 2.2μH inductor, 10μF ceramic output cap). Peak switch current limit is 1.2A (typ), but sustained output is thermally limited by the 3mm × 3mm DFN package's θJA = 45°C/W rating - derating is required above 85°C ambient or with poor PCB copper area.
Does the LTC3407AEDD-2#PBF require external Schottky diodes?
No, the LTC3407AEDD-2#PBF does not require external Schottky diodes. It integrates low-RDS(ON) P-channel (0.35Ω typ) and N-channel (0.30Ω typ) MOSFETs per channel to implement fully synchronous rectification - eliminating diode forward-voltage losses and improving efficiency, especially at higher loads.
How does the MODE/SYNC pin affect operation of the LTC3407AEDD-2#PBF?
The MODE/SYNC pin on the LTC3407AEDD-2#PBF selects between Burst Mode® (pin tied to VIN) for highest light-load efficiency (40μA IQ) or Pulse Skip Mode (pin tied to GND) for lowest output ripple. When driven by an external clock, it synchronizes both channels' switching to that frequency and forces Pulse Skip Mode for deterministic timing.
What is the purpose of the POR pin on the LTC3407AEDD-2#PBF?
The POR (Power-On Reset) pin on the LTC3407AEDD-2#PBF is an open-drain output that pulls low whenever either VOUT1 or VOUT2 deviates by more than ±8.5% from regulation. It releases high after 65,536 clock cycles (≈29ms in Pulse Skip Mode) once both outputs stabilize - providing a reliable reset signal for microcontrollers during power-up or brownout recovery.
Can the LTC3407AEDD-2#PBF operate with input voltage below 2.5V?
No, the LTC3407AEDD-2#PBF has a specified minimum input voltage of 2.5V per Absolute Maximum Ratings and Electrical Characteristics tables. Operation below 2.5V may cause undervoltage lockout activation or unstable regulation. The device incorporates UVLO that disables switching when VIN drops below ~1.65V to prevent erratic behavior.
LTC3407AEDD-2#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5V
- Current - Output:
- 800mA
- Frequency - Switching:
- 2.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LTC3407AEDD-2#PBF FAQ
1.How can I place an order for LTC3407AEDD-2#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3407AEDD-2#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3407AEDD-2#PBF reliable?
The price and inventory of LTC3407AEDD-2#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3407AEDD-2#PBF is usually 5 days.
3.What payment methods are accepted for LTC3407AEDD-2#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3407AEDD-2#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3407AEDD-2#PBF?
LTC3407AEDD-2#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3407AEDD-2#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3407AEDD-2#PBF?
For technical support, including LTC3407AEDD-2#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3407AEDD-2#PBF requirements.
6.How does Aetrix verify that LTC3407AEDD-2#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3407AEDD-2#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3407AEDD-2#PBF meets industry standards.
7.What is the process for return or replacement of LTC3407AEDD-2#PBF?
All LTC3407AEDD-2#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3407AEDD-2#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3407AEDD-2#PBF part is unused and in its original packaging.
Return procedure for LTC3407AEDD-2#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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