My Inquiry
My Account
Analog Devices Inc. LTC3546IUFD#PBF
- Part No.:
- LTC3546IUFD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC3546IUFD#PBF.pdf
- Description:
- IC REG BUCK ADJ 1A/2A DL 28QFN
- Quantity:
- Payment:
- Shipping:
Inventory:5,441
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3546IUFD#PBF from Analog Devices (formerly Linear Technology) is a dual synchronous step-down DC/DC regulator with configurable 3A/1A or 2A/2A output capability, operating from 2.3V to 5.5V input and delivering adjustable outputs from 0.6V to 5V per channel. It integrates low RDS(ON) internal MOSFETs (0.096Ω top/0.085Ω bottom for SW2A/B), supports 2.25MHz fixed or 0.75–4MHz programmable switching frequency, and delivers up to 96% efficiency in Burst Mode - used in point-of-load power for ultra-mobile PCs and DSL modems.
For engineers reviewing the LTC3546IUFD#PBF datasheet, LTC3546IUFD#PBF pinout, LTC3546IUFD#PBF application, or LTC3546IUFD#PBF equivalent, key selection considerations include dual-channel current-mode control, SW1D-dependent configuration flexibility, PGOOD monitoring per channel, thermal performance in the 4mm × 5mm QFN package, and mode-selectable operation (Burst/Pulse-Skipping/Forced Continuous) for ripple-efficiency trade-offs.
Technical Context
The LTC3546IUFD#PBF implements a constant-frequency current-mode architecture with shared oscillator and phase-selectable (in-phase or 180° out-of-phase) dual regulators. Each channel uses independent error amplifiers (2.5MHz GBW), internal 0.6V reference, and peak-current limiting controlled via ITH pins (0–1.5V range).
Its configurable topology relies on external connection of SW1D to either SW1 (enabling 2A/2A) or SW2A/B (enabling 3A/1A), with auto-detection logic and dedicated BMC pins (0–0.6V clamp) for Burst Mode threshold setting. The device supports internal soft-start (1.2ms), external tracking, and synchronization via SYNC/MODE pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.3V to 5.5V - supports single-cell Li-ion, USB, and intermediate bus rails without pre-regulation. |
| VOUT Range | 0.6V to 5V per channel - enables core voltage scaling for processors, FPGAs, and memory subsystems. |
| Switching Frequency | 2.25MHz fixed or 0.75–4MHz adjustable - allows compact magnetics and avoids AM band interference. |
| Peak Efficiency | Up to 96% - achieved using synchronous rectification and low RDS(ON) integrated switches (no external Schottky diodes required). |
| Shutdown Current | <1µA - enables long battery life in always-on systems with deep sleep states. |
| Power Good Threshold | –8% deviation from regulation - provides reliable rail sequencing and fault detection for downstream logic. |
| Operating Temp Range | –40°C to +125°C - qualified for industrial and extended-temperature embedded applications. |
Pinout & Package
The LTC3546IUFD#PBF is housed in a thermally enhanced 28-lead (4mm × 5mm) plastic QFN package with exposed pad (Pin 29 = GNDD), θJA = 34°C/W. Pin numbering follows top-view UFD package layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SW1 | Channel 1 switch node | Connects to 1A high-side P-MOSFET; swings between VIN1 and PGND1 - defines primary 1A output path. |
| SW1D | Dependent switch node | Externally connected to SW1 (→ 2A/2A) or SW2A/B (→ 3A/1A); auto-detected configuration determines current limit and control coupling. |
| SW2A/SW2B | Channel 2 switch nodes | Must be tied together externally; drive 2A high-side P-MOSFET - forms 2A output leg with shared inductor connection. |
| BMC1/BMC2 | Burst Mode clamp inputs | Set Burst threshold (0–0.6V) per channel; tie to GND to disable Burst Mode on that regulator. |
| TRACK/SS1/SS2 | Tracking/soft-start inputs | Enable output voltage ramp control: floating → internal 1.2ms soft-start; capacitor → programmable ramp; external voltage → supply tracking. |
| PGOOD1/PGOOD2 | Open-drain power-good outputs | Pull low when respective VOUT deviates >–8% - used for system enable sequencing and fault signaling. |
| FREQ | Oscillator frequency control | Tie to VCCA → 2.25MHz; connect resistor to GNDA → 0.75–4MHz; use with RC network for sync PLL compensation. |
| SYNC/MODE | Mode selection & sync input | Voltage level selects Burst (>VIN–0.5V), Pulse-Skipping (<0.5V), or Forced Continuous (≈VIN/2); also accepts external clock for synchronization. |
Key Features
| Feature | Design Value |
|---|---|
| Dual configurable output topology | Supports 3A/1A (SW1D→SW2A/B) or 2A/2A (SW1D→SW1) via single external trace - eliminates need for separate regulators in space-constrained designs. |
| Low-noise Burst Mode operation | 30mVP-P output ripple at light load with 160µA quiescent current - maintains high efficiency without compromising signal integrity in noise-sensitive analog circuits. |
| 100% duty-cycle low-dropout capability | Enables VOUT ≥ VIN operation during brown-out or battery sag - sustains critical loads without dropout-induced reset. |
| Independent channel enable & phase control | RUN1/RUN2 allow staggered startup or independent shutdown; PHASE pin selects in-phase or 180° out-of-phase switching - reduces input capacitance RMS current and EMI. |
| Integrated protection functions | Short-circuit protection, undervoltage lockout (2.03V rising), and thermal shutdown - ensures robust operation under fault conditions without external circuitry. |
Applications
| Netbooks / Ultra-Mobile PCs | Wireless Modems |
|---|---|
Use Scenario: Powering CPU core (1.2V/1A) and DDR memory (2.5V/3A) from single 3.6V Li-ion battery in fanless portable devices. IC Role / Device Role / Timing Role: Dual-channel buck regulator providing tightly regulated, sequenced, and tracked outputs with Burst Mode for standby efficiency. Use Value: Eliminates discrete regulators and external diodes; achieves >94% efficiency at 100mA load on both channels while maintaining <30mV ripple. | Use Scenario: Supplying RF transceiver (1.8V/2A) and baseband processor (1.2V/1A) in LTE/5G CPE modems with strict thermal limits. IC Role / Device Role / Timing Role: Configurable 2A/2A regulator with 180° phase shift to minimize input capacitor RMS current and reduce board-level EMI. Use Value: Reduces input ripple by ~30% vs. in-phase operation; enables use of smaller 22µF ceramic input cap instead of larger tantalum. |
| Point-of-Load DC/DC Conversion | PC Cards (PCMCIA) |
Use Scenario: Delivering 1.8V/3A and 3.3V/1A from 5V bus to FPGA I/O banks and core logic in industrial control modules. IC Role / Device Role / Timing Role: Dual buck controller supporting external tracking (VOUT2 tracks VOUT1) for safe power-up sequencing and voltage margining. Use Value: Ensures VOUT2 ramps only after VOUT1 reaches regulation - prevents latch-up in mixed-voltage ASICs. | Use Scenario: Generating 3.3V/2A and 1.5V/1A from 5V host interface for hot-pluggable PCMCIA cards with tight insertion-time constraints. IC Role / Device Role / Timing Role: Fast-starting dual regulator with internal 1.2ms soft-start and PGOOD assertion for card enumeration handshake. Use Value: Meets PCMCIA spec requiring stable 3.3V within 100ms; PGOOD1/PGOOD2 signal host controller when both rails are valid. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65270RGET | Fixed 1.2MHz frequency; no SW1D-dependent reconfiguration; lower max output current (2.5A/1.5A); integrated LDOs. | Targeted at automotive infotainment with AEC-Q200 qualification; lacks Burst Mode and tracking capability. | Select when AEC-Q200 compliance and integrated LDOs outweigh configurability and light-load efficiency needs. |
| ISL95210IRZ | Supports Intel VR12.5/VR12.6 protocols; includes SVID interface; higher pin count; no SW1D topology flexibility. | Designed specifically for CPU voltage regulation in laptops; requires host microcontroller for dynamic VID changes. | Select only for Intel-compatible mobile platforms requiring SVID communication and adaptive voltage positioning. |
Compared with TPS65270RGET and ISL95210IRZ, the LTC3546IUFD#PBF offers unique SW1D-based topology reconfiguration, superior light-load efficiency via Burst Mode, and flexible tracking/soft-start - making it optimal for non-protocol-specific, space-constrained, multi-rail industrial and communications designs where design simplicity and thermal performance are prioritized.
Availability
LTC3546IUFD#PBF is available at Aetrix Electronics and suitable for netbooks, wireless modems, and point-of-load DC/DC conversion requiring stable component supply, extended temperature operation (–40°C to +125°C), and high-efficiency dual-output regulation.
Supply support for LTC3546IUFD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management ICs, serving industrial, automotive, communications, and aerospace markets.
The LTC3546IUFD#PBF belongs to Linear's high-efficiency monolithic DC/DC converter product line, designed specifically for medium-power, multi-rail embedded systems where board space, thermal performance, and light-load efficiency are critical constraints.
FAQ
What output configurations does the LTC3546IUFD#PBF support?
The LTC3546IUFD#PBF supports two primary configurations: 3A/1A (by connecting SW1D to SW2A/B) or 2A/2A (by connecting SW1D to SW1). This is enabled by internal auto-detection logic and does not require firmware or external configuration. Both configurations retain independent feedback, soft-start, and PGOOD monitoring per channel. The LTC3546IUFD#PBF datasheet confirms these modes are fully characterized across temperature and load.
How does the SYNC/MODE pin control operating modes on the LTC3546IUFD#PBF?
The SYNC/MODE pin selects three distinct operating modes: Burst Mode (>VIN – 0.5V), Pulse-Skipping (<0.5V), or Forced Continuous (≈VIN/2). It also serves as the external clock input for synchronization. When synchronized, Pulse-Skipping is enforced regardless of voltage level. All modes are implemented in hardware with no software dependency. The LTC3546IUFD#PBF electrical characteristics table specifies exact threshold voltages and leakage currents for this pin.
What is the purpose of the BMC1 and BMC2 pins on the LTC3546IUFD#PBF?
BMC1 and BMC2 set the Burst Mode clamp voltage per channel (0–0.6V range). Applying an external voltage here adjusts the ITH threshold at which Burst Mode activates, enabling fine-tuned efficiency/noise trade-offs. If tied to VCCA, the internal clamp level is used; if tied to GND, Burst Mode is disabled for that channel. The LTC3546IUFD#PBF pin function description explicitly defines this behavior and notes that floating is not allowed.
Can the LTC3546IUFD#PBF operate with 100% duty cycle, and under what conditions?
Yes, the LTC3546IUFD#PBF supports 100% duty cycle operation on both channels, enabling VOUT ≥ VIN regulation during input voltage sags or brown-out events. This is achieved by holding the high-side switch continuously on when the error amplifier demands maximum current. The LTC3546IUFD#PBF datasheet confirms this capability in the "Low Dropout Operation" feature list and specifies it applies across the full –40°C to +125°C temperature range.
What thermal performance can be expected from the LTC3546IUFD#PBF in its QFN package?
The LTC3546IUFD#PBF in the 4mm × 5mm QFN (UFD) package has a specified θJA of 34°C/W under standard JEDEC PCB conditions. With proper PCB layout - including soldering the exposed pad (Pin 29 = GNDD) to a thermal plane - it sustains continuous 3A output on Channel 2 at +85°C ambient. The datasheet includes thermal derating curves and notes that junction temperature must remain ≤125°C for reliable operation. The LTC3546IUFD#PBF absolute maximum ratings confirm TJMAX = 125°C.
LTC3546IUFD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.3V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5V
- Current - Output:
- 1A, 2A
- Frequency - Switching:
- 2.25MHz, 750kHz ~ 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LTC3546IUFD#PBF FAQ
1.How can I place an order for LTC3546IUFD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3546IUFD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3546IUFD#PBF reliable?
The price and inventory of LTC3546IUFD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3546IUFD#PBF is usually 5 days.
3.What payment methods are accepted for LTC3546IUFD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3546IUFD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3546IUFD#PBF?
LTC3546IUFD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3546IUFD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3546IUFD#PBF?
For technical support, including LTC3546IUFD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3546IUFD#PBF requirements.
6.How does Aetrix verify that LTC3546IUFD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3546IUFD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3546IUFD#PBF meets industry standards.
7.What is the process for return or replacement of LTC3546IUFD#PBF?
All LTC3546IUFD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3546IUFD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3546IUFD#PBF part is unused and in its original packaging.
Return procedure for LTC3546IUFD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3546IUFD#PBF Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
