Analog Devices Inc. LTC3548EDD-2#PBF
- Part No.:
- LTC3548EDD-2#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC3548EDD-2#PBF.pdf
- Description:
- IC REG BCK BST ADJ/0.6V DL 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3548EDD-2#PBF from Analog Devices (formerly Linear Technology) is a dual-channel synchronous step-down DC/DC regulator with fixed 1.8V/800mA output on Channel 1 and adjustable 0.6V–VIN output on Channel 2, operating at 2.25MHz from a 2.5V–5.5V input. It integrates 0.35Ω P-channel and 0.30Ω N-channel MOSFETs, delivers up to 95% efficiency, and supports Burst Mode® for ultra-low quiescent current (40μA both channels) in portable power management.
For engineers reviewing the LTC3548EDD-2#PBF datasheet, LTC3548EDD-2#PBF pinout, LTC3548EDD-2#PBF application, or LTC3548EDD-2#PBF equivalent, key selection considerations include its dual-output architecture, 2.25MHz constant-frequency operation enabling sub-1.2mm profile inductors, mode-selectable light-load behavior (Burst Mode® vs pulse-skipping), integrated POR output, and thermally enhanced 10-lead 3mm × 3mm DFN package with exposed GND pad.
Technical Context
The LTC3548EDD-2#PBF employs a constant-frequency current-mode control architecture with shared 2.25MHz oscillator across both channels, supporting external synchronization via MODE/SYNC pin. Each channel uses independent error amplifiers comparing feedback voltage (0.6V reference for Channel 2, internal divider for Channel 1) against a precision 0.6V bandgap reference.
It implements dual-mode light-load operation: Burst Mode® (MODE/SYNC = VIN) minimizes gate charge losses by gating switching cycles, achieving 40μA total quiescent current; pulse-skipping mode (MODE/SYNC = GND) maintains constant frequency down to low loads for lower output ripple. Dropout operation enables 100% duty cycle with continuous P-channel MOSFET conduction.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5V to 5.5V - supports single-cell Li-ion, Li-polymer, and 3.3V/5V rail inputs without pre-regulation |
| Channel 1 Output | Fixed 1.8V ±1.8% at 800mA - internally set, eliminates external feedback resistors for compact low-voltage logic supply |
| Channel 2 Output | Adjustable 0.6V to VIN - configured via external resistor divider on VFB2, supports custom core voltages |
| Switching Frequency | 2.25MHz (±25%) - enables use of 2.2μH–4.7μH inductors ≤1.2mm height and small ceramic capacitors |
| Peak Switch Current Limits | 1.2A (CH1), 0.7A (CH2) - defines maximum inductor current before cycle-by-cycle current limiting activates |
| Quiescent Current | 40μA (both channels active) - extends battery runtime in always-on subsystems like real-time clocks or sensors |
| Shutdown Current | <1μA - ensures negligible drain during system sleep or storage |
| Feedback Reference Voltage | 0.600V ±2% (–40°C to 85°C) - sets accuracy baseline for Channel 2 output regulation and load/line transient performance |
Pinout & Package
Package: 10-lead (3mm × 3mm) plastic DFN with exposed thermal pad (Pin 11), rated for –40°C to 85°C ambient operation. Exposed pad must be soldered to PCB ground for thermal performance (θJA = 40°C/W) and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VFB2 (Pin 10) | Channel 2 feedback input | Connects to resistor divider output; 0.6V reference sets VOUT2 = 0.6V × (1 + R1/R2); input bias current ≤30nA minimizes divider error |
| RUN2 (Pin 9) | Channel 2 enable control | High = enable (pulled to VIN), low = shutdown (pulled to GND); no floating allowed; leakage ≤1μA |
| POR (Pin 8) | Power-On Reset open-drain output | Pulls low if either output falls >8.5% below regulation; releases after ~117ms (pulse-skipping) or delayed bursts (Burst Mode®) |
| SW2 (Pin 7) | Channel 2 switch node | Connects to inductor; swings between VIN and GND; requires low-inductance layout to minimize EMI and switching loss |
| MODE/SYNC (Pin 6) | Mode selection & sync input | VIN = Burst Mode®, GND = pulse-skipping, external 2.25MHz clock = forced pulse-skipping with synchronization |
| VOUT1 (Pin 1) | Channel 1 output | Fixed 1.8V output; internal feedback divider eliminates external components; supplies low-voltage logic or memory rails |
| RUN1 (Pin 2) | Channel 1 enable control | Identical function to RUN2; independent control allows staggered startup or selective channel disable |
| VIN (Pin 3) | Main input supply | 2.5V–5.5V input; requires local 10μF ceramic decoupling; absolute max = 6V |
| SW1 (Pin 4) | Channel 1 switch node | Identical role to SW2; layout symmetry critical for dual-channel EMI reduction |
| GND (Pin 5) | Analog/digital ground reference | Not internally connected; must be tied to PCB ground plane; separate from exposed pad (Pin 11) but electrically common |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent regulators | Enables simultaneous generation of fixed 1.8V logic rail and programmable core voltage (e.g., 2.5V, 3.3V) from single input, reducing BOM count and board area |
| Integrated 0.35Ω/0.30Ω MOSFETs | Eliminates need for external Schottky diodes or discrete switches, simplifying layout and improving efficiency over discrete solutions at 400–800mA loads |
| Burst Mode® operation | Reduces total quiescent current to 40μA while maintaining regulation, extending battery life in standby modes without sacrificing wake-up response |
| Externally synchronizable oscillator | Allows noise-sensitive systems (e.g., RF sections, audio codecs) to align switching frequency with system clock, avoiding beat frequencies and EMI peaks |
| Power-On Reset (POR) output | Provides system-level reset signaling when either output deviates >8.5% from target, enabling reliable microcontroller or FPGA initialization without external supervisor IC |
| 100% duty cycle dropout | Maintains regulation as input drops to within ~200mV of output (e.g., 1.8V out from 2.0V in), critical for battery end-of-discharge operation |
Applications
| PDAs / Palmtop PCs | Digital Cameras |
|---|---|
Use Scenario: Powering image sensor, ISP, and LCD controller from single-cell lithium battery with tight space constraints. IC Role / Device Role / Timing Role: LTC3548EDD-2#PBF provides regulated 1.8V for digital logic and adjustable 2.8V for analog sensor bias, both synchronized to avoid beat interference with image capture timing. Use Value: Dual outputs eliminate need for second regulator; 2.25MHz switching allows use of 2.2μH inductors ≤1.2mm height, meeting ultra-thin form factor requirements. | Use Scenario: Supplying processor core, memory, and CCD/CMOS sensor in compact point-and-shoot camera. IC Role / Device Role / Timing Role: LTC3548EDD-2#PBF delivers 1.8V for baseband processor and 3.3V for memory interface, with POR ensuring clean boot sequence after battery insertion or wake-up. Use Value: 40μA quiescent current extends standby time; Burst Mode® maintains regulation during long idle periods without compromising fast wake-up latency. |
| Cellular Phones | Portable Media Players |
Use Scenario: Generating application processor I/O voltage (1.8V) and RF transceiver bias (2.5V) in multi-band GSM/UMTS handsets. IC Role / Device Role / Timing Role: LTC3548EDD-2#PBF operates in pulse-skipping mode during call setup to minimize RF noise coupling into sensitive receiver paths. Use Value: MODE/SYNC pin synchronization to baseband clock suppresses switching artifacts in adjacent 100kHz–1MHz bands, improving receiver sensitivity. | Use Scenario: Powering audio DAC, flash memory, and display driver in MP3/MP4 players with 3.7V Li-ion battery. IC Role / Device Role / Timing Role: LTC3548EDD-2#PBF supplies 1.8V for NAND flash interface and adjustable 1.2V for low-power audio codec, with independent RUN pins enabling dynamic power gating. Use Value: Independent enable control reduces system power by 40μA when audio playback is paused, directly extending playback time per charge. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62400DRVR | Fixed 1.8V/1.5V dual outputs; 2.25MHz switching; 20μA quiescent current; no POR output; 6-pin WSON package | Lacks power-on reset signaling and adjustable second output; smaller package but no exposed thermal pad | Select when POR is unnecessary and fixed dual-rail generation suffices; verify thermal margin without exposed pad |
| MAX8646ETE+ | 1.8V/800mA + 1.2V–3.3V adjustable; 2.25MHz; 30μA IQ; integrated soft-start; 16-pin TQFN | Includes soft-start and higher integration but larger footprint; no MODE pin for burst/pulse-skipping selection | Choose when controlled ramp-up is required and board space permits 4mm × 4mm package; trade-off is loss of light-load noise/efficiency tuning |
Compared with TPS62400DRVR and MAX8646ETE+, the LTC3548EDD-2#PBF uniquely combines POR signaling, user-selectable light-load modes, and a thermally optimized 3mm × 3mm DFN-making it optimal for space-constrained, battery-powered systems requiring robust power sequencing and runtime optimization.
Availability
LTC3548EDD-2#PBF is available at Aetrix Electronics and suitable for portable media players, digital cameras, and cellular handsets requiring stable component supply, long-term lifecycle support, and guaranteed lead-free compliance.
Supply support for LTC3548EDD-2#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.
The LTC3548EDD-2#PBF belongs to Linear's µPower DC/DC converter family, designed specifically for ultra-low-power portable electronics where battery life, solution size, and system-level reliability (e.g., POR) are critical design constraints.
FAQ
What is the maximum output current capability of each channel in the LTC3548EDD-2#PBF?
The LTC3548EDD-2#PBF delivers up to 800mA on Channel 1 (fixed 1.8V) and up to 400mA on Channel 2 (adjustable 0.6V–VIN). These limits are defined by peak switch current ratings of 1.2A (CH1) and 0.7A (CH2), derated for thermal and efficiency considerations. Sustained 800mA operation requires proper PCB thermal design using the exposed GND pad.
How does the MODE/SYNC pin affect the operation of the LTC3548EDD-2#PBF?
The MODE/SYNC pin on the LTC3548EDD-2#PBF selects between Burst Mode® (pin tied to VIN, lowest IQ = 40μA) and pulse-skipping mode (pin tied to GND, lowest output ripple). When driven by an external 2.25MHz clock, it forces pulse-skipping mode and synchronizes switching edges to the rising edge of that clock-critical for EMI-sensitive applications.
Can the LTC3548EDD-2#PBF operate with input voltages below 2.5V?
No-the LTC3548EDD-2#PBF has a specified minimum input voltage of 2.5V per Absolute Maximum Ratings and Electrical Characteristics. Operation below 2.5V may cause unstable regulation or shutdown due to internal undervoltage lockout activation at ~1.65V. For sub-2.5V inputs, consider alternative regulators such as the LTC3562.
What is the purpose and behavior of the POR pin on the LTC3548EDD-2#PBF?
The POR (Power-On Reset) pin on the LTC3548EDD-2#PBF is an open-drain output that pulls low whenever either Channel 1 or Channel 2 output falls more than 8.5% below its regulated value. It releases (goes high-impedance) after ~117ms once both outputs are within regulation-timing varies with mode (longer in Burst Mode® due to intermittent clocking).
Is the LTC3548EDD-2#PBF RoHS-compliant and lead-free?
Yes-the LTC3548EDD-2#PBF carries the #PBF suffix, indicating it is lead-free and RoHS-compliant per Analog Devices' specifications. The device uses matte tin lead finish and meets JEDEC J-STD-020 moisture sensitivity level 1 (MSL1), suitable for standard reflow processes without special handling.
LTC3548EDD-2#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down, Step-Up/Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck, Buck-Boost
- Output Type:
- Adjustable (Fixed)
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V (1.8V)
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 700mA, 1.2A
- Frequency - Switching:
- 2.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LTC3548EDD-2#PBF FAQ
1.How can I place an order for LTC3548EDD-2#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3548EDD-2#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3548EDD-2#PBF reliable?
The price and inventory of LTC3548EDD-2#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3548EDD-2#PBF is usually 5 days.
3.What payment methods are accepted for LTC3548EDD-2#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3548EDD-2#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3548EDD-2#PBF?
LTC3548EDD-2#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3548EDD-2#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3548EDD-2#PBF?
For technical support, including LTC3548EDD-2#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3548EDD-2#PBF requirements.
6.How does Aetrix verify that LTC3548EDD-2#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3548EDD-2#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3548EDD-2#PBF meets industry standards.
7.What is the process for return or replacement of LTC3548EDD-2#PBF?
All LTC3548EDD-2#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3548EDD-2#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3548EDD-2#PBF part is unused and in its original packaging.
Return procedure for LTC3548EDD-2#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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