Analog Devices Inc. LTC3562EUD#PBF
- Part No.:
- LTC3562EUD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
LTC3562EUD#PBF.pdf
- Description:
- IC REG BUCK ADJ QUAD 20QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,663
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Product details
Overview
LTC3562EUD#PBF from Analog Devices (formerly Linear Technology) is a quad monolithic synchronous step-down DC/DC regulator with I²C interface, integrating two 600mA and two 400mA buck converters in a single 3mm × 3mm QFN-20 package. It supports programmable feedback (425–800mV, Type-A) and programmable output voltage (600mV–3.775V, Type-B), operates from 2.7V to 5.5V input, and delivers <100μA quiescent current in LDO mode - ideal for multi-rail Li-ion portable systems including digital still cameras and wireless modems.
For engineers reviewing the LTC3562EUD#PBF datasheet, LTC3562EUD#PBF pinout, LTC3562EUD#PBF application, or LTC3562EUD#PBF equivalent, key selection considerations include I²C-configurable dual-type regulation (Type-A FB vs Type-B VOUT), independent RUN pin control for R600A/R400A, 2.25MHz fixed switching frequency enabling compact 3.3μH/4.7μH inductors, thermal performance via exposed pad grounding, and mode-selectable efficiency optimization (Pulse Skip, Burst Mode, Forced Burst Mode, LDO).
Technical Context
The LTC3562EUD#PBF implements four independent current-mode synchronous buck regulators: R600A/R400A use external resistor dividers with I²C-programmable 425–800mV feedback references (25mV steps); R600B/R400B feature internal programmable dividers setting output voltages directly from 600mV to 3.775V (25mV steps). All regulators share a fixed 2.25MHz oscillator and support 100% duty-cycle dropout operation.
Each regulator offers four selectable operating modes - Pulse Skip (low-noise constant-frequency), Burst Mode (auto-switching between hysteretic and pulse-skip), Forced Burst Mode (fixed hysteretic sleep/wake cycles), and LDO Mode (linear regulation via SWx pin). RUN600A (active-low) and RUN400A (active-high) enable hardware-only startup without I²C, while R600B/R400B require I²C initialization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7V to 5.5V - supports single-cell Li-ion (3.4–4.2V) with margin for voltage drop and transient headroom. |
| Output Current Capability | R600A/R600B: up to 600mA; R400A/R400B: up to 400mA - enables simultaneous powering of core logic, memory, RF, and peripherals. |
| Switching Frequency | Fixed 2.25MHz (typ.) - allows use of small 3.3μH/4.7μH inductors and ceramic capacitors, reducing board area and cost. |
| I²C Interface | Standard-compliant up to 400kHz - enables dynamic voltage scaling, sequencing, and telemetry without additional GPIOs. |
| Quiescent Current | <100μA with all regulators in LDO mode; <0.1μA in full shutdown - extends battery runtime in standby and low-power states. |
| Operating Temperature | –40°C to +85°C - qualified for industrial and consumer portable equipment environments. |
| Package | 20-lead 3mm × 3mm QFN with exposed thermal pad - provides low θJA (68°C/W) and requires PCB soldering of pad for thermal and electrical integrity. |
Pinout & Package
Package: 20-lead (3mm × 3mm) plastic QFN with exposed pad (Pin 21 = GND), rated for –40°C to +85°C operation. Exposed pad must be soldered to PCB ground plane for thermal management and optimal EMI performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AGND (1) | Analog Ground Reference | Reference node for FB pins and internal analog circuitry; must connect to PGND at single point to avoid noise coupling. |
| FB400A (2) | Type-A Feedback Input | Sets R400A output via external resistor divider; servo voltage programmable from 425mV to 800mV in 25mV steps over I²C. |
| OUT400B (3) | Type-B Output Sense Node | Connects to top of internal programmable resistor divider for R400B; senses regulated output directly at CO for stability. |
| SW400B (4) | R400B Switch Node | Drain connection of internal PMOS/NMOS switches; routes to inductor; requires low-inductance layout to minimize EMI. |
| PGND (5,11) | Power Ground Return | Main return path for high-current switch paths; must be low-impedance copper pour tied to VIN capacitor negative terminal. |
| SW400A (6) | R400A Switch Node | Drain connection for R400A power stage; shares same design constraints as SW400B for layout integrity. |
| VIN (7,8,9) | Main Input Supply | Accepts 2.7–5.5V; multiple pins reduce IR drop and improve decoupling - requires ≥10μF ceramic capacitor per pin group. |
| SW600A (10) | R600A Switch Node | Drain connection for higher-current R600A regulator; layout critical for thermal and ripple performance. |
| SW600B (12) | R600B Switch Node | Drain connection for 600mA Type-B regulator; routed separately from other SW nodes to prevent cross-coupling. |
| OUT600B (13) | Type-B Output Sense Node | Feedback sense point for R600B; connects to internal programmable divider - bypass with ≥10μF ceramic to AGND. |
| FB600A (14) | Type-A Feedback Input | Sets R600A output via external divider; identical programming range and resolution as FB400A. |
| POR600A (15) | Power-On Reset Output | Open-drain signal asserting after 231ms delay when R600A reaches 92% of target - used for system sequencing. |
| RUN400A (16) | R400A Enable (Active High) | Hardware enable: >1.0V activates regulator with default 800mV FB and Pulse Skip mode if I²C unavailable. |
| RUN600A (17) | R600A Enable (Active Low) | Hardware enable: <0.3V activates regulator; OR'ed with I²C EN signal for fail-safe startup capability. |
| DVCC (18) | I²C Logic Supply | Sets SDA/SCL logic thresholds (VIH = 0.7×DVCC, VIL = 0.3×DVCC); UVLO at ~1V resets registers on brownout. |
| SCL (19) | I²C Clock Input | Master-generated clock up to 400kHz; referenced to DVCC; requires external pull-up resistor. |
| SDA (20) | I²C Data Bidirectional | Open-drain data line; referenced to DVCC; requires external pull-up resistor and glitch filtering. |
| Exposed Pad (21) | Thermal & Electrical GND | Mandatory solder connection to PCB ground plane - essential for thermal dissipation (θJA = 68°C/W) and noise reduction. |
Key Features
| Feature | Design Value |
|---|---|
| I²C-programmable dual-regulator types | Type-A (R600A/R400A): 16-step FB voltage (425–800mV); Type-B (R600B/R400B): 128-step VOUT (600mV–3.775V) - enables precise rail tuning without external resistors for Type-B. |
| Four selectable operating modes | Pulse Skip (low-noise), Burst Mode (adaptive), Forced Burst Mode (max efficiency at light load), LDO Mode (<100μA IQ) - dynamically optimized per rail based on real-time load demand. |
| Hardware RUN pin support | RUN600A (active-low) and RUN400A (active-high) allow standalone enable without I²C bus - critical for boot sequencing or I²C failure recovery. |
| Integrated slew-rate control | Patent-pending switch-node edge shaping reduces radiated EMI and conducted noise while maintaining >90% peak efficiency - eliminates need for ferrite beads in many layouts. |
| Power-on reset for R600A | POR600A open-drain output asserts after 231ms once R600A reaches 92% regulation - provides deterministic system-level power-good signaling. |
Applications
| Digital Still Camera Power Management | Wireless Modem Multi-Rail Supply |
|---|---|
Use Scenario: Simultaneous powering of CMOS image sensor (1.2V), ISP core (1.8V), memory interface (2.5V), and RF transceiver (3.3V) from single Li-ion cell. IC Role / Device Role / Timing Role: LTC3562EUD#PBF acts as primary PMIC delivering four independently controlled, sequenced, and monitored rails with dynamic voltage scaling. Use Value: Eliminates discrete LDOs and external resistors for Type-B rails; reduces BOM count by ≥6 components and PCB area by >30% versus discrete solutions. |
Use Scenario: Supporting baseband processor (1.2V/600mA), RF front-end (1.8V/400mA), memory (2.5V/400mA), and USB PHY (3.3V/600mA) in DSL/wireless modem. IC Role / Device Role / Timing Role: LTC3562EUD#PBF serves as integrated quad-buck controller with I²C-based real-time load adaptation and POR sequencing. Use Value: Enables burst-mode operation during idle periods (extending battery life >2×) and seamless transition to pulse-skip mode during data transmission (maintaining low noise). |
| Portable Instrument Core Logic Supply | MP3 Player Audio Subsystem |
Use Scenario: Providing stable, low-noise 1.2V core voltage for ARM Cortex-M microcontroller and 3.3V I/O rail in handheld test equipment. IC Role / Device Role / Timing Role: LTC3562EUD#PBF supplies regulated rails with LDO Mode for ultra-low-noise MCU operation and Pulse Skip Mode for clean I/O supply. Use Value: Achieves <20μVRMS output noise in LDO Mode - meets stringent analog measurement accuracy requirements without additional filtering. |
Use Scenario: Powering DSP core (1.2V), audio codec (1.8V), flash memory (2.5V), and headphone amplifier (3.3V) in battery-powered MP3 player. IC Role / Device Role / Timing Role: LTC3562EUD#PBF manages rail sequencing, dynamic voltage scaling during playback vs standby, and thermal-aware load shedding. Use Value: Reduces total solution IQ to <100μA in deep sleep (all rails in LDO Mode), enabling >100-hour standby time on 500mAh battery. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-buck PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBR | Triple buck (2×600mA + 1×1000mA) + dual LDO; no I²C programmability for FB/VOUT; fixed 2.25MHz switching; no RUN pins. | Best suited for fixed-rail systems without dynamic voltage scaling needs; lacks Type-A/Type-B flexibility and POR output. | Select when I²C control is unnecessary and higher-current third buck is required over fourth adjustable rail. |
| MAX8646ETG+ | Quad buck (2×1200mA + 2×600mA); I²C-programmable VOUT only (no FB adjustment); 2.25MHz; no RUN pins; no POR output. | Targeted at high-current applications like tablets; lacks hardware enable fallback and R600A-specific power-good signaling. | Select when >600mA per rail is mandatory and system-level sequencing is handled externally. |
Compared with TPS65023RSBR and MAX8646ETG+, the LTC3562EUD#PBF uniquely combines I²C-programmable dual-type regulation (FB-adjustable and VOUT-adjustable), hardware RUN pins for fail-safe startup, and dedicated POR600A output - making it optimal for space-constrained, battery-sensitive portable systems requiring flexible rail configuration and robust power sequencing.
Availability
LTC3562EUD#PBF is available at Aetrix Electronics and suitable for digital still cameras, wireless modems, portable instruments, and MP3 players requiring stable component supply, long-term lifecycle support, and guaranteed lead-free compliance.
Supply support for LTC3562EUD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio, emphasizing precision, efficiency, and integration for demanding analog and mixed-signal applications.
The LTC3562EUD#PBF belongs to Linear's µPower® high-efficiency PMIC family, designed specifically for multi-rail portable electronics where battery life, board area, and dynamic power management are critical system constraints.
FAQ
What is the maximum output current capability of each regulator in the LTC3562EUD#PBF?
The LTC3562EUD#PBF integrates two 600mA regulators (R600A and R600B) and two 400mA regulators (R400A and R400B). Peak current limits are 850mA for R600x (PMOS) and 600mA for R400x (PMOS) in Pulse Skip Mode. Continuous output current depends on thermal design, PCB layout, and ambient temperature - derating applies above 85°C junction temperature.
How does the LTC3562EUD#PBF support power sequencing in multi-rail systems?
The LTC3562EUD#PBF supports sequencing via I²C command ordering and the dedicated POR600A open-drain output, which asserts after a 231ms delay once R600A reaches 92% of its target voltage. RUN600A and RUN400A pins also allow hardware-triggered startup order independent of I²C, enabling robust boot sequences even during bus failure.
Can the LTC3562EUD#PBF operate without an I²C interface?
Yes - the LTC3562EUD#PBF can operate without I²C initialization for R600A and R400A regulators using their dedicated RUN pins (RUN600A active-low, RUN400A active-high). These regulators default to 800mV FB and Pulse Skip Mode. However, R600B and R400B require I²C commands to exit shutdown and configure output voltage.
What is the purpose of the exposed thermal pad (Pin 21) on the LTC3562EUD#PBF?
The exposed pad (Pin 21) on the LTC3562EUD#PBF is electrically and thermally connected to GND. It must be soldered to a PCB ground plane to achieve specified thermal performance (θJA = 68°C/W) and ensure reliable operation under full load. Omitting this connection risks thermal shutdown and reduced efficiency due to elevated junction temperature.
Does the LTC3562EUD#PBF support 100% duty cycle operation for low-dropout scenarios?
Yes - the LTC3562EUD#PBF supports 100% duty cycle operation in all modes, allowing regulation even when VIN approaches VOUT (e.g., 3.4V battery supplying 3.3V rail). In dropout, the PMOS switch remains continuously on, and output voltage equals VIN minus internal RDS(ON) and inductor DCR drops - enabling uninterrupted operation during battery discharge.
LTC3562EUD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable (Programmable)
- Number of Outputs:
- 4
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.425V (0.6V)
- Voltage - Output (Max):
- 0.8V (3.78V)
- Current - Output:
- 400mA, 600mA
- Frequency - Switching:
- 2.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN (3x3)
LTC3562EUD#PBF FAQ
1.How can I place an order for LTC3562EUD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3562EUD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3562EUD#PBF reliable?
The price and inventory of LTC3562EUD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3562EUD#PBF is usually 5 days.
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Once your LTC3562EUD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3562EUD#PBF?
For technical support, including LTC3562EUD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3562EUD#PBF requirements.
6.How does Aetrix verify that LTC3562EUD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3562EUD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3562EUD#PBF meets industry standards.
7.What is the process for return or replacement of LTC3562EUD#PBF?
All LTC3562EUD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3562EUD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3562EUD#PBF part is unused and in its original packaging.
Return procedure for LTC3562EUD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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