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Analog Devices Inc. LTC3569EFE#PBF
- Part No.:
- LTC3569EFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3569EFE#PBF.pdf
- Description:
- IC REG BUCK ADJ TRPL 16TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:362
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Product details
Overview
LTC3569EFE#PBF from Analog Devices (formerly Linear Technology) is a triple monolithic synchronous step-down DC/DC regulator IC with one 1.2A and two 600mA buck outputs, operating from 2.5V to 5.5V input, programmable 0.425V–0.8V feedback references via EN pin toggling, and selectable 1MHz–3MHz switching frequency - used in portable multi-rail power systems requiring dynamic voltage scaling and compact footprint.
For engineers reviewing the LTC3569EFE#PBF datasheet, LTC3569EFE#PBF pinout, LTC3569EFE#PBF application, or LTC3569EFE#PBF equivalent, key selection criteria include independent VFB programming per channel, slave-mode parallel configuration capability for higher current, Burst Mode® vs pulse-skipping trade-offs, thermal performance in TSSOP-16, and PGOOD logic-AND behavior across enabled regulators.
Technical Context
The LTC3569EFE#PBF integrates three current-mode synchronous buck regulators with internal P/N-channel MOSFETs, fixed 0.8V reference scalable down to 0.425V in 25mV steps via ENx toggling, and dual low-power operating modes: Burst Mode® (quiescent current <100µA all-on) and pulse-skipping (constant-frequency down to light load). Each regulator features internal compensation, soft-start (0.75V/ms ramp), and 100% duty-cycle dropout operation.
It supports flexible topology configuration: all three bucks operate independently, or Buck2 can be slaved to Buck1 (via FB2 = SVIN), and Buck3 to Buck2 (via FB3 = SVIN), enabling 1.8A (Buck1+Buck2) + 600mA (Buck3) or 1.2A + 1.2A (Buck1 + Buck2+Buck3) output combinations. Synchronization (1.2–3MHz) and RT-resistor programmability provide EMI control and layout flexibility.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.5V to 5.5V - supports single-cell Li-ion, USB, and wide-input portable rails without external LDO pre-regulation. |
| Output Currents | 1.2A (Buck1), 600mA (Buck2), 600mA (Buck3) - enables independent powering of core, I/O, and memory rails in SoC-based designs. |
| Feedback Reference | 0.425V to 0.8V in 25mV steps - allows precise output voltage setting (e.g., 1.2V, 1.8V, 2.5V) using standard resistor dividers without external DAC. |
| Switching Frequency | 1MHz to 3MHz (RT-programmable) or fixed 2.25MHz - permits use of sub-3mm inductors and low-ESR ceramic capacitors for ultra-compact layouts. |
| Quiescent Current | <100µA (all regulators in Burst Mode) - extends battery life in always-on subsystems such as RTC, sensors, or BLE radio standby. |
| Protection Features | Overtemperature shutdown (150°C), short-circuit current limiting, and PGOOD with ±8% hysteresis - ensures robust operation under fault and transient conditions. |
| Package | 16-lead TSSOP (FE-16), exposed pad grounded - provides 38°C/W θJA thermal resistance and compatibility with standard reflow profiles. |
Pinout & Package
Package: 16-lead plastic TSSOP (FE-16), 4.4mm × 5mm body, exposed thermal pad (Pin 17) soldered to PCB ground for optimal thermal performance (θJA = 38°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SVIN | Main supply input for internal circuitry | Must be decoupled to SGND with ≥1µF low-ESR capacitor; powers bias circuits and references. |
| PGND1–PGND3 | Power ground returns for each buck stage | Separate PGND pins minimize ground bounce between channels; connect each to local output capacitor negative terminal. |
| EN1–EN3 | Enable and VFB programming inputs | Toggling ENx up to 15× lowers corresponding VFB by 25mV per cycle; minimum pulse width 60ns, timeout 125µs. |
| FB1–FB3 | Feedback inputs for output voltage regulation | Each compares divider output to programmable reference; FB2/FB3 pulled to SVIN configures slave mode for parallel operation. |
| SW1–SW3 | Switch node outputs | Connect directly to inductor; SW1 swings PVIN1–PGND1, SW2 swings PVIN2–PGND2, SW3 swings PVIN3–PGND3. |
| MODE | Mode selection and sync input | SVIN = Burst Mode®, SGND = pulse-skipping; external clock (≥100ns pulses) synchronizes switching at 1.2–3MHz. |
| PGOOD | Open-drain power-good flag | Active-low; asserts only when *all* enabled outputs reach ±8% of target; logical AND of individual PGOOD signals. |
| RT | Oscillator timing resistor input | Resistor to GND sets fSW (1–3MHz); tie to SVIN for fixed 2.25MHz operation. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck regulation | Enables simultaneous generation of three distinct supply rails (e.g., 1.2V core, 1.8V I/O, 2.5V analog) from single input without external controllers. |
| Single-pin VFB programming | Eliminates need for external DAC or I²C interface - output voltage adjusted in-system via simple EN pin toggling sequence during startup or runtime. |
| Slave-mode parallel configuration | Allows Buck2 to mirror Buck1 or Buck3 to mirror Buck2, enabling 1.8A or 1.2A+1.2A high-current outputs using shared inductors and minimal extra components. |
| Burst Mode® operation | Achieves <100µA total quiescent current with all regulators active - critical for battery-powered devices requiring multi-day standby without recharge. |
| Internal compensation & soft-start | Reduces BOM count by removing external compensation networks; 0.75V/ms soft-start ramp prevents inrush current and stabilizes sequencing in multi-rail systems. |
Applications
| Mobile Application Processor Power | Wearable Health Sensor Hub |
|---|---|
Use Scenario: Powering ARM Cortex-A series SoC with separate core (VDD_CPU), GPU (VDD_GPU), and memory (VDD_IO) rails from single Li-ion cell. IC Role / Device Role / Timing Role: Primary triple-output PMIC delivering dynamically scaled voltages; Buck1 supplies CPU core (1.2A @ 0.8–1.2V), Buck2 powers GPU (600mA @ 0.9–1.1V), Buck3 drives I/O (600mA @ 1.8V). Use Value: Independent VFB programming enables real-time DVFS; Burst Mode® extends battery life during idle; PGOOD coordination ensures safe SoC boot sequence. | Use Scenario: Compact wearable patch monitoring ECG, SpO₂, and motion, powered by coin cell or micro-battery. IC Role / Device Role / Timing Role: Central power manager generating 1.2V for MCU, 1.8V for BLE radio, and 2.5V for analog front-end from 3.0–4.2V input. Use Value: Ultra-low IQ (<100µA) preserves battery for weeks; TSSOP-16 footprint fits sub-100mm² PCB; slave mode allows 1.2A rail for brief sensor burst acquisition. |
| Industrial IoT Edge Node | Portable Medical Diagnostic Device |
Use Scenario: Battery-backed wireless gateway aggregating sensor data in remote locations with temperature extremes. IC Role / Device Role / Timing Role: Robust triple-buck regulator supporting –40°C to 125°C junction range; Buck1 powers MCU (1.2A @ 3.3V), Buck2 drives RS-485 transceiver (600mA @ 5V), Buck3 supplies ADC reference (600mA @ 2.5V). Use Value: Overtemperature protection prevents latch-up in sealed enclosures; PGOOD AND logic validates full system readiness before transmission. | Use Scenario: Handheld ultrasound or point-of-care blood analyzer requiring stable, low-noise supplies for sensitive analog signal chains. IC Role / Device Role / Timing Role: Precision power source with <0.5% load regulation and <0.2%/V line regulation; Buck1 powers FPGA core (1.2A @ 1.0V), Buck2 supplies analog bias (600mA @ 2.5V), Buck3 drives display backlight (600mA @ 5V). Use Value: Pulse-skipping mode minimizes output ripple on analog rails; independent soft-start prevents cross-talk during power-up sequencing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65217CIRSLR | Integrated fuel gauge, charger, and LDOs; lower max output current (1A/600mA/600mA); fixed 2.2MHz fSW; no EN-pin VFB programming. | Targeted at single-cell Li-ion systems needing battery management; lacks slave-mode parallel capability. | Select when battery telemetry and charging are required alongside regulation - not for pure multi-rail efficiency or programmability. |
| ISL9305IRTNZ-T | Two 1.2A bucks + one 600mA buck; no VFB programming via EN; fixed 3MHz fSW; smaller 3mm × 3mm QFN package. | Optimized for space-constrained apps where 3A total current suffices and voltage flexibility is secondary. | Choose for ultra-dense layouts where TSSOP footprint is prohibitive and independent VFB tuning is unnecessary. |
Compared with TPS65217CIRSLR and ISL9305IRTNZ-T, the LTC3569EFE#PBF uniquely combines EN-pin-based VFB programming, slave-mode parallel operation, and Burst Mode® IQ <100µA - making it optimal for portable systems demanding both voltage agility and standby efficiency without added battery management overhead.
Availability
LTC3569EFE#PBF is available at Aetrix Electronics and suitable for portable medical devices, industrial IoT edge nodes, and wearable sensor hubs requiring stable component supply, extended temperature support (–40°C to 125°C), and long-term production continuity.
Supply support for LTC3569EFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.
The LTC3569 belongs to Linear's µPower synchronous buck regulator product line, designed specifically for space- and power-constrained portable electronics requiring multiple tightly regulated rails with minimal external components and ultra-low quiescent current.
FAQ
What is the maximum output current capability of the LTC3569EFE#PBF when configured in slave mode?
The LTC3569EFE#PBF supports two slave configurations: Buck2 can be slaved to Buck1 to deliver up to 1.8A (1.2A + 600mA), and Buck3 can be slaved to Buck2 - but not directly to Buck1. In practice, the highest combined output is 1.2A (Buck1) + 1.2A (Buck2+Buck3 in cascade) = 2.4A on two rails. The LTC3569EFE#PBF datasheet confirms IPK1 = 2.5A peak for SW1 and IPK2/IPK3 = 1.3A peak each, validating safe operation under these parallel conditions.
How does the EN pin toggling mechanism program the feedback reference voltage in the LTC3569EFE#PBF?
The LTC3569EFE#PBF uses falling-edge-triggered counters on EN1/EN2/EN3: each toggle decrements an internal DAC register by one step, lowering the corresponding VFB reference by 25mV - from 800mV (full scale) down to 425mV (15 toggles). A 125µs high-time timeout latches the value; holding EN low for >170µs resets to 800mV. This enables in-system voltage adjustment without I²C or external programming hardware. The LTC3569EFE#PBF specification guarantees VFBX(MIN) = 0.425V and VFBX(STEP) = 25mV across temperature.
Does the LTC3569EFE#PBF support synchronization to an external clock, and what are the timing requirements?
Yes, the LTC3569EFE#PBF supports external clock synchronization via the MODE pin. When driven with a logic-level signal (CMOS/TTL compatible), the internal oscillator locks to frequencies from 1.2MHz to 3MHz. The signal must have minimum high/low pulse widths of 100ns (TMODEPW), and the MODE pin must be pulled to SGND or SVIN only when not synchronizing. The LTC3569EFE#PBF datasheet specifies fSYNC = 3MHz max and requires clean, low-jitter input to avoid phase noise degradation in sensitive RF or audio applications.
What thermal performance can be expected from the LTC3569EFE#PBF in its TSSOP-16 package?
The LTC3569EFE#PBF in the FE-16 TSSOP package has θJA = 38°C/W (JEDEC JESD51-7, 2s2p copper layers), with TJMAX = 125°C and thermal shutdown activating at 150°C. With proper PCB layout - including soldering the exposed pad (Pin 17) to a ≥1cm² internal ground plane - the device sustains full 1.2A output at ambient temperatures up to 85°C. The LTC3569EFE#PBF electrical characteristics table confirms operation over –40°C to 125°C junction range, validated by design characterization and statistical process controls.
How does the PGOOD pin behave when only two of the three buck regulators are enabled in the LTC3569EFE#PBF?
The PGOOD pin on the LTC3569EFE#PBF is the logical AND of all *enabled* regulators' individual PGOOD comparators. If only Buck1 and Buck2 are enabled, PGOOD asserts only when both outputs reach within +8% of their programmed VOUT and remains asserted until either drops below –12% of target. Transient dips <2µs are blanked. This behavior is explicitly defined in the LTC3569EFE#PBF datasheet section "PGOOD Pin", ensuring reliable power sequencing even with partial regulator activation.
LTC3569EFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.425V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 600mA, 1.2A
- Frequency - Switching:
- 2.25MHz, 1MHz ~ 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP-EP
LTC3569EFE#PBF FAQ
1.How can I place an order for LTC3569EFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3569EFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3569EFE#PBF reliable?
The price and inventory of LTC3569EFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3569EFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3569EFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3569EFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3569EFE#PBF?
LTC3569EFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3569EFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3569EFE#PBF?
For technical support, including LTC3569EFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3569EFE#PBF requirements.
6.How does Aetrix verify that LTC3569EFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3569EFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3569EFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3569EFE#PBF?
All LTC3569EFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3569EFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3569EFE#PBF part is unused and in its original packaging.
Return procedure for LTC3569EFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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