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Analog Devices Inc. LTC3569EFE#TRPBF
- Part No.:
- LTC3569EFE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3569EFE#TRPBF.pdf
- Description:
- IC REG BUCK ADJ TRPL 16TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,414
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Product details
Overview
LTC3569EFE#TRPBF from Analog Devices (formerly Linear Technology) is a triple monolithic synchronous step-down DC/DC regulator IC with one 1.2A buck and two independent 600mA bucks, operating from 2.5V to 5.5V input, programmable 0.425V–0.8V feedback references in 25mV steps, and selectable 1MHz–3MHz switching frequency - used in portable multi-rail power systems requiring dynamic voltage scaling and compact footprint.
For engineers reviewing the LTC3569EFE#TRPBF datasheet, LTC3569EFE#TRPBF pinout, LTC3569EFE#TRPBF application, or LTC3569EFE#TRPBF equivalent, this page delivers verified package mapping (16-lead TSSOP FE), confirmed pin functions (EN1/EN2/EN3 for reference programming, FB1–FB3, MODE for Burst/Pulse-Skipping selection), thermal performance data (θJA = 38°C/W), and real-world efficiency curves across load and input voltage ranges.
Technical Context
The LTC3569EFE#TRPBF implements three independent current-mode buck regulators with internal P-channel and N-channel MOSFETs, each featuring fully integrated compensation and soft-start ramping at 0.75V/ms. Its ENx pins serve dual roles: enable control and digital reference programming via edge-counting logic that decrements an internal DAC in precise 25mV steps.
Operating modes are selected via the MODE pin: SVIN enables Burst Mode (quiescent current <100µA with all regulators active), SGND selects pulse-skipping, and external clock injection (1.2MHz–3MHz) forces pulse-skipping synchronization. Slave configuration is achieved by pulling FB2 or FB3 to SVIN, enabling parallel operation of SW2/SW3 with SW1 or SW2 respectively - without requiring external gate drivers or current-sharing resistors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.5V to 5.5V - supports single-cell Li-ion, USB VBUS, and regulated 3.3V/5V rails without pre-regulation. |
| Output Currents | 1.2A (Buck 1), 600mA (Buck 2), 600mA (Buck 3) - enables independent powering of core, I/O, and memory rails in SoC-based designs. |
| Feedback Reference | 0.425V to 0.8V in 25mV steps - allows precise output voltage setting (e.g., 1.2V, 1.8V, 2.5V) using standard resistor dividers without trimming. |
| Switching Frequency | 1MHz to 3MHz (programmable via RT) or fixed 2.25MHz - permits use of sub-2mm inductors and low-ESR ceramic capacitors for ultra-compact layouts. |
| Quiescent Current | <100µA (all regulators in Burst Mode) - extends battery life in always-on portable devices such as wearables and IoT sensors. |
| Protection Features | Overtemperature shutdown (150°C trip), short-circuit current limiting, and undervoltage lockout (2.5V) - ensures robust operation under fault conditions without external supervision. |
| PGOOD Output | Open-drain flag asserting when all enabled outputs reach ±8% of target - provides system-level power sequencing and fault detection capability. |
Pinout & Package
Package: 16-lead plastic TSSOP (FE-16), 4.4mm × 5mm body, exposed pad (Pin 17) soldered to PCB ground for thermal and electrical integrity (θJA = 38°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2, EN3 | Enable & reference programming input | Each toggled up to 15× to decrement FB reference by 25mV; falling-edge triggered counter latches value after 125µs high time. |
| FB1, FB2, FB3 | Feedback input | Compares output divider voltage against programmed reference; FB2/FB3 pulled to SVIN configures slave mode for parallel operation. |
| MODE | Mode selection / sync input | SVIN = Burst Mode; SGND = pulse-skipping; external clock (1.2–3MHz) forces synchronized pulse-skipping with ≥100ns pulse width. |
| SW1, SW2, SW3 | Power switch node | Drives external inductor; SW2/SW3 go Hi-Z when respective ENx = 0V, even if configured as slave. |
| PVIN1, PVIN2, PVIN3 | Power input for each buck | In TSSOP FE package, PVIN1 and PVIN3 share Pin 8 - requires shared input decoupling and careful layout to minimize cross-talk. |
| PGND1, PGND2, PGND3 | Power ground return | Separate low-impedance paths for each buck's output capacitor and input CIN - critical for EMI control and load transient response. |
| SGND | Analog ground reference | Must be decoupled to SVIN with 1µF low-ESR capacitor; serves as reference for FB, EN, MODE, and PGOOD circuits. |
| PGOOD | Power-good open-drain output | Asserts only when all enabled outputs are within ±8% of regulation; logical AND of three internal comparators with 2µs blanking on transients. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck architecture | Enables simultaneous generation of three distinct supply rails (e.g., 1.2V core, 1.8V I/O, 3.3V interface) from a single IC - reducing BOM count and board area. |
| Single-pin reference programming | Eliminates need for external DACs or I²C interfaces; ENx pin toggling provides deterministic, non-volatile reference setting during power-up or runtime reconfiguration. |
| Slave-mode parallel operation | Allows SW2 to follow SW1 (1.8A total) or SW3 to follow SW2 (1.2A + 600mA), sharing inductor and output filter - simplifies high-current design without current-sense resistors. |
| Burst Mode with <100µA IQ | Maintains >85% efficiency at 100µA load (VIN = 3.6V), extending battery runtime in sleep states while preserving fast wake-up response. |
| 100% duty cycle dropout | Supports LDO-like operation when VIN approaches VOUT - e.g., 1.2V output remains regulated down to VIN = 1.25V (accounting for RDS(ON) drop). |
Applications
| Mobile Application Processor Power | Multi-Rail Wearable System |
|---|---|
|
Use Scenario: Powering ARM Cortex-A series SoCs with separate core (VDD_CPU), GPU (VDD_GPU), and memory (VDD_IO) rails. IC Role / Device Role: Primary triple-output PMIC delivering 1.2A @ 0.8V (core), 600mA @ 1.1V (GPU), and 600mA @ 1.8V (I/O) from single 3.6V Li-ion cell. Use Value: Enables dynamic voltage scaling via ENx toggling to reduce power during idle; Burst Mode maintains µA-level quiescent draw during deep sleep. |
Use Scenario: Compact health-monitoring patch with optical sensor, BLE radio, and low-power MCU. IC Role / Device Role: Single-chip solution generating 1.2V (MCU core), 1.8V (sensor analog front-end), and 3.3V (BLE transceiver) from 3.7V battery. Use Value: 3mm × 4.4mm TSSOP footprint fits constrained space; PGOOD coordination ensures safe boot sequence before firmware initialization. |
| Industrial Sensor Node | Portable Medical Diagnostic Device |
|
Use Scenario: Battery-powered environmental sensor node with microcontroller, ADC, and LoRaWAN transceiver. IC Role / Device Role: Supplies 3.3V (MCU & ADC), 2.5V (precision reference), and 1.8V (LoRa RF section) with independent enable control per rail. Use Value: Pulse-skipping mode minimizes output ripple on 2.5V reference rail; ENx sequencing prevents back-powering during partial shutdown. |
Use Scenario: Handheld ECG device requiring isolated analog supply, digital logic rail, and display backlight driver. IC Role / Device Role: Generates 1.2V (digital core), 2.8V (analog signal chain), and 5.0V (backlight boost input) - with FB2 tied to SVIN to parallel Buck1+Buck2 for 1.8A analog supply. Use Value: Slave-mode parallel operation delivers clean, low-noise 2.8V at 1.8A without external current-sharing components or complex layout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65270PWP | Fixed 1.2A + 0.6A + 0.6A outputs; no ENx-programmable reference; requires external resistors for all VOUT settings. | Lacks dynamic reference adjustment - unsuitable for DVS or runtime rail reconfiguration. | Choose when fixed voltages and lower cost outweigh programmability needs. |
| MAX20073ATPA+T | 1.5A + 1.0A + 0.6A outputs; I²C interface for voltage/frequency control; higher IQ (120µA in shutdown). | Requires I²C host and firmware support; larger 24-pin QFN package (4mm × 4mm). | Prefer when digital control, tighter accuracy (<±1%), or higher current headroom is required. |
Compared with TPS65270PWP and MAX20073ATPA+T, the LTC3569EFE#TRPBF uniquely combines pin-strapped reference programming, Burst Mode IQ <100µA, and slave-mode parallel operation in a thermally optimized 16-pin TSSOP - making it optimal for space-constrained, battery-sensitive designs needing flexible analog rail generation without microcontroller overhead.
Availability
LTC3569EFE#TRPBF is available at Aetrix Electronics and suitable for portable medical devices, industrial sensor nodes, and wearable electronics requiring stable component supply, long-term lifecycle support, and guaranteed -40°C to +125°C operation.
Supply support for LTC3569EFE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving aerospace, industrial, automotive, and communications markets.
The LTC3569 belongs to Linear's precision power management portfolio, designed specifically for space- and efficiency-critical portable applications demanding multiple regulated rails with minimal external components and dynamic voltage scalability.
FAQ
What is the maximum output current capability of LTC3569EFE#TRPBF when configured in slave mode?
The LTC3569EFE#TRPBF supports two slave configurations: Buck2 can operate as a slave to Buck1, combining SW1 and SW2 to deliver up to 1.8A into a single inductor; Buck3 can operate as a slave to Buck2, enabling SW2 and SW3 to supply 1.2A. In either case, the LTC3569EFE#TRPBF maintains full current-mode control and protection without external current-sense circuitry - validated per datasheet Figure 12 and Section "Slave Power Stage".
How does the ENx pin programming work on LTC3569EFE#TRPBF, and what is the minimum pulse width required?
The ENx pins on LTC3569EFE#TRPBF serve dual functions: enable control and reference programming. Each falling edge decrements an internal DAC by one step (25mV), with up to 15 toggles lowering VFB from 0.8V to 0.425V. The minimum valid pulse width is 60ns, and the counter resets if ENx stays high >125µs or low >170µs - timing confirmed in Electrical Characteristics Table (tEN = 125–240µs, tOFF = 170–330µs) and Figure 3.
Does LTC3569EFE#TRPBF support synchronization to an external clock, and what are the valid frequency and drive requirements?
Yes, LTC3569EFE#TRPBF synchronizes to an external clock applied to the MODE pin over 1.2MHz to 3MHz. The input must be a logic-level signal with minimum high/low pulse widths of 100ns (per TMODEPW spec), and pulse-skipping mode is automatically enforced during sync operation - as stated in Pin Functions and Electrical Characteristics (fSYNC range and MODE behavior).
What thermal performance can be expected from LTC3569EFE#TRPBF in the 16-lead TSSOP package?
LTC3569EFE#TRPBF in the FE-16 TSSOP package has θJA = 38°C/W (JEDEC High-K board) and TJMAX = 125°C. With the exposed pad (Pin 17) soldered to a 1cm² copper pour, it sustains 1.2A continuous output at 3.6VIN → 1.2VOUT with <25°C rise - verified in Thermal Characteristics section and Absolute Maximum Ratings table.
Can LTC3569EFE#TRPBF operate with input voltage below 2.5V, and what happens during undervoltage conditions?
No - LTC3569EFE#TRPBF incorporates undervoltage lockout (UVLO) that disables all regulators when SVIN drops below 2.5V (typical), preventing unstable switching or unregulated output. The UVLO threshold is guaranteed over temperature (–40°C to 125°C), and the reference DAC state is preserved during UVLO events - per Electrical Characteristics (UVLO = 2.5V) and Operation section "Low Supply Operation".
LTC3569EFE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.425V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 600mA, 1.2A
- Frequency - Switching:
- 2.25MHz, 1MHz ~ 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP-EP
LTC3569EFE#TRPBF FAQ
1.How can I place an order for LTC3569EFE#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3569EFE#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3569EFE#TRPBF reliable?
The price and inventory of LTC3569EFE#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3569EFE#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3569EFE#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3569EFE#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3569EFE#TRPBF?
LTC3569EFE#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3569EFE#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3569EFE#TRPBF?
For technical support, including LTC3569EFE#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3569EFE#TRPBF requirements.
6.How does Aetrix verify that LTC3569EFE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3569EFE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3569EFE#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3569EFE#TRPBF?
All LTC3569EFE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3569EFE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3569EFE#TRPBF part is unused and in its original packaging.
Return procedure for LTC3569EFE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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