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Analog Devices Inc. LTC3569EUD#PBF
- Part No.:
- LTC3569EUD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
LTC3569EUD#PBF.pdf
- Description:
- IC REG BUCK ADJ TRPL 20QFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,180
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Product details
Overview
LTC3569EUD#PBF from Analog Devices (formerly Linear Technology) is a triple monolithic synchronous step-down DC/DC regulator IC with one 1.2A buck and two 600mA bucks, operating from 2.5V to 5.5V input, programmable 1MHz–3MHz switching frequency, and independent 800mV–425mV feedback references for dynamic voltage scaling in portable multi-rail systems.
For engineers reviewing the LTC3569EUD#PBF datasheet, LTC3569EUD#PBF pinout, LTC3569EUD#PBF application, or LTC3569EUD#PBF equivalent, key selection criteria include per-buck current capability, slave-mode parallel configuration support, Burst Mode® vs pulse-skipping trade-offs, thermal performance in 3mm × 3mm QFN, and PGOOD logic-AND behavior across enabled outputs.
Technical Context
The LTC3569EUD#PBF implements three independent current-mode control loops with internal P/N-channel MOSFETs, fixed 100% duty-cycle dropout operation, and soft-start ramping at 0.75V/ms. Each buck features internal compensation, programmable reference via EN-pin toggling, and selectable low-load modes: Burst Mode® (quiescent current <100µA all-on) or pulse-skipping (lower ripple, higher EMI).
Slave mode is activated by pulling FB2 or FB3 to SVIN, enabling SW2 or SW3 to follow Buck 1 or Buck 2 respectively-requiring shared inductors and external component coordination. The MODE pin serves dual function: mode selection (SVIN = Burst, SGND = pulse-skipping) and external clock synchronization (1.2MHz–3MHz, min 100ns pulse width).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5V to 5.5V - supports single-cell Li-ion, USB, and regulated 3.3V/5V rails without pre-regulation. |
| Output Current Capability | 1.2A (Buck 1), 600mA (Buck 2), 600mA (Buck 3) - enables independent power domains for CPU core, I/O, and memory rails. |
| Switching Frequency | Programmable 1MHz–3MHz via RT resistor or fixed 2.25MHz - allows optimization of inductor size, efficiency, and EMI profile. |
| Feedback Reference Range | 800mV to 425mV in 25mV steps - enables precise dynamic voltage scaling without external DACs or resistive dividers. |
| Quiescent Current | <100µA (all regulators in Burst Mode) - extends battery life in always-on subsystems like RTC or sensor monitoring. |
| Thermal Protection | Overtemperature shutdown at 150°C, auto-restart at 125°C - ensures safe operation under sustained overload or poor PCB thermal design. |
| PGOOD Logic | Open-drain AND of all enabled buck PGOOD flags - provides system-level power-sequencing validation before processor boot. |
Pinout & Package
Package: 20-lead (3mm × 3mm) plastic QFN (UD package), exposed pad soldered to PCB ground for thermal and electrical integrity (θJA = 68°C/W). Pin count and layout match LTC3569EUD#PBF ordering code.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2, EN3 | Enable & reference programming inputs | Toggle falling edge to decrement 800mV reference in 25mV steps; hold high >125µs to latch value; hold low >170µs to reset to full scale. |
| FB1, FB2, FB3 | Feedback voltage inputs | Compare output divider voltage against programmed reference; pull FB2/FB3 to SVIN to enable slave mode for parallel current sharing. |
| SW1, SW2, SW3 | Power switch node outputs | Drive external inductors; SW2/SW3 become Hi-Z when respective ENx = 0V, even in slave configuration. |
| PVIN1, PVIN2, PVIN3 | Dedicated input supply pins | Each powers its buck stage independently; decouple locally with 4.7µF low-ESR capacitors to respective PGNDx pins. |
| PGND1, PGND2, PGND3 | Power ground returns | Separate ground paths minimize cross-regulator noise coupling; sum decoupling caps where PVIN pins share input sources. |
| MODE | Mode select & sync input | SVIN = Burst Mode®, SGND = pulse-skipping; external clock applied here must meet 100ns min pulse width and 1.2–3MHz range. |
| RT | Oscillator timing resistor | Connect to GND to set free-running frequency; tie to SVIN for fixed 2.25MHz - eliminates external crystal or clock source. |
| PGOOD | Power-good status flag | Open-drain output pulled low only when *all* enabled outputs are within ±8% of regulation - requires external pull-up for system monitoring. |
| SVIN | Main bias supply | Powers internal circuitry; decouple to SGND with 1µF low-ESR capacitor - independent of PVIN rails and critical for stable reference generation. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck architecture | Enables simultaneous generation of three distinct supply rails (e.g., 1.8V, 1.2V, 3.3V) with no interdependence unless explicitly configured as slaves. |
| Single-pin reference programming | Eliminates need for external DACs or resistor networks - EN-pin toggling directly configures VFB from 800mV to 425mV in 25mV increments for DVS applications. |
| Configurable slave power stages | Allows SW2 to follow Buck 1 or SW3 to follow Buck 2 - supports 1.8A (Buck1+2) or 1.2A+600mA (Buck1+3) configurations using shared inductors and reduced component count. |
| Burst Mode® operation | Achieves <100µA total quiescent current with all three bucks active - critical for maintaining ultra-low standby power in battery-powered IoT endpoints. |
| 100% duty cycle dropout | Maintains regulation down to VIN ≈ VOUT + RDSON × ILOAD - preserves system uptime during brownout conditions without requiring LDO post-regulation. |
Applications
| Mobile Application Processor Power | Multi-Rail FPGA Core/I/O Supply |
|---|---|
Use Scenario: Powering ARM Cortex-A series SoCs with dynamically scaled core voltage (VDD_CPU), GPU voltage (VDD_GPU), and memory interface (VDDQ) from a single Li-ion cell. IC Role / Device Role / Timing Role: LTC3569EUD#PBF delivers three tightly regulated, independently sequenced rails with PGOOD-AND signaling to gate processor boot. Use Value: Reduces BOM count by replacing three discrete buck converters; enables real-time DVFS via EN-pin toggling without firmware intervention. | Use Scenario: Supplying Spartan-7 FPGA with 0.85V core, 1.8V I/O bank, and 3.3V auxiliary rail in space-constrained industrial control module. IC Role / Device Role / Timing Role: LTC3569EUD#PBF acts as primary power controller with soft-start ramping and PGOOD coordination across all rails. Use Value: Eliminates need for external sequencing IC; slave-mode capability allows 1.2A+600mA combined core rail for high-performance configurations. |
| Wearable Health Sensor Hub | Automotive Infotainment PMIC Subsystem |
Use Scenario: Powering optical heart-rate monitor (HRM), accelerometer, BLE radio, and display driver from coin-cell or small Li-po battery. IC Role / Device Role / Timing Role: LTC3569EUD#PBF provides ultra-low-quiescent 1.2V (sensor), 3.3V (BLE), and 1.8V (display) rails with Burst Mode® extending runtime. Use Value: Achieves <100µA system sleep current with all rails enabled - doubles battery life versus discrete solutions. | Use Scenario: Generating auxiliary 1.2V, 1.8V, and 3.3V rails for infotainment SoC peripherals (USB PHY, audio codec, touch controller) in 12V automotive environment. IC Role / Device Role / Timing Role: LTC3569EUD#PBF operates as secondary PMIC stage downstream of main buck, handling low-noise, low-current domains. Use Value: Withstand 5.5V max input and –40°C to 125°C junction temp; PGOOD AND logic validates rail readiness before SoC initialization. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65217CIRSLR | Integrated fuel gauge, battery charger, and LDOs; lower max current (1A/600mA/600mA); fixed 2.25MHz only; no slave mode. | Targeted at single-cell Li-ion systems requiring battery management; lacks independent reference programming and parallel slave capability. | Select when battery charging and state-of-charge monitoring are required alongside regulation - not for pure multi-rail DVS. |
| ISL9305IRTNZ-T | Two 1.2A bucks + one 600mA buck; no EN-pin reference programming; fixed 3MHz; no slave mode; smaller 3mm × 3mm 16-QFN. | Optimized for compact footprint and high-frequency operation; missing dynamic reference adjustment and current-boost slave functionality. | Select when board area is critical and fixed-output voltages suffice - not for adaptive voltage scaling or current boosting. |
Compared with TPS65217CIRSLR and ISL9305IRTNZ-T, the LTC3569EUD#PBF uniquely combines per-buck reference programmability, configurable slave-mode parallel operation, and Burst Mode® ultra-low IQ - making it the only option supporting true hardware-based dynamic voltage scaling without firmware overhead or external components.
Availability
LTC3569EUD#PBF is available at Aetrix Electronics and suitable for portable medical devices, FPGA power delivery, wearable sensor hubs, and automotive infotainment subsystems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC3569EUD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets.
The LTC3569EUD#PBF belongs to ADI's Power by Linear™ family of highly integrated DC/DC regulators, designed specifically for space-constrained, battery-sensitive applications demanding multiple precision rails with minimal external components.
FAQ
What is the maximum output current capability of each buck regulator in the LTC3569EUD#PBF?
The LTC3569EUD#PBF provides 1.2A from Buck 1 (SW1), and 600mA each from Buck 2 (SW2) and Buck 3 (SW3) under typical conditions. Peak inductor current limits are 2.0A (SW1) and 1.0A (SW2/SW3), verified across –40°C to 125°C. Current capability assumes proper thermal design with exposed pad soldered to PCB ground.
How does the EN-pin toggling mechanism program the feedback reference voltage in the LTC3569EUD#PBF?
The LTC3569EUD#PBF uses falling-edge toggles on EN1/EN2/EN3 to decrement an internal DAC counter, lowering the nominal 800mV feedback reference by 25mV per toggle - down to 425mV after 15 toggles. A high pulse >125µs latches the value; a low pulse >170µs resets to full scale. No external components are needed.
Can the LTC3569EUD#PBF operate in slave mode to combine output currents, and how is it configured?
Yes - the LTC3569EUD#PBF supports slave mode: pulling FB2 to SVIN configures Buck 2 to follow Buck 1; pulling FB3 to SVIN configures Buck 3 to follow Buck 2. Both EN2 and EN3 must be high to enable the slave stage. SW2 or SW3 then mirrors the master's switching, enabling 1.8A (Buck1+2) or 1.2A+600mA (Buck1+3) configurations.
What are the key differences between Burst Mode® and pulse-skipping operation in the LTC3569EUD#PBF?
In Burst Mode®, the LTC3569EUD#PBF shuts down entire switching cycles at light load, achieving <100µA total IQ but higher output ripple. In pulse-skipping mode, it maintains constant frequency down to low loads, then skips pulses - offering lower ripple and better EMI control at the cost of higher quiescent current (230–365µA typical).
Does the LTC3569EUD#PBF support 100% duty cycle operation, and under what conditions?
Yes - the LTC3569EUD#PBF supports 100% duty cycle (dropout) operation when VIN approaches VOUT. In this mode, the P-channel switch remains continuously on, delivering VOUT ≈ VIN – (RDSON × ILOAD). This avoids unregulated dropout and eliminates need for external LDOs in brownout scenarios.
LTC3569EUD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.425V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 600mA, 1.2A
- Frequency - Switching:
- 2.25MHz, 1MHz ~ 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN (3x3)
LTC3569EUD#PBF FAQ
1.How can I place an order for LTC3569EUD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3569EUD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3569EUD#PBF reliable?
The price and inventory of LTC3569EUD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3569EUD#PBF is usually 5 days.
3.What payment methods are accepted for LTC3569EUD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3569EUD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3569EUD#PBF?
LTC3569EUD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3569EUD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3569EUD#PBF?
For technical support, including LTC3569EUD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3569EUD#PBF requirements.
6.How does Aetrix verify that LTC3569EUD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3569EUD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3569EUD#PBF meets industry standards.
7.What is the process for return or replacement of LTC3569EUD#PBF?
All LTC3569EUD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3569EUD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3569EUD#PBF part is unused and in its original packaging.
Return procedure for LTC3569EUD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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