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Analog Devices Inc. LTC3569IFE#PBF
- Part No.:
- LTC3569IFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3569IFE#PBF.pdf
- Description:
- IC REG BUCK ADJ TRPL 16TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:127
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Product details
Overview
LTC3569IFE#PBF from Analog Devices (formerly Linear Technology) is a triple-output monolithic synchronous buck DC/DC regulator IC with 1.2A and two 600mA outputs, operating from 2.5V to 5.5V input, programmable 425mV–800mV feedback references in 25mV steps, and adjustable 1MHz–3MHz switching frequency - used in portable multi-rail power systems requiring dynamic voltage scaling and compact layout.
For engineers reviewing the LTC3569IFE#PBF datasheet, LTC3569IFE#PBF pinout, LTC3569IFE#PBF application, or LTC3569IFE#PBF equivalent, key selection criteria include independent EN-pin-based VFB programming, slave-mode parallel configuration capability for higher current, Burst Mode® vs pulse-skipping trade-offs, thermal protection behavior, and TSSOP-16 package compatibility with board-level thermal management requirements.
Technical Context
The LTC3569IFE#PBF integrates three current-mode synchronous buck regulators sharing a single oscillator core, with each regulator featuring internal compensation, soft-start ramping at 0.75V/ms, and independent PGOOD monitoring. Its RT pin enables fixed 2.25MHz operation or resistor-programmable 1–3MHz frequency, while MODE pin selects Burst Mode® (for <100µA quiescent current) or pulse-skipping (for lower output ripple).
Each buck supports 100% duty cycle dropout operation and configurable slave mode: FB2 pulled to SVIN enables Buck 2 as slave to Buck 1; FB3 pulled to SVIN enables Buck 3 as slave to Buck 2. Slave configuration shares external inductors and requires coordinated ENx assertion, with automatic Hi-Z disable if master is off.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5V to 5.5V - supports single-cell Li-ion, USB, and regulated intermediate rails without external LDO pre-regulation. |
| Output Current Capability | 1.2A (Buck 1), 600mA ×2 (Bucks 2 & 3) - enables independent powering of CPU core, I/O, and memory rails in portable SoC designs. |
| Feedback Reference Range | 425mV to 800mV in 25mV steps - allows precise output voltage setting (e.g., 1.2V, 1.8V, 2.5V) via EN pin toggling without external DAC or resistor networks. |
| Switching Frequency | Programmable 1MHz–3MHz or fixed 2.25MHz - permits optimization of inductor size (e.g., 2.2µH–2.5µH) and EMI profile for space-constrained PCBs. |
| Quiescent Current | <100µA in Burst Mode® with all regulators active - extends battery life in always-on subsystems such as sensor hubs or real-time clocks. |
| Protection Features | Overtemperature shutdown (150°C trip), short-circuit current limiting, and undervoltage lockout (2.5V) - ensures robust operation under fault conditions without external supervision circuitry. |
| PGOOD Logic | Open-drain AND of all enabled outputs with ±8% threshold hysteresis and 2–8µs delay - provides reliable system power sequencing and reset signaling. |
Pinout & Package
TSSOP-16 (FE package) with exposed thermal pad (Pin 17, GND). Requires soldering of exposed pad to PCB ground plane for thermal performance (θJA = 38°C/W) and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2, EN3 | Independent enable & VFB programming inputs | Each toggled up to 15× to decrement reference by 25mV; high pulse width must be 60ns–55µs to avoid timeout-induced reset. |
| FB1, FB2, FB3 | Feedback voltage inputs | Compare against programmed reference; FB2/FB3 pulled to SVIN configures respective buck as slave to preceding stage. |
| PVIN1, PVIN2, PVIN3 | Dedicated power inputs per buck | PVIN1 and PVIN3 share Pin 8 in TSSOP; decoupling capacitors must be placed locally to minimize high-frequency loop inductance. |
| SW1, SW2, SW3 | Internal switch node outputs | Drive external inductors; swing between respective PVIN and PGND; require low-ESR ceramic output caps and careful routing to reduce EMI. |
| PGND1, PGND2, PGND3 | Power ground returns per buck | Must connect to local output capacitor negatives; shared decoupling only where power paths physically converge. |
| SGND | Analog ground reference | Separate from PGND; connects to SVIN decoupling cap; critical for feedback accuracy and PGOOD timing stability. |
| MODE | Mode select & sync input | Tied to SVIN → Burst Mode®; tied to SGND → pulse-skipping; driven externally → synchronizes to 1.2–3MHz clock with ≥100ns pulse width. |
| RT | Oscillator timing resistor input | Resistor to GND sets frequency (1–3MHz); tied to SVIN → fixed 2.25MHz; open or short → undefined operation. |
| PGOOD | Open-drain power-good flag | Active-low when all enabled outputs reach ±8% of target; requires external pull-up; blanked for transients <2µs. |
| SVIN | Main bias supply input | Supplies internal circuitry; decoupled to SGND with 1µF low-ESR ceramic; UVLO triggers at 2.5V. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck regulation | Enables simultaneous generation of three distinct supply rails (e.g., 1.2V/1.8V/2.5V) from one IC, reducing BOM count and board area vs discrete solutions. |
| Single-pin VFB programming | Eliminates need for external resistive dividers or digital interfaces - output voltage set via simple EN pin toggles during power-up or runtime reconfiguration. |
| Slave-mode parallel operation | Allows Buck 2 + Buck 1 or Buck 3 + Buck 2 to share inductor and output cap, delivering up to 1.8A (1.2A + 600mA) without redesigning magnetics or layout. |
| Burst Mode® with <100µA IQ | Maintains high light-load efficiency in battery-powered standby modes while preserving fast transient response upon load step recovery. |
| Integrated thermal protection | Automatic shutdown at 150°C junction temperature with hysteresis (restart at 125°C), preventing permanent damage during sustained overload or poor heatsinking. |
| 100% duty cycle dropout | Supports seamless transition to linear-like operation as VIN approaches VOUT, avoiding brownout during battery discharge or input sag. |
Applications
| Mobile Application Processor Power | Multi-Rail Portable Instrumentation |
|---|---|
Use Scenario: Powering ARM Cortex-A series SoCs with separate core (VDD_CPU), I/O (VDD_IO), and memory (VDD_DDR) rails in smartphones and tablets. IC Role / Device Role / Timing Role: Primary triple-output PMIC delivering dynamically scaled voltages synchronized via shared MODE/RT control. Use Value: Enables DVFS (Dynamic Voltage and Frequency Scaling) with <100µA quiescent current in sleep states and fast soft-start (<1ms) for wake-up responsiveness. |
Use Scenario: Supplying precision analog front-ends, microcontrollers, and display drivers in handheld test equipment and medical sensors. IC Role / Device Role / Timing Role: Centralized low-noise DC/DC source with independent regulation and PGOOD sequencing for mixed-signal subsystems. Use Value: Reduces component count by replacing three discrete regulators while maintaining <±0.5% load regulation across 0–600mA per rail. |
| Wearable Health Monitoring | Industrial IoT Edge Node |
Use Scenario: Powering ultra-low-power MCUs, BLE radios, and biopotential amplifiers in fitness trackers and ECG patches. IC Role / Device Role / Timing Role: High-efficiency multi-rail converter operating from coin cell or small LiPo, leveraging Burst Mode® for weeks of standby. Use Value: Achieves >85% efficiency at 100µA load on 1.2V rail and supports 100% duty cycle down to 1.25V input, extending usable battery range. |
Use Scenario: Providing isolated logic (3.3V), sensor bias (2.5V), and RF module (1.8V) supplies in battery- or energy-harvesting–powered gateways. IC Role / Device Role / Timing Role: Robust industrial-grade regulator with –40°C to 125°C operation, overtemperature protection, and stable PGOOD signaling for firmware-controlled power management. Use Value: Guarantees reliable startup and fault detection across wide temperature swings and input sags, with no external supervision required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65217CIRSLR | Integrated fuel gauge, LDOs, and charger; lower max output current (1A/600mA/600mA); fixed 2.2MHz frequency; I²C programmable. | Targeted at single-cell Li-ion systems needing battery management; lacks EN-pin VFB programming and slave-mode flexibility. | Select when battery telemetry and charging are required alongside regulation - not for standalone multi-rail DC/DC without charging. |
| ISL95210IRZ | Two 3A bucks + one 1.5A buck; supports phase interleaving; no EN-pin programming; uses external resistor dividers; higher IQ (250µA). | Optimized for high-current laptop CPU/GPU VRMs; requires more external components and larger layout; no Burst Mode®. | Select for high-power computing applications demanding >1.2A per rail and interleaved ripple cancellation - not for space-constrained portable designs. |
Compared with TPS65217CIRSLR and ISL95210IRZ, the LTC3569IFE#PBF uniquely combines pin-based VFB programming, slave-mode parallel operation, and sub-100µA Burst Mode® IQ in a thermally enhanced TSSOP-16, making it optimal for compact, battery-sensitive multi-rail systems where configurability and efficiency at light loads are critical.
Availability
LTC3569IFE#PBF is available at Aetrix Electronics and suitable for portable instrumentation, wearable health monitors, and industrial IoT edge nodes requiring stable component supply, long-term lifecycle support, and guaranteed -40°C to 125°C operation.
Supply support for LTC3569IFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio, emphasizing precision, efficiency, and reliability for demanding analog and mixed-signal applications.
The LTC3569IFE#PBF belongs to Linear's monolithic multi-output buck regulator product line, designed specifically for space-constrained portable electronics requiring dynamic voltage scaling, low quiescent current, and flexible rail configuration without external digital control.
FAQ
What is the maximum output current supported by each buck regulator in the LTC3569IFE#PBF?
The LTC3569IFE#PBF provides 1.2A from Buck 1 (SW1/PVIN1 path) and 600mA each from Bucks 2 and 3 (SW2/PVIN2 and SW3/PVIN3 paths). When configured in slave mode - e.g., FB2 tied to SVIN and EN2 asserted - Buck 2 operates in parallel with Buck 1, enabling up to 1.8A total output using a shared inductor and output capacitor. Peak inductor current limits are 2.0A (SW1) and 1.0A (SW2/SW3) under typical conditions.
How does the EN pin programming work for output voltage setting on the LTC3569IFE#PBF?
Each EN pin (EN1, EN2, EN3) on the LTC3569IFE#PBF serves dual function: enable control and feedback reference programming. Toggling an EN pin low-to-high up to 15 times decrements its associated internal DAC by 25mV per toggle, adjusting the FB reference from 800mV down to 425mV. A minimum pulse width of 60ns and maximum of 55µs is required; holding EN high >125µs resets the counter to full scale (800mV). This eliminates external resistor dividers for voltage setting.
Can the LTC3569IFE#PBF operate with input voltage below 2.5V?
No - the LTC3569IFE#PBF incorporates undervoltage lockout (UVLO) that disables all regulators when SVIN drops below 2.5V (typical), preventing unstable operation or unregulated output. The device remains latched off until SVIN rises above the UVLO threshold with sufficient hysteresis. It cannot regulate in dropout below 2.5V input, even though 100% duty cycle operation is supported down to VIN ≈ VOUT + RDSON × ILOAD.
What thermal management requirements apply to the LTC3569IFE#PBF in TSSOP-16 package?
The LTC3569IFE#PBF in FE (TSSOP-16) package requires soldering of the exposed thermal pad (Pin 17) directly to a PCB ground plane to achieve θJA = 38°C/W. Without this connection, thermal resistance degrades significantly, risking junction temperatures exceeding 125°C under full load. Layout must include ≥4 thermal vias (0.3mm diameter) under the pad, connected to inner or bottom-layer copper pour for effective heat dissipation.
Does the LTC3569IFE#PBF support synchronization to an external clock source?
Yes - the MODE pin of the LTC3569IFE#PBF accepts an external logic-level clock signal (1.2MHz to 3MHz) to synchronize switching frequency. The signal must have high/low pulse widths ≥100ns. When synchronized, pulse-skipping mode is automatically selected regardless of MODE pin DC level. This feature reduces EMI by aligning switching edges with system clocks or other converters in the same design.
LTC3569IFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.425V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 600mA, 1.2A
- Frequency - Switching:
- 2.25MHz, 1MHz ~ 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP-EP
LTC3569IFE#PBF FAQ
1.How can I place an order for LTC3569IFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3569IFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3569IFE#PBF reliable?
The price and inventory of LTC3569IFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3569IFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3569IFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3569IFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3569IFE#PBF?
LTC3569IFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3569IFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3569IFE#PBF?
For technical support, including LTC3569IFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3569IFE#PBF requirements.
6.How does Aetrix verify that LTC3569IFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3569IFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3569IFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3569IFE#PBF?
All LTC3569IFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3569IFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3569IFE#PBF part is unused and in its original packaging.
Return procedure for LTC3569IFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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