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Analog Devices Inc. LTC3569IFE#TRPBF
- Part No.:
- LTC3569IFE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3569IFE#TRPBF.pdf
- Description:
- IC REG BUCK ADJ TRPL 16TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,379
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Product details
Overview
LTC3569IFE#TRPBF from Analog Devices (formerly Linear Technology) is a triple monolithic synchronous step-down DC/DC regulator IC with one 1.2A and two 600mA buck outputs, operating from 2.5V to 5.5V input, programmable 1MHz–3MHz switching frequency, and independent 800mV–425mV feedback references for dynamic voltage scaling in portable multi-rail systems.
For engineers reviewing the LTC3569IFE#TRPBF datasheet, LTC3569IFE#TRPBF pinout, LTC3569IFE#TRPBF application, or LTC3569IFE#TRPBF equivalent, key selection criteria include per-buck enable-programmable reference, slave-mode parallel configuration capability, Burst Mode® vs pulse-skipping trade-offs, PGOOD logic-AND behavior across enabled rails, and thermal protection with automatic restart.
Technical Context
The LTC3569IFE#TRPBF integrates three current-mode buck regulators with internal P/N-channel MOSFETs, fixed 2.25MHz or RT-resistor-programmable 1MHz–3MHz oscillator, and MODE pin-selectable Burst Mode® (for <100µA quiescent current) or pulse-skipping operation. Each buck features 100% duty-cycle dropout support and soft-start ramping at 0.75V/ms.
EN1/EN2/EN3 pins serve dual roles: enable control and 25mV-step reference programming via toggle counting (up to 15 cycles); FB2/FB3 pulled to SVIN configure Buck2/Buck3 as slaves to Buck1/Buck2 respectively, enabling 1.8A or dual 1.2A configurations using shared external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.5V to 5.5V - supports single-cell Li-ion, USB, and wide-input portable power rails without pre-regulation. |
| Output Currents | Buck1: up to 1.2A; Buck2 & Buck3: up to 600mA each - enables independent supply of CPU core, memory, and I/O rails. |
| Feedback Reference | Programmable 800mV to 425mV in 25mV steps via EN pin toggling - allows precise dynamic voltage scaling without external DACs. |
| Switching Frequency | 1MHz to 3MHz (RT-programmable) or fixed 2.25MHz - permits use of ultra-small 1–2.2µH inductors and low-ESR ceramic capacitors. |
| Quiescent Current | <100µA (all bucks in Burst Mode) - extends battery life in always-on subsystems like RTC or sensor monitoring. |
| Protection Features | Overtemperature shutdown (150°C trip), short-circuit current limiting, and undervoltage lockout (2.5V) - ensures robust operation under fault conditions. |
| PGOOD Behavior | Open-drain AND of all enabled buck PGOOD flags - provides system-level power-good assertion only when all active rails are in regulation. |
Pinout & Package
Package: 16-lead plastic TSSOP (FE-16), 3mm × 4.4mm body, exposed thermal pad (Pin 17) soldered to PCB ground for θJA = 38°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2, EN3 | Enable & reference programming input | Toggle falling edge counts down internal DAC; 15 toggles yield 425mV FB reference; also enable respective buck. |
| FB1, FB2, FB3 | Feedback input | Compares output divider voltage to programmed reference; pulling FB2/FB3 to SVIN disables control loop and configures slave mode. |
| SW1, SW2, SW3 | Power switch node | Drives external inductor; SW2/SW3 go Hi-Z in slave mode unless master is active and ENx is high. |
| PVIN1, PVIN2, PVIN3 | Main power input per buck | Decoupled individually to PGNDx; PVIN1 and PVIN3 share Pin 8 in FE package - requires careful layout to avoid cross-coupling. |
| PGND1, PGND2, PGND3 | Power ground per buck | Low-impedance return path for respective buck's output capacitor and input decoupling - must be star-connected or partitioned to minimize noise coupling. |
| MODE | Mode select / sync input | Tied to SVIN → Burst Mode; tied to SGND → pulse-skipping; driven with ≥100ns pulses → external clock sync (1.2–3MHz). |
| PGOOD | Power-good open-drain output | Asserts only when all enabled outputs reach ±8% of target; blanked for transients <2µs - suitable for processor reset sequencing. |
| RT | Oscillator timing resistor | Connect to GND with 100k–453kΩ to set 3MHz–1MHz; tie to SVIN for fixed 2.25MHz - eliminates need for crystal or external clock source. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck architecture | Enables simultaneous generation of three distinct, dynamically scalable output voltages (e.g., 1.8V, 1.2V, 1.0V) from single input without external controllers. |
| Slave-mode parallel configuration | Allows Buck2 to follow Buck1 or Buck3 to follow Buck2, enabling 1.8A (Buck1+Buck2) or dual 1.2A (Buck1+Buck2 + Buck3) outputs with shared inductor and output capacitor. |
| Single-pin reference programming | Eliminates need for external resistive dividers or digital interfaces - reference adjustment achieved solely by toggling ENx, reducing BOM count and layout area. |
| Internally compensated control loops | Removes requirement for external compensation networks - simplifies design, improves stability margin, and reduces component count across all three regulators. |
| Zero shutdown current | Draws ≤1µA total when all ENx = 0V - critical for long-term storage or maintenance modes in battery-powered devices. |
Applications
| Smartphone Application Processor Core | Multi-Rail Wearable Sensor Hub |
|---|---|
Use Scenario: Powering ARM Cortex-A series CPU cores requiring adaptive voltage scaling from 1.3V down to 0.7V based on workload. IC Role / Device Role / Timing Role: LTC3569IFE#TRPBF delivers the primary core rail (Buck1) with real-time VDD scaling via EN1 toggling, while Buck2 supplies GPU and Buck3 powers DDR I/O. Use Value: Achieves >90% efficiency at 800mA load across 1.0V–1.3V range, with PGOOD coordination ensuring safe DVFS transitions without system reset. | Use Scenario: Supplying ultra-low-power MCU (1.8V), MEMS accelerometer (3.3V via LDO fed from Buck2), and Bluetooth radio (1.2V) in compact hearable device. IC Role / Device Role / Timing Role: LTC3569IFE#TRPBF Buck1 powers MCU core; Buck2 (slave to Buck1) boosts current capacity for burst-mode BLE transmission; Buck3 supplies stable 1.2V to RF section. Use Value: Burst Mode® operation maintains <50µA total quiescent current during sleep, extending coin-cell battery life beyond 6 months. |
| Industrial IoT Edge Node | Portable Medical Diagnostic Device |
Use Scenario: Providing isolated 3.3V (Buck1), 2.5V (Buck2), and 1.8V (Buck3) rails for microcontroller, analog front-end, and FPGA configuration in battery-backed field sensor. IC Role / Device Role / Timing Role: LTC3569IFE#TRPBF operates across –40°C to 125°C junction range; PGOOD AND logic gates system boot until all rails stabilize within tolerance. Use Value: Internal compensation and 100% duty-cycle dropout ensure reliable startup and regulation even as battery voltage drops to 2.7V during deep discharge. | Use Scenario: Powering ECG analog signal chain (±2.5V via charge pump from Buck2), low-noise ADC (3.0V), and display driver (5.0V via boost from Buck3) in handheld patient monitor. IC Role / Device Role / Timing Role: LTC3569IFE#TRPBF Buck1 supplies main 3.3V system rail; Buck2 and Buck3 configured in slave mode to deliver 1.2A peak for flash memory write operations. Use Value: Pulse-skipping mode minimizes output ripple (<15mVP-P) on sensitive analog rails, meeting IEC 60601-1 EMI requirements without added filtering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65217CZQZ | Integrated PMIC with 3 buck + 4 LDOs; fixed 2.2MHz; no EN-pin reference programming; I²C interface required for voltage setting. | Requires microcontroller firmware control; lacks standalone toggle-based programming; better suited for designs with existing I²C infrastructure. | Select TPS65217CZQZ when system already uses I²C for power management and needs integrated LDOs; avoid if pin-strapped simplicity or zero-firmware DVFS is required. |
| MP2145GQZ-12 | Single 12A buck; no multi-rail integration; external compensation; no slave-mode or reference programming. | Cannot replace LTC3569IFE#TRPBF directly; used only when consolidating into single high-current rail with discrete secondary regulation. | Select MP2145GQZ-12 only for high-current single-rail applications where three independent outputs are unnecessary and board space allows discrete post-regulation. |
Compared with TPS65217CZQZ and MP2145GQZ-12, the LTC3569IFE#TRPBF uniquely combines standalone reference programming, slave-mode flexibility, and triple-buck integration in a 16-pin TSSOP - making it optimal for firmware-light, space-constrained portable systems needing rapid DVFS without communication overhead.
Availability
LTC3569IFE#TRPBF is available at Aetrix Electronics and suitable for smartphone application processor core supplies, wearable sensor hubs, industrial IoT edge nodes, and portable medical diagnostic devices requiring stable component supply across extended temperature ranges.
Supply support for LTC3569IFE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous automotive-grade qualification and long-term product longevity commitments.
The LTC3569 belongs to Linear's precision multi-output DC/DC regulator family, designed specifically for space-constrained portable electronics requiring dynamic voltage scaling, low quiescent current, and robust thermal performance without firmware dependency.
FAQ
What is the maximum output current capability of LTC3569IFE#TRPBF when configured in slave mode?
The LTC3569IFE#TRPBF supports up to 1.8A output current when Buck2 is configured as a slave to Buck1 (using shared inductor and output capacitor), or dual 1.2A outputs when Buck2 follows Buck1 and Buck3 operates independently. This is achieved without external current-sense resistors or additional control ICs - the slave configuration relies on internal gate drive synchronization and matched MOSFET RDS(ON) (195mΩ/180mΩ for Buck1, 265mΩ/250mΩ for Buck2/Buck3).
How does the EN pin toggle programming work on LTC3569IFE#TRPBF, and what happens if more than 15 toggles are applied?
The EN1/EN2/EN3 pins on LTC3569IFE#TRPBF serve as both enable inputs and reference programming interfaces: each falling edge decrements an internal 4-bit counter, lowering the feedback reference by 25mV per toggle from 800mV down to 425mV. If more than 15 toggles occur, the counter saturates at the minimum value (425mV) and remains there until the EN pin is held low for >170µs to reset to full scale. No damage or undefined behavior occurs.
Can LTC3569IFE#TRPBF operate with input voltage below 2.5V, and what happens during undervoltage lockout?
No, LTC3569IFE#TRPBF has a hard undervoltage lockout threshold at 2.5V (typical). When SVIN drops below this level, all regulators shut down, PGOOD is deasserted, and quiescent current falls to ≤1µA. The UVLO circuit does not reset the programmed reference DAC - upon recovery above 2.5V, the part resumes operation at the last programmed reference voltage without requiring re-toggling of EN pins.
What thermal protection behavior does LTC3569IFE#TRPBF exhibit, and how does it recover?
LTC3569IFE#TRPBF triggers thermal shutdown at 150°C junction temperature, disabling all switching activity and pulling SW1/SW2/SW3 low via 2kΩ internal pull-downs. Once die temperature cools below 125°C, the device automatically restarts with a full soft-start sequence (0.75V/ms ramp) and retains the previously programmed reference DAC value - no external reset or reconfiguration is needed.
Is LTC3569IFE#TRPBF pin-compatible with other packages in the LTC3569 family, such as the QFN variants?
No, LTC3569IFE#TRPBF uses the 16-lead TSSOP (FE-16) package with unique pinout and footprint, including shared PVIN1/PVIN3 on Pin 8. It is not pin-compatible with the 20-lead 3mm×3mm (UD) or 3mm×4mm (UDC) QFN variants, which have separate PVIN pins, different ground pin allocations (PGND1/2/3), and distinct thermal pad configurations. PCB layout must be specific to the FE package.
LTC3569IFE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.425V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 600mA, 1.2A
- Frequency - Switching:
- 2.25MHz, 1MHz ~ 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP-EP
LTC3569IFE#TRPBF FAQ
1.How can I place an order for LTC3569IFE#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3569IFE#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3569IFE#TRPBF reliable?
The price and inventory of LTC3569IFE#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3569IFE#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3569IFE#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3569IFE#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3569IFE#TRPBF?
LTC3569IFE#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3569IFE#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3569IFE#TRPBF?
For technical support, including LTC3569IFE#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3569IFE#TRPBF requirements.
6.How does Aetrix verify that LTC3569IFE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3569IFE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3569IFE#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3569IFE#TRPBF?
All LTC3569IFE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3569IFE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3569IFE#TRPBF part is unused and in its original packaging.
Return procedure for LTC3569IFE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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