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Analog Devices Inc. LTC3569IUDC#PBF
- Part No.:
- LTC3569IUDC#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
LTC3569IUDC#PBF.pdf
- Description:
- IC REG BUCK ADJ TRPL 20QFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,927
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Product details
Overview
LTC3569IUDC#PBF from Analog Devices (formerly Linear Technology) is a triple-output synchronous buck DC/DC regulator IC with 1.2A and dual 600mA outputs, operating from 2.5V to 5.5V input, programmable 0.425V–0.8V feedback references in 25mV steps, and adjustable 1MHz–3MHz switching frequency - used in portable multi-rail power systems requiring dynamic voltage scaling.
For engineers reviewing the LTC3569IUDC#PBF datasheet, LTC3569IUDC#PBF pinout, LTC3569IUDC#PBF application, or LTC3569IUDC#PBF equivalent, key selection considerations include independent EN-pin-based reference programming, slave-mode parallel configuration capability for higher current, Burst Mode® vs pulse-skipping trade-offs, thermal performance in the 3mm × 4mm QFN package, and PGOOD logic-AND behavior across enabled outputs.
Technical Context
The LTC3569IUDC#PBF integrates three current-mode synchronous buck regulators with internal PMOS/NMOS switches, each featuring independently programmable 0.425V–0.8V FB references via EN pin toggling, and selectable operating modes (Burst Mode® or pulse-skipping) controlled by the MODE pin. It supports 100% duty cycle dropout operation and includes soft-start ramping at 0.75V/ms.
Its architecture enables flexible power staging: Buck 2 can be configured as a slave to Buck 1 by pulling FB2 to SVIN; Buck 3 can similarly follow Buck 2. All regulators are internally compensated, eliminating external compensation components, and share a single RT pin for frequency programming or synchronization via the MODE pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5V to 5.5V - supports single-cell Li-ion, USB, and regulated intermediate rails without external LDO pre-regulation. |
| Output Current Capability | 1.2A (Buck 1), 600mA (Buck 2), 600mA (Buck 3) - enables independent powering of core, I/O, and memory rails. |
| Feedback Reference Range | 0.425V to 0.8V in 25mV steps - allows precise output voltage setting (e.g., 1.2V, 1.8V, 2.5V) using standard resistor dividers. |
| Switching Frequency | 1MHz to 3MHz (programmable via RT) or fixed 2.25MHz - permits use of sub-3mm inductors and low-ESR ceramic capacitors. |
| Quiescent Current | <100µA (all regulators in Burst Mode) - extends battery life in always-on portable devices. |
| Protection Features | Overtemperature shutdown (150°C), short-circuit protection, and undervoltage lockout (2.5V) - ensures robust operation under fault conditions. |
| PGOOD Behavior | Open-drain AND of all enabled outputs - provides system-level power-good indication only when all active rails are within ±8% regulation. |
Pinout & Package
The LTC3569IUDC#PBF is housed in a 20-lead, 3mm × 4mm plastic QFN package (LFYW) with exposed thermal pad (Pin 21) soldered to PCB ground for optimal thermal performance (θJA = 43°C/W). Pin numbering follows standard QFN top-view orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SVIN | Main supply input | Provides bias for internal circuitry; decoupled to SGND with 1µF low-ESR capacitor. |
| PVIN1, PVIN2, PVIN3 | Power inputs per buck stage | Independent high-current inputs for each regulator; each requires local 4.7µF decoupling to respective PGND. |
| SW1, SW2, SW3 | Switch node outputs | Connect directly to inductor; swing between respective PVIN and PGND; support 100% duty cycle operation. |
| PGND1, PGND2, PGND3 | Power ground returns | Separate low-impedance return paths for each buck's output capacitor and input capacitor - critical for EMI control and load transient response. |
| FB1, FB2, FB3 | Feedback inputs | Monitor output voltage via resistive divider; FB2/FB3 pulled to SVIN enable slave mode (parallel operation). |
| EN1, EN2, EN3 | Enable & reference programming | Toggle falling edges up to 15× to decrement VFB in 25mV steps; also enable/disable respective buck stage. |
| MODE | Mode select & sync input | Tied to SVIN → Burst Mode; tied to SGND → pulse-skipping; driven with ≥100ns pulses → external clock sync (1.2–3MHz). |
| RT | Oscillator timing | Resistor-to-ground sets free-running frequency (1–3MHz); tie to SVIN for fixed 2.25MHz. |
| PGOOD | Power-good flag | Open-drain output asserting only when all enabled outputs reach ±8% of target - used for processor reset or sequencing control. |
| SGND | Analog ground reference | Reference for SVIN, MODE, ENx, FBx; must be connected to clean analog ground plane, separate from noisy PGNDs where possible. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck regulation | Enables compact, single-chip solution for systems requiring three distinct, dynamically scalable supply rails (e.g., SoC core, memory, I/O). |
| Single-pin programmable reference | Eliminates need for external DAC or digital interface - VFB adjusted via simple EN pin toggling, reducing BOM count and layout complexity. |
| Slave-mode parallel configuration | Allows Buck 2 to mirror Buck 1 or Buck 3 to mirror Buck 2, enabling 1.8A (Buck1+Buck2) or 1.2A+600mA configurations without redesigning power stage layout. |
| Burst Mode® operation | Reduces no-load IQ to <100µA while maintaining regulation - essential for battery-powered devices with long standby periods. |
| Internally compensated control loop | Removes requirement for external compensation network, simplifying design validation and improving production consistency across temperature and load. |
Applications
| Mobile Application Processor Power | Multi-Rail FPGA Core/I/O Supply |
|---|---|
Use Scenario: Powering ARM-based application processors (e.g., i.MX, Snapdragon) requiring separate 1.2V core, 1.8V I/O, and 2.5V analog rails with dynamic voltage scaling during DVFS transitions. IC Role / Device Role / Timing Role: Primary triple-output PMIC delivering tightly regulated, sequenced, and monitored supplies - Buck 1 powers CPU core, Buck 2 powers I/O, Buck 3 powers analog subsystem. Use Value: Enables full DVFS implementation using only one IC; EN-pin programming allows runtime VFBB adjustment without firmware or I²C overhead; PGOOD AND logic ensures safe processor boot. | Use Scenario: Supplying Xilinx Artix-7 or Intel Cyclone V FPGA with independent 1.0V core, 1.8V bank, and 2.5V auxiliary rails - each requiring fast transient response and accurate initial voltage setting. IC Role / Device Role / Timing Role: Integrated power solution replacing discrete buck controllers + MOSFETs; soft-start ramp (0.75V/ms) prevents inrush-induced rail collapse during FPGA configuration. Use Value: Reduces board area by >40% vs. three discrete converters; internal compensation eliminates tuning effort; slave mode allows 2.0A core rail using Buck1+Buck2 without adding external power stages. |
| Wearable Health Sensor Hub | Industrial IoT Edge Node |
Use Scenario: Powering ultra-low-power wearable sensor hubs (ECG, SpO₂, accelerometer) with strict battery life targets and space constraints - requiring 1.8V MCU, 3.3V sensor interface, and 1.2V ADC reference. IC Role / Device Role / Timing Role: High-efficiency, low-IQ power manager supporting both active and deep-sleep states; Burst Mode® maintains regulation at µA-level loads. Use Value: Achieves <100µA system quiescent current with all rails active; 3mm × 4mm QFN fits tight wearable form factors; PGOOD confirms stable power before sensor sampling begins. | Use Scenario: Providing reliable, thermally robust power to industrial edge nodes (RS-485 gateway, vibration monitor) operating in extended temperature (-40°C to +125°C) with wide input (USB or 5V rail). IC Role / Device Role / Timing Role: Automotive-grade qualified (I-temp) triple buck regulator handling input transients and thermal stress; overtemperature shutdown protects against enclosure overheating. Use Value: Guaranteed operation across full -40°C to +125°C junction range; 43°C/W θJA enables passive cooling in sealed enclosures; UVLO prevents brownout-induced firmware corruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65270PWP | Fixed 1.2A/600mA/600mA outputs; no EN-pin reference programming - uses external resistors only; lacks slave-mode parallel capability. | Requires additional external components for dynamic voltage scaling; not suitable for applications needing runtime VOUT adjustment without MCU intervention. | Select when fixed-output voltages suffice and cost sensitivity outweighs flexibility needs. |
| ISL95210IRZ | Supports 1.5A/1.5A dual output only; no third independent buck - requires external LDO or second IC for third rail. | Cannot replace LTC3569IUDC#PBF in true triple-rail systems without added complexity or footprint penalty. | Choose only if system requires only two high-current rails and third rail is low-current (e.g., <100mA), allowing LDO supplementation. |
Compared with TPS65270PWP and ISL95210IRZ, the LTC3569IUDC#PBF uniquely combines on-the-fly reference programming, slave-mode parallel operation, and guaranteed -40°C to +125°C performance in a single 3mm × 4mm QFN - making it the only option that preserves design flexibility, thermal margin, and board-area efficiency for demanding portable and industrial multi-rail applications.
Availability
LTC3569IUDC#PBF is available at Aetrix Electronics and suitable for portable computing, wearable health monitoring, and industrial IoT edge nodes requiring stable component supply, extended temperature operation, and compact multi-rail power integration.
Supply support for LTC3569IUDC#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance analog and power management portfolio with rigorous automotive and industrial qualification standards.
The LTC3569 product line delivers highly integrated, thermally optimized multi-output DC/DC regulators targeting space-constrained, battery-sensitive applications such as smartphones, wearables, and portable medical devices.
FAQ
What is the maximum output current capability of each buck regulator in the LTC3569IUDC#PBF?
The LTC3569IUDC#PBF provides 1.2A from Buck 1 (SW1/PVIN1 path), and 600mA each from Buck 2 (SW2/PVIN2) and Buck 3 (SW3/PVIN3). Peak inductor current limits are specified as 2.0A (Buck 1) and 1.0A (Bucks 2/3) - ensuring robust overload handling. When configured in slave mode, Buck 2 can deliver up to 1.8A in parallel with Buck 1, and Buck 3 can augment Buck 2 similarly. The LTC3569IUDC#PBF datasheet confirms these ratings under continuous operation at 25°C ambient with proper PCB thermal design.
How does the EN pin programming work on the LTC3569IUDC#PBF, and what is the minimum pulse width required?
The EN1, EN2, and EN3 pins on the LTC3569IUDC#PBF serve dual roles: enabling the respective buck regulator and decrementing its feedback reference voltage in 25mV steps from 0.8V down to 0.425V. Each falling edge toggles an internal counter; 15 toggles yield the minimum 0.425V reference. The minimum valid pulse width is 60ns, and the counter resets if EN remains high for >125µs (tEN) or low for >170µs (tOFF). This mechanism is fully implemented in the LTC3569IUDC#PBF silicon and verified across temperature.
Can the LTC3569IUDC#PBF operate with only one or two buck regulators enabled, and what happens to quiescent current?
Yes, the LTC3569IUDC#PBF supports partial enablement: any combination of Buck 1, Buck 2, or Buck 3 can be independently activated via their EN pins. Quiescent current scales linearly - typical input current is 47µA (Buck 1 only, Burst Mode), 69µA (two bucks), and <100µA (all three bucks). Shutdown current drops to 0.1µA when all EN pins are low. These values are measured and specified in the LTC3569IUDC#PBF Electrical Characteristics table under "IQSHDN" and "Additional Input Current per Buck".
What thermal performance can be expected from the LTC3569IUDC#PBF in its 3mm × 4mm QFN package?
The LTC3569IUDC#PBF in the LFYW (3mm × 4mm QFN) package has a specified θJA of 43°C/W under JEDEC-standard PCB conditions (2s2p copper). With the exposed thermal pad (Pin 21) properly soldered to a solid GND plane, junction temperature rise remains within safe limits up to ~1.5A total output current at 25°C ambient. Overtemperature protection activates at 150°C and auto-restarts at 125°C. This thermal behavior is validated for the LTC3569IUDC#PBF across its full -40°C to +125°C operating range.
Does the LTC3569IUDC#PBF support external clock synchronization, and what are the timing requirements?
Yes, the LTC3569IUDC#PBF supports external clock synchronization via the MODE pin. When driven with a logic-level signal (CMOS/TTL compatible), it locks to input frequencies from 1.2MHz to 3MHz. The signal must have minimum high and low pulse widths of 100ns (TMODEPW), and the internal oscillator automatically switches to pulse-skipping mode during sync. This capability is explicitly documented in the LTC3569IUDC#PBF datasheet's "Electrical Characteristics" and "Operation" sections - confirming deterministic phase alignment and jitter suppression for noise-sensitive systems.
LTC3569IUDC#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.425V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 600mA, 1.2A
- Frequency - Switching:
- 2.25MHz, 1MHz ~ 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN (3x4)
LTC3569IUDC#PBF FAQ
1.How can I place an order for LTC3569IUDC#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3569IUDC#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3569IUDC#PBF reliable?
The price and inventory of LTC3569IUDC#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3569IUDC#PBF is usually 5 days.
3.What payment methods are accepted for LTC3569IUDC#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3569IUDC#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3569IUDC#PBF?
LTC3569IUDC#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3569IUDC#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3569IUDC#PBF?
For technical support, including LTC3569IUDC#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3569IUDC#PBF requirements.
6.How does Aetrix verify that LTC3569IUDC#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3569IUDC#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3569IUDC#PBF meets industry standards.
7.What is the process for return or replacement of LTC3569IUDC#PBF?
All LTC3569IUDC#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3569IUDC#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3569IUDC#PBF part is unused and in its original packaging.
Return procedure for LTC3569IUDC#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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