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Analog Devices Inc. LTC3569IUDC#TRPBF

Part No.:
LTC3569IUDC#TRPBF
Manufacturer:
Analog Devices Inc.
Category:
Voltage Regulators - DC DC Switching Regulators
Package:
20-WFQFN Exposed Pad
Datasheet:
AetrixLTC3569IUDC#TRPBF.pdf
Description:
IC REG BUCK ADJ TRPL 20QFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,208

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Product details

Overview

LTC3569IUDC#TRPBF from Analog Devices (formerly Linear Technology) is a triple-output synchronous buck DC/DC regulator IC with 1.2A and dual 600mA outputs, operating from 2.5V to 5.5V input, programmable 0.425V–0.8V feedback references in 25mV steps, adjustable 1MHz–3MHz switching frequency, and integrated current-mode control for portable power management in multi-rail systems.

For engineers reviewing the LTC3569IUDC#TRPBF datasheet, LTC3569IUDC#TRPBF pinout, LTC3569IUDC#TRPBF application, or LTC3569IUDC#TRPBF equivalent, key selection criteria include independent VFB programming per channel, slave-mode parallel configuration capability for higher-current rails, Burst Mode™ vs pulse-skipping trade-offs, thermal performance in the 3mm × 4mm QFN package, and PGOOD logic-AND behavior across enabled outputs.

Technical Context

The LTC3569IUDC#TRPBF integrates three current-mode synchronous buck regulators sharing a common oscillator architecture with selectable fixed (2.25MHz) or resistor-programmed (1–3MHz) frequency. Each regulator features internal compensation, soft-start ramping at 0.75V/ms, and independent enable pins that double as digital reference programming inputs via toggle counting.

Its slave-mode operation enables two distinct high-current configurations: Buck2 can follow Buck1 (enabling 1.8A output), and Buck3 can follow Buck2 (enabling cascaded 1.2A + 1.2A). The PGOOD pin implements logical AND of all enabled channels' regulation status with ±8% threshold hysteresis and 2µs transient blanking.

Key Specifications

ParameterValue and Actual Design Meaning
Input Voltage Range2.5V to 5.5V - supports single-cell Li-ion, USB, and wide-input portable power rails without external LDO pre-regulation.
Output Current Capability1.2A (Buck1), 600mA (Buck2), 600mA (Buck3) - enables independent supply of core, I/O, and memory rails in SoC-based systems.
Feedback Reference Range0.425V to 0.8V in 25mV steps - allows precise output voltage setting (e.g., 1.2V, 1.8V, 2.5V) using standard resistor dividers without external DACs.
Switching FrequencyProgrammable 1MHz–3MHz or fixed 2.25MHz - permits optimization of inductor size (e.g., 2.2µH @ 2.25MHz) and EMI profile for space-constrained designs.
Quiescent Current<100µA (all regulators in Burst Mode) - extends battery life in always-on subsystems such as real-time clocks or sensor wake-up circuits.
Thermal ProtectionOvertemperature shutdown at 150°C with automatic restart at 125°C - prevents permanent damage during sustained overload or poor PCB thermal design.
PGOOD LogicOpen-drain AND of all enabled outputs with ±8% regulation window and 2µs transient immunity - provides reliable system power sequencing and fault detection.

Pinout & Package

The LTC3569IUDC#TRPBF is housed in a 20-lead, 3mm × 4mm plastic QFN package (LFYW) with exposed thermal pad (Pin 21) requiring solder connection to PCB ground for rated θJA = 43°C/W performance.

Pin/TerminalCircuit RoleDesign Meaning
SVINMain bias supply inputProvides internal circuitry bias; must be decoupled to SGND with ≥1µF low-ESR capacitor.
PVIN1, PVIN2, PVIN3Power input for each buck stageSeparate high-current inputs allow independent input filtering and reduce shared impedance coupling between regulators.
PGND1, PGND2, PGND3Power ground return for each buckDedicated power ground pins minimize ground bounce and improve load transient response per channel.
SW1, SW2, SW3Switch node outputsConnect directly to respective inductors; swing from corresponding PVIN to PGND; require tight layout to minimize EMI.
FB1, FB2, FB3Feedback voltage inputsMonitor output divider ratio; toggling ENx reprograms reference; pulling FB2/FB3 to SVIN enables slave mode.
EN1, EN2, EN3Enable + reference programming inputsEach rising edge toggles internal DAC counter; 15 toggles yield minimum 0.425V reference; tEN = 125–240µs delay before soft-start begins.
MODEMode selection & sync inputTied to SVIN → Burst Mode; tied to SGND → pulse-skipping; driven externally → synchronizes to 1.2–3MHz clock with ≥100ns pulse width.
RTOscillator timing resistorResistor to GND sets frequency (1–3MHz); tie to SVIN for fixed 2.25MHz operation - eliminates external crystal or clock source.
PGOODPower-good open-drain flagAsserts only when all enabled outputs are within ±8% of target; requires external pull-up; immune to sub-2µs transients.
SGNDAnalog ground referenceSeparate from power grounds; connects to SVIN decoupling cap; critical for reference accuracy and noise immunity.

Key Features

FeatureDesign Value
Triple independent buck regulationEnables compact, low-noise generation of three distinct supply rails (e.g., 1.2V core, 1.8V I/O, 3.3V interface) from single input without discrete controllers.
Single-pin VFB programmingEliminates need for external DACs or I²C interfaces - output voltage set digitally via EN pin toggling, reducing BOM count and layout complexity.
Configurable slave-mode operationAllows Buck2 to mirror Buck1 (1.2A + 600mA = 1.8A) or Buck3 to mirror Buck2 (600mA + 600mA = 1.2A), enabling flexible high-current rail synthesis without redesign.
Burst Mode™ and pulse-skippingDelivers <100µA quiescent current at light loads (Burst Mode) or lower output ripple at medium loads (pulse-skipping), supporting dynamic power-state transitions.
Internally compensated control loopsRemoves requirement for external compensation networks - simplifies design validation and reduces component count while maintaining stability across full load range.
100% duty cycle dropout operationMaintains regulation down to VIN – VOUT ≈ RDS(ON) × ILOAD, enabling efficient operation near battery end-of-life in single-cell systems.

Applications

Mobile Application Processor PowerMulti-Rail FPGA Core & I/O Supply

Use Scenario: Powering ARM-based application processors with separate core (VDD_ARM), memory (VDD_IO), and peripheral (VDD_3V3) rails from a single Li-ion battery.

IC Role / Device Role / Timing Role: LTC3569IUDC#TRPBF serves as primary PMIC delivering tightly regulated, sequenced, and monitored 1.2V/1.8V/3.3V supplies with PGOOD coordination.

Use Value: Reduces board area by replacing three discrete buck converters; slave-mode capability supports 1.8A core rail without external MOSFETs or controller redesign.

Use Scenario: Providing configurable voltage rails for Xilinx Artix-7 FPGA banks requiring 1.0V core, 1.8V auxiliary, and 3.3V I/O with dynamic voltage scaling.

IC Role / Device Role / Timing Role: LTC3569IUDC#TRPBF acts as programmable multi-output regulator with independent EN/FB control enabling on-the-fly VDDINT adjustment during partial reconfiguration.

Use Value: Eliminates need for external I²C-controlled PMIC; 25mV reference steps allow precise matching to FPGA VCCINT tolerance (±3%) without custom resistor networks.

Wearable Health Sensor HubIndustrial IoT Edge Node

Use Scenario: Powering ultra-low-power ECG front-end (1.8V), BLE radio (3.3V), and microcontroller (1.2V) in a coin-cell–powered wearable patch.

IC Role / Device Role / Timing Role: LTC3569IUDC#TRPBF operates in Burst Mode™ to maintain µA-level quiescent current across all rails during sleep, waking only selected regulators on sensor trigger.

Use Value: Achieves >1-year battery life by minimizing no-load consumption; PGOOD AND logic ensures system reset only after all rails stabilize post-wake.

Use Scenario: Supplying isolated RS-485 transceiver (5V), Cortex-M4 MCU (3.3V), and analog sensor front-end (2.5V) in a DIN-rail mounted condition monitoring node.

IC Role / Device Role / Timing Role: LTC3569IUDC#TRPBF delivers robust, thermally managed multi-rail power from 5–24V industrial input via upstream buck, with overtemperature protection preventing field failures.

Use Value: Exposed thermal pad and 43°C/W θJA enable reliable operation at 85°C ambient without heatsinks; RT pin allows EMI tuning to meet CISPR-22 Class B limits.

Equivalent & Alternatives

The following parts are listed as comparable options for similar triple-output buck regulator applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
TPS65217CIRSLRIntegrated fuel gauge, RTC, and LDOs; fixed 1.0V/1.2V/1.8V/3.3V outputs; no VFB programming; 3.3V-only input range.Suitable for TI ecosystem designs requiring battery telemetry but lacks flexibility for non-standard voltages or wide-input operation.Select TPS65217CIRSLR only when fuel gauging and fixed rail counts match; LTC3569IUDC#TRPBF preferred for programmable outputs and 2.5–5.5V input.
ISL95210IRZ-TDual 3A + 3A buck with I²C interface; no third regulator; supports adaptive voltage positioning (AVP); requires external EEPROM for configuration.Targeted at CPU VRM applications with dynamic AVP; lacks third rail and independent reference programming for general-purpose multi-rail use.Choose ISL95210IRZ-T for high-current dual-rail CPU power; LTC3569IUDC#TRPBF remains optimal for cost-sensitive, triple-rail, pin-programmable designs.

Compared with TPS65217CIRSLR and ISL95210IRZ-T, the LTC3569IUDC#TRPBF uniquely combines triple independent buck regulation, digital VFB programming without serial interface, wide 2.5–5.5V input, and slave-mode flexibility - making it the only solution that meets requirements for compact, programmable, and thermally robust multi-rail power in portable and industrial edge devices.

Availability

LTC3569IUDC#TRPBF is available at Aetrix Electronics and suitable for mobile processor power, FPGA multi-rail supply, wearable sensor hubs, and industrial IoT edge nodes requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for LTC3569IUDC#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. (ADI) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, formed through the acquisition of Linear Technology in 2017.

The LTC3569IUDC#TRPBF belongs to ADI's Power by Linear™ family of highly integrated DC/DC regulators, designed specifically for space-constrained, battery-powered applications demanding high efficiency, low quiescent current, and flexible multi-rail power delivery.

FAQ

What is the maximum output current capability of each buck regulator in the LTC3569IUDC#TRPBF?

The LTC3569IUDC#TRPBF provides up to 1.2A from Buck1 (SW1/PVIN1 path), and 600mA each from Buck2 (SW2/PVIN2) and Buck3 (SW3/PVIN3). Peak inductor current limits are specified as 2.0A (Buck1) and 1.0A (Buck2/Buck3) under typical conditions. These ratings assume proper thermal design with the exposed pad soldered to PCB ground.

How does the EN pin function beyond enabling the buck regulator in the LTC3569IUDC#TRPBF?

In the LTC3569IUDC#TRPBF, each EN pin serves a dual role: enabling the associated buck regulator and digitally programming its feedback reference voltage. Toggling ENx up to 15 times lowers the internal VFB reference from 0.8V to 0.425V in 25mV decrements. A 125–240µs delay occurs after the final toggle before soft-start initiates.

Can the LTC3569IUDC#TRPBF operate with only one or two buck regulators enabled?

Yes, the LTC3569IUDC#TRPBF supports partial enablement: any combination of Buck1, Buck2, and Buck3 can be independently enabled or disabled via their respective EN pins. When disabled, the corresponding SW pin enters Hi-Z state, and quiescent current drops proportionally - e.g., all three off yields <1µA shutdown current.

What is the purpose of the MODE pin in the LTC3569IUDC#TRPBF, and how does it affect operation?

The MODE pin in the LTC3569IUDC#TRPBF selects between Burst Mode™ (MODE = SVIN) for ultra-low IQ at light loads, and pulse-skipping mode (MODE = SGND) for reduced output ripple. It also accepts external clock signals (1.2–3MHz) for synchronization - automatically forcing pulse-skipping mode during sync operation.

Does the LTC3569IUDC#TRPBF support 100% duty cycle operation, and under what conditions?

Yes, the LTC3569IUDC#TRPBF supports 100% duty cycle (dropout) operation when input voltage approaches the output voltage. In this mode, the P-channel switch remains continuously on, delivering VOUT = VIN – ILOAD × RDS(ON). This feature maintains regulation during battery discharge in single-cell systems without requiring external LDOs.

LTC3569IUDC#TRPBF Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
20-WFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Function:
Step-Down
Output Configuration:
Positive
Topology:
Buck
Output Type:
Adjustable
Number of Outputs:
3
Voltage - Input (Min):
2.5V
Voltage - Input (Max):
5.5V
Voltage - Output (Min/Fixed):
0.425V
Voltage - Output (Max):
5.5V
Current - Output:
600mA, 1.2A
Frequency - Switching:
2.25MHz, 1MHz ~ 3MHz
Synchronous Rectifier:
Yes
Operating Temperature:
-40°C ~ 125°C (TJ)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
20-QFN (3x4)

LTC3569IUDC#TRPBF FAQ

1.How can I place an order for LTC3569IUDC#TRPBF through Aetrix?

Please submit a Request for Quotation (RFQ) for LTC3569IUDC#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for LTC3569IUDC#TRPBF reliable?

The price and inventory of LTC3569IUDC#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3569IUDC#TRPBF is usually 5 days.

3.What payment methods are accepted for LTC3569IUDC#TRPBF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3569IUDC#TRPBF transactions.

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4.How is shipping managed for LTC3569IUDC#TRPBF?

LTC3569IUDC#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your LTC3569IUDC#TRPBF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for LTC3569IUDC#TRPBF?

For technical support, including LTC3569IUDC#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3569IUDC#TRPBF requirements.

6.How does Aetrix verify that LTC3569IUDC#TRPBF is sourced from the original manufacturer or authorized distributors?

All LTC3569IUDC#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3569IUDC#TRPBF meets industry standards.

7.What is the process for return or replacement of LTC3569IUDC#TRPBF?

All LTC3569IUDC#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3569IUDC#TRPBF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The LTC3569IUDC#TRPBF part is unused and in its original packaging.

Return procedure for LTC3569IUDC#TRPBF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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