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Analog Devices Inc. LTC3569IUD#PBF
- Part No.:
- LTC3569IUD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-WFQFN Exposed Pad
- Datasheet:
-
LTC3569IUD#PBF.pdf
- Description:
- IC REG BUCK ADJ TRPL 20QFN
- Quantity:
- Payment:
- Shipping:
Inventory:202
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Product details
Overview
LTC3569IUD#PBF from Analog Devices (formerly Linear Technology) is a triple monolithic synchronous step-down DC/DC regulator IC with one 1.2A and two 600mA current-mode buck channels, operating from 2.5V to 5.5V input, programmable 1MHz–3MHz switching frequency, and independent 800mV–425mV feedback references for dynamic voltage scaling in portable multi-rail systems.
For engineers reviewing the LTC3569IUD#PBF datasheet, LTC3569IUD#PBF pinout, LTC3569IUD#PBF application, or LTC3569IUD#PBF equivalent, key selection criteria include per-channel enable-programmable reference, slave-mode parallel configuration capability, Burst Mode® vs pulse-skipping trade-offs, thermal performance in 3mm × 3mm QFN, and PGOOD logic-AND behavior across enabled outputs.
Technical Context
The LTC3569IUD#PBF implements three independent current-mode control loops with internal P/N-channel MOSFETs, fixed 100% duty-cycle dropout operation, and slope-compensated peak-current sensing. Each buck uses an error amplifier comparing FBx to a DAC-programmed reference (0.425V–0.8V in 25mV steps), with soft-start ramping at 0.75V/ms.
MODE pin selects between Burst Mode® (low IQ <100µA all-regulators active) and pulse-skipping (lower ripple), while RT pin sets oscillator frequency (1–3MHz) or fixes it at 2.25MHz; FB2/FB3 pulled to SVIN configure Buck2/Buck3 as slaves to Buck1 or Buck2 respectively, enabling 1.8A or dual 1.2A configurations without external power stage duplication.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5V to 5.5V - supports single-cell Li-ion, USB, and wide-input portable power rails. |
| Output Current Capability | 1.2A (Buck1), 600mA (Buck2), 600mA (Buck3) - enables independent supply of CPU core, I/O, and memory rails. |
| Feedback Reference Range | 0.425V to 0.8V in 25mV steps - allows precise dynamic voltage scaling via ENx toggling without external DAC. |
| Switching Frequency | 1MHz to 3MHz (programmable) or fixed 2.25MHz - permits use of ultra-small 0805/0603 inductors and low-ESR ceramic capacitors. |
| Quiescent Current | <100µA (all regulators in Burst Mode) - extends battery life in always-on subsystems. |
| Protection Features | Overtemperature shutdown (150°C), short-circuit current limiting, and undervoltage lockout (2.5V) - ensures robust operation under fault conditions. |
| PGOOD Behavior | Open-drain AND of all enabled outputs - asserts only when all regulated voltages are within ±8% of target, enabling safe system power sequencing. |
Pinout & Package
The LTC3569IUD#PBF is housed in a 20-lead, 3mm × 3mm plastic QFN package (UD variant) with exposed thermal pad (Pin 21) soldered to PCB ground for θJA = 68°C/W. Pin numbering follows standard QFN top-view orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2, EN3 | Independent enable & reference programming inputs | Each toggled ≤15× to decrement FB reference by 25mV; high = enable, low = shutdown with 0.1µA IQ. |
| FB1, FB2, FB3 | Feedback inputs for output voltage regulation | Compare divider output to DAC-set reference; FB2/FB3 pulled to SVIN enable slave mode for parallel operation. |
| SW1, SW2, SW3 | Power switch node outputs | Drive external inductors; SW2/SW3 become Hi-Z in slave mode unless master is active. |
| PVIN1–PVIN3 | Dedicated input power pins per buck | Enable independent decoupling (4.7µF each) and minimize cross-regulator noise coupling. |
| PGND1–PGND3 | Separate power ground returns per buck | Reduce ground bounce and improve load transient response by isolating return paths. |
| MODE | Mode selection & synchronization input | Tied to SVIN = Burst Mode; tied to SGND = pulse-skipping; driven externally = sync clock input (1.2–3MHz). |
| RT | Oscillator timing resistor input | Resistor to GND sets fSW; tied to SVIN = fixed 2.25MHz operation. |
| PGOOD | Open-drain power-good status flag | Asserts only after all enabled outputs reach ±8% regulation; blanked for transients <2µs. |
| SVIN | Main bias supply input | Powers internal circuitry; decoupled to SGND with 1µF low-ESR capacitor. |
| SGND | Analog ground reference | Reference for SVIN, MODE, ENx, FBx; must be connected to clean system ground plane. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck architecture | Enables simultaneous generation of three distinct supply rails (e.g., 1.8V, 1.2V, 0.9V) from single input without external controllers. |
| Single-pin reference programming | Eliminates need for external DAC or resistor networks-ENx toggling directly configures VFB from 0.8V down to 0.425V in 25mV increments. |
| Configurable slave-mode parallel operation | Allows Buck2 to follow Buck1 (1.8A total) or Buck3 to follow Buck2 (dual 1.2A), reducing component count and board area in high-current rails. |
| Burst Mode® with <100µA quiescent current | Extends runtime in battery-powered standby states while maintaining regulation-critical for IoT sensor nodes and wearables. |
| Internally compensated current-mode control | Removes need for external compensation components, simplifying design and improving stability across load and input variations. |
Applications
| Mobile Application Processor Power | Multi-Rail FPGA Core/I/O Supply |
|---|---|
Use Scenario: Powering ARM Cortex-A series SoCs requiring dynamically scaled core (VDD_CPU), GPU (VDD_GPU), and memory interface (VDD_IO) rails from a single Li-ion cell. IC Role / Device Role / Timing Role: LTC3569IUD#PBF acts as primary triple-output PMIC, delivering 1.2A to core, 600mA to GPU, and 600mA to I/O with independent voltage programming and sequencing via PGOOD. Use Value: Reduces BOM count by replacing three discrete buck converters; enables DVFS via ENx toggling during runtime without firmware overhead. | Use Scenario: Supplying Xilinx Artix-7 FPGA with separate 1.0V core, 1.8V auxiliary, and 3.3V I/O rails in space-constrained industrial control modules. IC Role / Device Role / Timing Role: LTC3569IUD#PBF provides tightly regulated, low-noise supplies with independent enable/disable and PGOOD monitoring per rail for safe configuration loading. Use Value: Eliminates need for external sequencing IC; slave-mode capability allows 1.2A core rail using Buck1+Buck2 in parallel, improving thermal margin over discrete solutions. |
| Wireless Sensor Node Power Management | Automotive Infotainment Display Backlight + Logic |
Use Scenario: Powering BLE/Wi-Fi MCU, analog front-end, and EEPROM in battery-operated environmental sensors with multi-year lifetime requirements. IC Role / Device Role / Timing Role: LTC3569IUD#PBF delivers ultra-low-quiescent 3.3V (Buck1), 1.8V (Buck2), and 1.2V (Buck3) rails, entering Burst Mode® during sleep cycles to minimize leakage. Use Value: Achieves sub-100µA system standby current; integrated soft-start prevents inrush into large decoupling caps during wake-up events. | Use Scenario: Generating 5V backlight drive (via external boost), 1.1V processor core, and 1.8V display interface in automotive-grade infotainment head units. IC Role / Device Role / Timing Role: LTC3569IUD#PBF supplies critical logic rails with AEC-Q200-compatible thermal performance (–40°C to 125°C junction) and robust PGOOD sequencing for ASIL-B functional safety compliance. Use Value: Exposed thermal pad and 125°C rated operation ensure reliability in sealed enclosures; UVLO prevents brownout-induced MCU resets during cold cranking. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65217CIRSLR | Integrated fuel gauge, LDOs, and charger; lower max output current (1A/600mA/600mA); fixed 2.2MHz fSW; no slave-mode parallel capability. | Targeted at single-cell Li-ion tablets; lacks ENx-programmable reference and independent frequency tuning. | Select when battery management features outweigh programmability needs and thermal constraints allow larger TSSOP package. |
| ISL9305AIRZ-T | Two 1.2A bucks + one 600mA buck; 2.5V–5.5V input; 1.5MHz–4MHz programmable fSW; no EN-pin reference programming-uses I²C instead. | Requires microcontroller I²C interface for voltage setting; higher EMI risk due to lack of Burst Mode®; different pinout and layout. | Select when digital control and higher-frequency operation justify added firmware complexity and reduced light-load efficiency. |
Compared with TPS65217CIRSLR and ISL9305AIRZ-T, the LTC3569IUD#PBF uniquely combines hardware-based reference programming, slave-mode parallel operation, and sub-100µA Burst Mode®-making it optimal for compact, firmware-light, battery-sensitive designs where analog configurability and thermal efficiency are prioritized over digital interfaces or integrated battery functions.
Availability
LTC3569IUD#PBF is available at Aetrix Electronics and suitable for portable computing, industrial IoT edge nodes, and automotive infotainment systems requiring stable component supply, extended temperature operation (–40°C to 125°C), and high-efficiency multi-rail power conversion.
Supply support for LTC3569IUD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.
The LTC3569IUD#PBF belongs to Linear's µPower DC/DC converter family, engineered specifically for space-constrained, battery-powered applications demanding high integration, low quiescent current, and flexible multi-rail voltage generation without microcontroller dependency.
FAQ
How does the LTC3569IUD#PBF achieve independent output voltage programming without external DACs?
The LTC3569IUD#PBF uses dedicated EN1, EN2, and EN3 pins that function as both enable inputs and reference programming interfaces. Each falling edge on an ENx pin decrements the corresponding internal DAC by one step (25mV), lowering the feedback reference from 800mV down to 425mV in up to 15 toggles. This hardware-based method eliminates external components and firmware overhead, allowing real-time voltage adjustment during operation. The LTC3569IUD#PBF retains the programmed value through power cycles unless reconfigured.
What thermal performance can be expected from the LTC3569IUD#PBF in its 3mm × 3mm QFN package?
The LTC3569IUD#PBF in the UD package has a junction-to-ambient thermal resistance (θJA) of 68°C/W under standard JEDEC 2-layer board conditions. With its exposed thermal pad (Pin 21) properly soldered to a minimum 100mm² copper pour, the device sustains continuous 1.2A output at 125°C ambient when Vin = 3.6V and Vout = 1.2V. Overtemperature protection activates at 150°C junction, forcing shutdown until die cools to 125°C, ensuring long-term reliability in sealed enclosures. The LTC3569IUD#PBF is rated for –40°C to 125°C operating junction temperature.
Can the LTC3569IUD#PBF support parallel operation of its buck stages, and how is it configured?
Yes-the LTC3569IUD#PBF supports two parallel configurations: Buck2 can be slaved to Buck1 (enabling 1.8A total), or Buck3 can be slaved to Buck2 (enabling dual 1.2A rails). Configuration requires pulling FB2 or FB3 to SVIN while asserting the respective EN2 or EN3 pin high. The slave switch (SW2 or SW3) then follows the master's gate drive, sharing the same inductor and output capacitor. This reduces component count and improves thermal distribution versus discrete solutions. The LTC3569IUD#PBF maintains independent feedback for the master channel only in this mode.
What are the key differences between Burst Mode® and pulse-skipping operation in the LTC3569IUD#PBF?
Burst Mode® minimizes quiescent current (<100µA with all bucks active) by disabling switching entirely during light loads, resulting in higher output ripple but superior light-load efficiency-ideal for battery standby. Pulse-skipping maintains constant frequency down to moderate loads, then skips cycles to reduce average switching loss, offering lower ripple and better EMI control at the cost of higher IQ (~365µA typical). Selection is made via the MODE pin: SVIN = Burst Mode®, SGND = pulse-skipping. The LTC3569IUD#PBF defaults to pulse-skipping during soft-start regardless of MODE state.
Does the LTC3569IUD#PBF require external compensation components for stable operation?
No-the LTC3569IUD#PBF features fully internal compensation for all three buck regulators. Its current-mode architecture with built-in slope compensation eliminates the need for external RC networks or type-II/type-III compensators. Stability is guaranteed across the full input range (2.5V–5.5V), output voltage range (0.425V–0.8V × resistor divider), and load conditions (0–1.2A) when using recommended external components (e.g., 2.2µH inductor, 4.7µF output cap). This simplifies layout, reduces BOM count, and accelerates time-to-market. The LTC3569IUD#PBF is characterized for stability with standard ceramic capacitors and typical PCB parasitics.
LTC3569IUD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.425V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 600mA, 1.2A
- Frequency - Switching:
- 2.25MHz, 1MHz ~ 3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN (3x3)
LTC3569IUD#PBF FAQ
1.How can I place an order for LTC3569IUD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3569IUD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3569IUD#PBF reliable?
The price and inventory of LTC3569IUD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3569IUD#PBF is usually 5 days.
3.What payment methods are accepted for LTC3569IUD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3569IUD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3569IUD#PBF?
LTC3569IUD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3569IUD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3569IUD#PBF?
For technical support, including LTC3569IUD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3569IUD#PBF requirements.
6.How does Aetrix verify that LTC3569IUD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3569IUD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3569IUD#PBF meets industry standards.
7.What is the process for return or replacement of LTC3569IUD#PBF?
All LTC3569IUD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3569IUD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3569IUD#PBF part is unused and in its original packaging.
Return procedure for LTC3569IUD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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