Analog Devices Inc. LTC3607IMSE#PBF
- Part No.:
- LTC3607IMSE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-TFSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
LTC3607IMSE#PBF.pdf
- Description:
- IC REG BUCK ADJ 600MA DL 16MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:148
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Product details
Overview
LTC3607IMSE#PBF from Analog Devices (formerly Linear Technology) is a dual-channel monolithic synchronous step-down DC/DC regulator delivering 600mA per channel with 55µA quiescent current, operating from 4.5V to 15V input and supporting adjustable outputs from 0.6V to VIN. It features 2.25MHz fixed-frequency operation, internal compensation, and independent power-good outputs - used in dual Li-ion battery-powered instrumentation requiring compact, high-efficiency dual-rail supplies.
For engineers reviewing the LTC3607IMSE#PBF datasheet, LTC3607IMSE#PBF pinout, LTC3607IMSE#PBF application, or LTC3607IMSE#PBF equivalent, key selection criteria include light-load efficiency mode selection (Burst vs pulse-skipping), ±1.5% output voltage accuracy, 16-lead MSOP thermal performance (θJA = 37°C/W), and dual-channel independent soft-start timing.
Technical Context
The LTC3607IMSE#PBF implements peak current-mode control with a constant 2.25MHz switching frequency, enabling use of sub-1mm-height inductors and low-ESR ceramic capacitors. Each channel uses integrated P-channel and N-channel MOSFETs with RDS(ON) of 0.6Ω (top) and 0.25Ω (bottom), supporting 100% duty-cycle dropout operation.
Its MODE/SYNC pin serves dual functions: selecting Burst Mode (floating or ≥1V) for highest light-load efficiency or pulse-skipping mode (grounded) for lowest output ripple; and accepting external 1MHz–4MHz synchronization clocks, forcing pulse-skipping during sync. Independent RUN1/RUN2 enables staggered startup and channel sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 15V - supports dual Li-ion (8.4V max) and 12V industrial rails without external pre-regulation. |
| Output Current per Channel | 600mA - rated continuous output with thermal derating per MSOP package θJA = 37°C/W. |
| Quiescent Current | 55µA total - enables >1000-hour battery runtime in always-on sensor nodes powered by two Li-ion cells. |
| Switching Frequency | 2.25MHz (typical) - permits use of 4.7µH inductors ≤1mm height and 10µF ceramic output caps per rail. |
| Feedback Reference Voltage | 0.6V ±1.5% - sets minimum output at 0.6V and enables precise 3.3V/5V dual-rail generation via resistor dividers. |
| Power-Good Accuracy | ±8.5% window with 64-cycle blanking - provides reliable system-level power sequencing and fault detection without external comparators. |
| Shutdown Current | <1µA - ensures negligible battery drain during deep sleep or standby modes. |
Pinout & Package
Package: 16-lead plastic MSOP (3mm × 4.9mm), exposed pad (Pin 17) connected to PGND for thermal and electrical integrity. θJA = 37°C/W, θJC = 10°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MODE/SYNC (Pin 15) | Multi-function control input | Selects Burst Mode (≥1V) or pulse-skipping (GND); accepts 1–4MHz sync clock - determines light-load trade-off and system clock alignment. |
| PGOOD1 / PGOOD2 (Pins 16, 9) | Open-drain status outputs | Pull low when respective VOUT deviates >±8.5% - enables sequenced power-up and fault flagging in FPGA or microcontroller systems. |
| RUN1 / RUN2 (Pins 14, 11) | Independent enable inputs | Active-high (VIH ≥3.0V) - allows staggered startup, dynamic channel disable, and compatibility with 3.3V logic control signals. |
| VFB1 / VFB2 (Pins 13, 12) | Feedback reference inputs | Monitor divided output voltage against 0.6V internal reference - sets regulation point and enables remote sensing with Kelvin connections. |
| SW1 / SW2 (Pins 3, 6) | Switch node terminals | Connect to inductor high-side - carry high di/dt currents; require tight layout and ground stitching to minimize EMI and ringing. |
| PVIN1 / PVIN2 / SVIN (Pins 4, 5, 1) | Main power inputs | PVIN1/PVIN2 supply respective channels; SVIN powers internal circuitry - SVIN must be tied to higher of PVIN1/PVIN2 or via external diodes for redundancy. |
| PGND1 / PGND2 / SGND / PGND (Pins 2, 7, 8, 10, EP) | Ground return paths | Separate power and signal grounds reduce noise coupling; exposed pad (Pin 17) must be soldered to PCB ground plane for thermal compliance. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent soft-start | 0.35ms internal ramp per channel - prevents inrush current and enables controlled power sequencing in multi-rail systems. |
| Burst Mode operation | 30mVP-P typical ripple at light load with 55µA IQ - extends battery life in IoT edge sensors without sacrificing regulation stability. |
| 100% duty-cycle dropout | P-channel MOSFET remains fully on below VOUT - maintains regulated output down to VIN = VOUT + ILOAD×RDS(ON), critical for battery end-of-life operation. |
| Internal compensation | No external compensation components required - reduces BOM count and layout sensitivity while maintaining stable response across 0.6V–15V output range. |
| External frequency sync | 1MHz–4MHz sync range - eliminates beat frequencies in multi-converter systems and simplifies EMI filtering in dense PCB layouts. |
Applications
| Portable Medical Instrumentation | Dual-Rail FPGA Power Management |
|---|---|
Use Scenario: Handheld ultrasound probe with analog front-end (3.3V) and digital processing core (1.2V) powered from two-series Li-ion cells. IC Role / Device Role / Timing Role: Dual-output buck regulator providing isolated, sequenced 3.3V and 1.2V rails with independent PGOOD signaling for safe boot. Use Value: 55µA quiescent current extends battery life beyond 12 hours; Burst Mode maintains low noise during standby without compromising transient response during imaging bursts. | Use Scenario: Industrial PLC module using Xilinx Artix-7 FPGA requiring tightly regulated 1.0V core and 3.3V I/O supplies. IC Role / Device Role / Timing Role: Single-chip dual-buck solution replacing discrete regulators - RUN1/RUN2 enable FPGA configuration voltage sequencing (VCCINT before VCCO). Use Value: ±1.5% output accuracy and 64-cycle PGOOD blanking ensure reliable configuration and prevent FPGA lockup; 2.25MHz operation minimizes inductor footprint in space-constrained DIN-rail enclosure. |
| Automotive Body Control Module | Test & Measurement Sensor Interface |
Use Scenario: 12V automotive subsystem powering CAN transceiver (5V) and microcontroller (3.3V) with cold-crank tolerance. IC Role / Device Role / Timing Role: Input-tolerant dual buck handling 4.5V–15V transients - SVIN/PVIN architecture accommodates battery and alternator supply variations. Use Value: 15V absolute max rating and UVLO at 3.4V prevent malfunction during cranking (5.5V min); PGOOD flags enable MCU watchdog reset on rail collapse. | Use Scenario: Precision ADC evaluation board requiring ultra-low-noise 5V analog and clean 3.3V digital supplies from bench supply. IC Role / Device Role / Timing Role: Dual-output regulator with pulse-skipping mode selected via grounded MODE/SYNC pin to suppress switching noise near sensitive analog circuits. Use Value: <30mVP-P ripple in pulse-skipping mode meets SNR requirements for 16-bit SAR ADCs; independent soft-start prevents ground bounce during board power-up. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65270QDAPRQ1 | Higher 3A per channel, 2.2MHz, AEC-Q100 qualified; no Burst Mode - uses forced PWM only. | Automotive-grade with enhanced reliability testing; lacks light-load efficiency optimization. | Choose for ASIL-B systems requiring qualification; avoid where battery runtime is critical. |
| MAX20075ATPA/VY+ | 2.2MHz, 600mA/channel, 2.5µA IQ in shutdown; integrated spread-spectrum; no independent RUN pins. | Lower EMI profile due to spread-spectrum; single EN pin limits sequencing flexibility. | Prefer for noise-sensitive RF modules; not suitable when staggered channel enable is required. |
Compared with TPS65270QDAPRQ1 and MAX20075ATPA/VY+, the LTC3607IMSE#PBF uniquely balances ultra-low quiescent current (55µA), independent channel control, and selectable light-load modes - making it optimal for portable, battery-constrained dual-rail systems where thermal footprint and sequencing matter more than automotive qualification or spread-spectrum EMI reduction.
Availability
LTC3607IMSE#PBF is available at Aetrix Electronics and suitable for portable medical instrumentation, dual-rail FPGA power management, automotive body control modules, and test & measurement sensor interfaces requiring stable component supply across extended temperature ranges (–40°C to 125°C).
Supply support for LTC3607IMSE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its precision power management portfolio with rigorous characterization and long-term product support.
The LTC3607IMSE#PBF belongs to Linear's monolithic synchronous buck regulator family designed specifically for space-constrained, battery-powered applications demanding high efficiency at light loads and robust dual-rail sequencing capability.
FAQ
What is the maximum junction temperature and thermal resistance for LTC3607IMSE#PBF?
The LTC3607IMSE#PBF has a maximum junction temperature (TJMAX) of 125°C and thermal resistance θJA = 37°C/W, θJC = 10°C/W. The exposed pad (Pin 17) must be soldered to a PCB ground plane to achieve rated thermal performance. Derating is required above 85°C ambient when delivering full 600mA per channel continuously.
How does the MODE/SYNC pin affect LTC3607IMSE#PBF operation in Burst Mode versus pulse-skipping mode?
When the MODE/SYNC pin of the LTC3607IMSE#PBF is floating or biased ≥1V, Burst Mode activates - minimizing switching losses at light loads for peak efficiency (55µA IQ) but increasing output ripple (~30mVP-P). When grounded, pulse-skipping mode engages - reducing ripple further at the cost of slightly higher quiescent current. During external synchronization (1–4MHz), pulse-skipping is强制 enabled regardless of pin state.
Can LTC3607IMSE#PBF operate with different input voltages on PVIN1 and PVIN2?
Yes, the LTC3607IMSE#PBF supports independent input supplies on PVIN1 and PVIN2. SVIN must be connected to the higher of the two (directly or via external diodes) to power internal circuitry. This architecture enables flexible power routing - for example, PVIN1 from a primary battery and PVIN2 from a backup source - while maintaining regulation on both outputs.
What is the output voltage accuracy and feedback reference voltage of LTC3607IMSE#PBF?
The LTC3607IMSE#PBF features a 0.6V ±1.5% internal feedback reference voltage (VFB), resulting in ±1.5% output voltage accuracy over line, load, and temperature. This specification applies across the full 0.6V to VIN output range and is verified over –40°C to 125°C junction temperature, enabling precise dual-rail generation for sensitive analog and digital loads.
Does LTC3607IMSE#PBF support 100% duty-cycle operation, and under what conditions?
Yes, the LTC3607IMSE#PBF supports 100% duty-cycle operation in dropout: when VIN approaches VOUT, the internal P-channel MOSFET remains continuously on, allowing VOUT ≈ VIN − ILOAD × RDS(ON). This behavior extends usable battery life in dual Li-ion applications down to ~2.7V per cell, with no external components required to enable dropout mode.
LTC3607IMSE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-TFSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 15V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 15V
- Current - Output:
- 600mA
- Frequency - Switching:
- 2.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-MSOP-EP
LTC3607IMSE#PBF FAQ
1.How can I place an order for LTC3607IMSE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3607IMSE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3607IMSE#PBF reliable?
The price and inventory of LTC3607IMSE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3607IMSE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3607IMSE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3607IMSE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3607IMSE#PBF?
LTC3607IMSE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3607IMSE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3607IMSE#PBF?
For technical support, including LTC3607IMSE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3607IMSE#PBF requirements.
6.How does Aetrix verify that LTC3607IMSE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3607IMSE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3607IMSE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3607IMSE#PBF?
All LTC3607IMSE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3607IMSE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3607IMSE#PBF part is unused and in its original packaging.
Return procedure for LTC3607IMSE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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