Analog Devices Inc. LTC3610EWP
- Part No.:
- LTC3610EWP
- Manufacturer:
- Analog Devices Inc.
- Package:
- 64-PowerVFQFN
- Datasheet:
-
LTC3610EWP.pdf
- Description:
- IC REG BUCK ADJ 12A 64QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,964
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Product details
Overview
LTC3610EWP from Analog Devices (formerly Linear Technology) is a monolithic synchronous step-down DC/DC converter delivering up to 12A output current from a 4V–24V input, featuring valley current mode control, adjustable switching frequency via external resistor, ±1% 0.6V reference, and integrated N-channel MOSFETs in a 9mm × 9mm QFN-64 package. It enables point-of-load regulation in high-density server, telecom, and FPGA power supplies.
For engineers reviewing the LTC3610EWP datasheet, LTC3610EWP pinout, LTC3610EWP application, or LTC3610EWP equivalent, key selection criteria include its 12A continuous output capability, tON(MIN) ≤100ns for high step-down ratios, programmable current limit via VRNG, forced continuous/discontinuous mode control via FCB, and PGOOD monitoring with ±10% window.
Technical Context
The LTC3610EWP implements a constant on-time valley current mode architecture, where inductor valley current is sensed across internal MOSFET RDS(ON) and compared against an ITH-set threshold. Its one-shot timer generates tON proportional to ideal duty cycle, enabling near-constant frequency across VIN and VOUT variations when configured with ION and VON pins.
Fault protection includes foldback current limiting (reducing valley current to ~1/6 of max under short-circuit), output overvoltage shutdown (M1 off, M2 held on), undervoltage lockout (3.4V falling, 3.5V rising), and optional short-circuit latchoff timer via RUN/SS capacitor. Power sequencing is supported by programmable soft-start using external CSS.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 12A continuous - supports high-power ASIC/FPGA core rails without external power stages. |
| Input Voltage Range | 4V to 24V - compatible with 5V, 12V, and 24V intermediate bus architectures. |
| Feedback Reference | 0.600V ±1% - enables precise output voltage setting (e.g., 2.5V via 31.83k/10k divider) with minimal drift. |
| Min On-Time | ≤100ns - allows stable operation at high step-down ratios (e.g., 24V→2.5V) without pulse-skipping. |
| Switching Frequency | Adjustable via RON (e.g., 500kHz @ 12VIN/2.5VOUT) - balances efficiency vs. size of L/C components. |
| Current Limit Range | Programmable 7A–19A via VRNG (0.5V–0.7V) - enables safe derating for thermal margin or board layout constraints. |
| PGOOD Threshold | ±10% VFB window - provides reliable power-good assertion for system enable sequencing. |
| Shutdown IQ | 15µA - minimizes standby power loss in always-on subsystems. |
Pinout & Package
Package: 64-pin (9mm × 9mm) QFN with exposed thermal pad (WP suffix). Requires multi-point PGND connection and separate SGND star point for stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGND (Pins 1,2,3,56–65) | Power Ground Return | Low-impedance path for high di/dt switch node current; must connect directly to CIN(–) and CVCC(–). |
| SW (Pins 4–11,26,55,66) | Switch Node | Connects to inductor and bootstrap capacitor (–); swings from –0.3V to VIN + INTVCC; requires tight layout to minimize EMI. |
| PVIN (Pins 12–25,67) | Main Input Supply | Distributed VIN input pads reduce IR drop; decouple locally to PGND with ≥10µF low-ESR ceramic. |
| ITH (Pin 38) | Error Amplifier Output / Current Threshold | 0–2.4V analog control of valley current limit; also serves as compensation node for loop stability. |
| VRNG (Pin 37) | Current Limit Range Select | 0.5V–0.7V input sets max valley current (7A–19A); tie to ground for default 19A limit. |
| FCB (Pin 39) | Forced Continuous Mode Control | 0V = forced continuous (low-noise); INTVCC = discontinuous (high-efficiency light load); enables mode selection without re-layout. |
| RUN/SS (Pin 30) | Enable & Soft-Start Timing | 0.8V threshold shutdown; external CSS sets ramp time (~3s/µF) and overcurrent latchoff delay. |
| PGOOD (Pin 36) | Open-Drain Status Output | Asserts low when VFB deviates >±10% from 0.6V; drives pull-up to any logic supply ≤7V. |
Key Features
| Feature | Design Value |
|---|---|
| Valley Current Mode Control | Enables fast transient response and inherent cycle-by-cycle current limiting without external sense resistor. |
| True Monolithic Integration | Includes matched N-channel top/bottom MOSFETs (12mΩ/6.5mΩ), eliminating external diode and gate drivers. |
| Stable with Ceramic Output Capacitors | Eliminates need for high-ESR electrolytics; reduces board area and improves reliability over temperature. |
| Adjustable Minimum On-Time | Configurable via VON pin (0.7V–2.4V clamp) to maintain constant frequency during VOUT changes or load transients. |
| INTVCC/EXTVCC Dual-Supply Architecture | Accepts external 4.7–7V supply on EXTVCC to bypass internal LDO, improving efficiency and reducing thermal load. |
| Programmable Short-Circuit Response | Optional latchoff timer via RUN/SS capacitor prevents repeated fault cycling during sustained overloads. |
Applications
| Server Point-of-Load Regulation | Telecom Intermediate Bus Converter |
|---|---|
Use Scenario: Providing 2.5V/12A to high-performance CPU cores in 1U rack servers with strict thermal envelope. IC Role / Device Role / Timing Role: Primary buck regulator with valley current mode control ensuring sub-10µs load transient recovery and precise current limiting. Use Value: Delivers full 12A without external MOSFETs while maintaining <±1% output accuracy across line/load/temperature per JEDEC JESD22-A108. | Use Scenario: Converting 48V intermediate bus to 12V distribution rail in optical line cards with EMI-sensitive analog circuitry. IC Role / Device Role / Timing Role: High-efficiency synchronous buck controller operating in forced continuous mode (FCB = GND) to suppress switching noise. Use Value: Achieves >92% peak efficiency at 10A/12V with <10mVpp output ripple using 0.47µH inductor and 100µF ceramic output capacitance. |
| FPGA Core Voltage Supply | Industrial PLC I/O Module Power |
Use Scenario: Generating 1.2V/10A for Xilinx Kintex-7 FPGA banks requiring tight voltage tolerance and fast dynamic response. IC Role / Device Role / Timing Role: Adjustable-frequency buck converter (RON set for 600kHz) minimizing inductor size while meeting FPGA VCCINT ripple spec (<20mVpp). Use Value: tON(MIN) ≤100ns ensures stable regulation at 48V→1.2V conversion ratio without pulse-skipping artifacts. | Use Scenario: Powering isolated CAN transceivers and ADC front-ends in harsh industrial environments with wide ambient temperature range. IC Role / Device Role / Timing Role: Robust buck regulator with -40°C to 125°C guaranteed operation, UVLO (3.4V), and overvoltage protection (±10% PGOOD). Use Value: Maintains regulation during 24V battery brownouts and survives 28V transients per ISO 7637-2 Pulse 1/2a, verified per datasheet absolute maximum ratings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8770GQ-Z | 6A rated, 2.5V–18V input, fixed 500kHz fSW, no VRNG/FCB pins | Limited to mid-power applications; lacks programmable current limit and mode control | Select only if 6A output suffices and fixed frequency simplifies EMI filtering. |
| TPS546D24RQFT | 15A rated, 3.5V–18V input, PMBus interface, integrated telemetry | Requires digital control infrastructure; higher BOM cost and layout complexity | Choose when remote monitoring, margining, or adaptive voltage scaling are required. |
Compared with MP8770GQ-Z and TPS546D24RQFT, the LTC3610EWP uniquely combines 12A analog control, ultra-low tON(MIN), and flexible analog programming (VRNG/FCB/VON) for high-reliability, thermally constrained designs without digital overhead.
Availability
LTC3610EWP is available at Aetrix Electronics and suitable for server power delivery, telecom intermediate bus conversion, and FPGA core voltage regulation requiring stable component supply across extended temperature and long production lifecycles.
Supply support for LTC3610EWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.
The LTC3610EWP belongs to Linear's monolithic high-current buck converter product line, engineered for point-of-load regulation in space-constrained, thermally demanding systems where efficiency, transient response, and analog configurability are critical.
FAQ
What is the maximum recommended junction temperature for the LTC3610EWP?
The LTC3610EWP has a maximum junction temperature (TJMAX) of 125°C, as specified in the Absolute Maximum Ratings table. Operation beyond this limit risks permanent damage. Thermal design must ensure θJA ≤28°C/W (simulated per JESD51-7) and use the exposed thermal pad for heatsinking to maintain TJ ≤125°C under worst-case 12A load and 24VIN.
Can the LTC3610EWP operate with a 3.3V input supply?
No, the LTC3610EWP cannot operate with a 3.3V input. Its minimum operating input voltage is 4V, and undervoltage lockout activates below 3.4V (falling) with release at 3.5V (rising). Attempting to power the LTC3610EWP from 3.3V will result in immediate shutdown and no switching activity.
How is the switching frequency adjusted on the LTC3610EWP?
The LTC3610EWP switching frequency is adjusted by connecting a resistor (RON) from VIN to the ION pin (Pin 41). The nominal frequency is set by tON = (10pF × VVON) / IION, where IION ≈ (VIN − 0.7V)/RON. For example, a 100kΩ RON yields ~500kHz at 12VIN/2.5VOUT when VON is grounded. Refer to Figures 1a/1b in the datasheet for exact RON vs fSW curves.
Does the LTC3610EWP require an external bootstrap diode?
Yes, the LTC3610EWP requires an external Schottky diode (DB) connected from INTVCC to BOOST (Pin 29) to recharge the bootstrap capacitor (CB) during each switching cycle. This diode must have low forward voltage (<0.4V) and fast recovery (<30ns) to ensure reliable top MOSFET gate drive, especially at high duty cycles or elevated temperatures.
What is the function of the VRNG pin on the LTC3610EWP?
The VRNG pin (Pin 37) on the LTC3610EWP sets the maximum valley current limit, which determines the achievable output current. Applying 0.5V–0.7V via a resistive divider from INTVCC scales the current limit from 7A to 19A. Grounding VRNG defaults to 0.7V and ~19A limit. Floating VRNG is prohibited and may cause unpredictable current limiting behavior.
LTC3610EWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 64-PowerVFQFN
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4V
- Voltage - Input (Max):
- 24V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 24V
- Current - Output:
- 12A
- Frequency - Switching:
- -
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-QFN (9x9)
LTC3610EWP FAQ
1.How can I place an order for LTC3610EWP through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3610EWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3610EWP reliable?
The price and inventory of LTC3610EWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3610EWP is usually 5 days.
3.What payment methods are accepted for LTC3610EWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3610EWP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3610EWP?
LTC3610EWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3610EWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3610EWP?
For technical support, including LTC3610EWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3610EWP requirements.
6.How does Aetrix verify that LTC3610EWP is sourced from the original manufacturer or authorized distributors?
All LTC3610EWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3610EWP meets industry standards.
7.What is the process for return or replacement of LTC3610EWP?
All LTC3610EWP units undergo pre-shipment inspection (PSI). If there is an issue with LTC3610EWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3610EWP part is unused and in its original packaging.
Return procedure for LTC3610EWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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