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Analog Devices Inc. LTC3615EFE#PBF
- Part No.:
- LTC3615EFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3615EFE#PBF.pdf
- Description:
- IC REG BUCK ADJ 3A DL 24TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:615
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Product details
Overview
LTC3615EFE#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, synchronous step-down DC/DC converter IC delivering up to 3A per channel with current-mode control, 2.25V–5.5V input range, and externally programmable switching frequency up to 4MHz. It supports 0°/90°/180° inter-channel phase shift, Burst Mode operation (130µA IQ), and 100% duty cycle for low-dropout battery operation in portable computing and DDR memory supplies.
For engineers reviewing the LTC3615EFE#PBF datasheet, LTC3615EFE#PBF pinout, LTC3615EFE#PBF application, or LTC3615EFE#PBF equivalent, key selection criteria include dual 3A output capability, phase-shifted operation to reduce input ripple, selectable operating modes (Burst/Pulse-Skipping/Forced Continuous), internal/external compensation flexibility, and thermal performance in the 24-pin TSSOP package.
Technical Context
The LTC3615EFE#PBF implements a dual, monolithic current-mode architecture with shared reference and clock circuits to ensure tight channel-to-channel matching. Each channel features independent P-channel high-side and N-channel synchronous rectifier switches, with peak-current control governed by the ITH pin voltage (0.45V–1.05V range).
Phase shift between SW1 and SW2 is selected via the PHASE pin (0°/90°/180°), while MODE pin programming determines operating mode-Burst Mode (IQ = 130µA), Pulse-Skipping, or Forced Continuous-with distinct ITH threshold behaviors and ripple trade-offs. Slew rate at SW pins is adjustable via SRLIM resistor, and DDR termination mode is enabled when SRLIM = SVIN.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.25V to 5.5V - enables direct single-cell Li-ion battery operation without pre-regulation. |
| Output Current per Channel | Up to 3A - supports high-current point-of-load regulation for processors and memory rails. |
| Switching Frequency | 400kHz to 4MHz - allows use of compact 0.47µH inductors and minimizes EMI with external synchronization. |
| Quiescent Current (Burst Mode) | 130µA - extends battery runtime in standby or light-load states without compromising regulation. |
| Feedback Reference Voltage | 0.6V ±1% - enables precise output regulation down to 0.6V with standard resistor dividers. |
| Phase Shift Options | 0°, 90°, or 180° - reduces input capacitor RMS current and output voltage ripple in dual- or parallel-output configurations. |
| Shutdown Current | ≤1µA - ensures near-zero power draw during system sleep or disable states. |
| Package Thermal Resistance (θJA) | 33°C/W - validated for thermally demanding industrial and embedded applications in TSSOP-24. |
Pinout & Package
The LTC3615EFE#PBF is housed in a 24-lead plastic eTSSOP package (FE) with exposed PGND pad (Pin 25) requiring PCB soldering for thermal and electrical integrity. Pin pitch is 0.65mm; package dimensions are 7.8mm × 4.4mm × 1.1mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PHASE (Pin 1) | Phase shift configuration input | Selects 0° (SGND), 90° (SVIN/2), or 180° (SVIN) inter-channel timing for ripple optimization. |
| VFB1/VFB2 (Pins 2,5) | Channel 1/2 feedback inputs | Monitor output voltage via resistive divider; referenced to 0.6V internal bandgap for ±1% accuracy. |
| ITH1/ITH2 (Pins 3,6) | Error amplifier compensation nodes | Set peak inductor current; tie to SVIN to enable Active Voltage Positioning (AVP) with internal compensation. |
| RUN1/RUN2 (Pins 11,10) | Channel enable inputs | Logic-high (>1V) enables respective channel; both low disables entire device (<1µA shutdown current). |
| RT/SYNC (Pin 12) | Oscillator control | Resistor-to-GND sets frequency (400kHz–4MHz); driven by external clock for synchronization up to 4MHz. |
| MODE (Pin 24) | Operating mode selector | SGND = Burst Mode (130µA IQ); SVIN = Pulse-Skipping; 1.1V–0.58×SVIN = Forced Continuous (required for sinking). |
| SRLIM (Pin 14) | Slew rate and DDR mode control | Resistor-to-SGND adjusts SW edge rate; tied to SVIN enables DDR termination with ±1.5A sink capability. |
| PGOOD1/PGOOD2 (Pins 15,13) | Open-drain power-good indicators | Pull low if FBx deviates >±7.5% from setpoint, or if RUNx is inactive or SVIN undervoltage occurs. |
| PGND (Pin 25, Exposed Pad) | Power ground return | Common source node for both N-channel MOSFETs; must be soldered to PCB plane for thermal and EMI performance. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 3A synchronous buck channels | Eliminates external catch diodes, improves efficiency up to 94%, and saves board space versus discrete solutions. |
| Programmable slew rate at SW pins | Reduces EMI emissions by controlling dV/dt on switching nodes without sacrificing transient response. |
| 100% duty cycle operation | Enables dropout regulation down to VOUT ≈ VIN − (RDS(ON)_top × IOUT), extending runtime in battery-depleted conditions. |
| Accurate start-up tracking | TRACK/SS pins allow coordinated ramp-up with other rails (e.g., core and I/O voltages), preventing latch-up or sequencing violations. |
| DDR memory termination mode | When SRLIM = SVIN, supports ±1.5A bidirectional current for DDR2/DDR3 VTT termination with AVP-compatible regulation. |
| Internal or external compensation | ITH pin connection to SGND enables external Type II/III compensation; tying to SVIN activates internal AVP loop for dynamic load-line control. |
Applications
| Point-of-Load Regulation | Portable Computing Power |
|---|---|
Use Scenario: Regulating CPU core voltage (1.0–1.3V) and GPU I/O rail (1.8V) from a shared 3.3V intermediate bus in ultrabooks. IC Role / Device Role / Timing Role: Dual-channel synchronous buck controller providing independent, phase-shifted 3A outputs with fast transient response and soft-start coordination. Use Value: Reduces input capacitance by 40% via 180° phase shift, maintains <±1% output accuracy across load steps, and achieves 92% efficiency at 2A per rail. | Use Scenario: Powering SoC subsystems (ARM core, DDR3 memory, display interface) in handheld medical devices with single-cell Li-ion battery input. IC Role / Device Role / Timing Role: Primary PMIC delivering 1.2V/3A (core), 1.5V/3A (DDR), and tracking 3.3V/1A (peripherals) with Burst Mode for <150µA standby IQ. Use Value: Extends battery life by 3.2 hours in sleep mode; 100% duty cycle sustains 1.2V output until VIN drops to 1.25V. |
| DDR Memory Termination | Distributed Industrial Power |
Use Scenario: Providing matched ±1.5A VTT termination for DDR3L memory in network switch line cards with strict JEDEC compliance. IC Role / Device Role / Timing Role: Configured in DDR mode (SRLIM = SVIN) with AVP to maintain VTT = VDDQ/2 ±15mV under dynamic load transients. Use Value: Eliminates need for external op-amps and discrete FETs; meets DDR3L VTT ripple spec (<30mVpp) with 1.5µs recovery from 1.5A load step. | Use Scenario: Generating isolated 5V/3A and 3.3V/3A rails from a 24V industrial bus in PLC I/O modules with high EMI immunity requirements. IC Role / Device Role / Timing Role: Dual buck controller operating in Forced Continuous Mode with synchronized 2.25MHz switching and 180° phase shift to minimize conducted noise. Use Value: Achieves <15mVpp output ripple without additional LC filtering; passes CISPR-22 Class B with 6dB margin at 150kHz–30MHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS543B20RTWR | Single-channel 3A buck with integrated FETs; no dual-channel or phase-shift capability; higher IQ (250µA in Eco-mode). | Requires two units for dual-rail designs; lacks DDR mode and tracking; better suited for cost-sensitive, non-phase-critical applications. | Choose when needing only one regulated rail or when footprint constraints favor QFN over TSSOP. |
| ISL85415IRZ-T7A | Dual 3A buck with fixed 2.2MHz frequency; no programmable phase shift or external sync; lower max input (20V vs 5.5V). | Not suitable for Li-ion battery input; lacks Burst Mode (IQ = 420µA); no DDR termination or AVP support. | Prefer for wide-input industrial supplies where 20V tolerance and AEC-Q200 qualification are required. |
Compared with TPS543B20RTWR and ISL85415IRZ-T7A, the LTC3615EFE#PBF uniquely delivers dual 3A outputs with user-selectable phase shift, sub-130µA Burst Mode IQ, and DDR-specific functionality-all in a thermally robust TSSOP package optimized for battery-powered precision systems.
Availability
LTC3615EFE#PBF is available at Aetrix Electronics and suitable for portable computing power, DDR memory termination, and distributed industrial power applications requiring stable component supply, long-term lifecycle support, and guaranteed parametric performance across –40°C to 125°C.
Supply support for LTC3615EFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.
The LTC3615EFE#PBF belongs to Linear's µModule®-adjacent high-efficiency DC/DC regulator family, designed specifically for space-constrained, battery-sensitive applications demanding dual-rail coordination, ultra-low quiescent current, and robust transient performance.
FAQ
What is the maximum switching frequency supported by the LTC3615EFE#PBF?
The LTC3615EFE#PBF supports an externally programmable switching frequency from 400kHz to 4MHz. When RT/SYNC is tied to SVIN, it defaults to 2.25MHz. Frequencies up to 4MHz are achievable using either an external resistor or an external clock signal applied to the RT/SYNC pin, enabling compact magnetics and reduced output ripple in the LTC3615EFE#PBF design.
Does the LTC3615EFE#PBF support DDR memory termination?
Yes, the LTC3615EFE#PBF supports DDR memory termination when the SRLIM pin is tied to SVIN. In this configuration, it provides ±1.5A bidirectional current capability with Active Voltage Positioning (AVP) for precise VTT regulation at VDDQ/2. This DDR mode is explicitly documented in the LTC3615EFE#PBF datasheet and requires no external components beyond standard output capacitors.
What are the operating temperature limits for the LTC3615EFE#PBF?
The LTC3615EFE#PBF is rated for operation from –40°C to +125°C junction temperature. Its 24-pin eTSSOP package has a θJA of 33°C/W, and the device includes overtemperature protection that activates above 150°C. The "E" grade designation in LTC3615EFE#PBF confirms its suitability for extended commercial and industrial environments meeting this full temperature range.
How does phase shift between channels reduce input ripple in the LTC3615EFE#PBF?
The LTC3615EFE#PBF allows 0°, 90°, or 180° phase shift between SW1 and SW2 via the PHASE pin. At 180°, input current ripple from each channel cancels significantly, reducing RMS input capacitor current by up to 30% compared to in-phase operation. This directly lowers required input capacitance and improves reliability in the LTC3615EFE#PBF power stage.
Can the LTC3615EFE#PBF operate with a single Li-ion cell input?
Yes, the LTC3615EFE#PBF operates from 2.25V to 5.5V, making it fully compatible with single-cell Li-ion batteries (2.7V–4.2V nominal, 2.5V–4.35V operational range). Its 100% duty cycle capability ensures regulation down to VOUT even as the battery discharges below the output voltage, extending usable runtime in portable systems using the LTC3615EFE#PBF.
LTC3615EFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.25V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 3A
- Frequency - Switching:
- 400kHz ~ 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
LTC3615EFE#PBF FAQ
1.How can I place an order for LTC3615EFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3615EFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3615EFE#PBF reliable?
The price and inventory of LTC3615EFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3615EFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3615EFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3615EFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3615EFE#PBF?
LTC3615EFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3615EFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3615EFE#PBF?
For technical support, including LTC3615EFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3615EFE#PBF requirements.
6.How does Aetrix verify that LTC3615EFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3615EFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3615EFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3615EFE#PBF?
All LTC3615EFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3615EFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3615EFE#PBF part is unused and in its original packaging.
Return procedure for LTC3615EFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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