Analog Devices Inc. LTC3615HFE-1#TRPBF
- Part No.:
- LTC3615HFE-1#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3615HFE-1#TRPBF.pdf
- Description:
- IC REG BUCK ADJ 3A DL 24TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,604
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3615HFE-1#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel, 3A synchronous step-down DC/DC converter in thermally enhanced 24-pin TSSOP package, operating from 2.25V to 5.5V input and delivering two independent 3A outputs with ±1% output voltage accuracy down to 0.6V. It supports 140°/180° programmable inter-channel phase shift and 4MHz max switching frequency for compact Li-ion–powered portable systems.
For engineers reviewing the LTC3615HFE-1#TRPBF datasheet, LTC3615HFE-1#TRPBF pinout, LTC3615HFE-1#TRPBF application, or LTC3615HFE-1#TRPBF equivalent, key selection criteria include dual 3A output capability with selectable phase shift, low-noise Burst Mode operation (130µA IQ), 100% duty cycle dropout support, and DDR memory termination compatibility via SRLIM pin configuration.
Technical Context
The LTC3615HFE-1#TRPBF implements current-mode, constant-frequency control with independent error amplifiers per channel and shared oscillator/phase selector logic. Its dual-channel architecture enables synchronized or interleaved operation-140°/180° phase shift minimizes input ripple in dual 3A mode or enables single 6A output with reduced output capacitor stress.
It features programmable slew rate limiting (via SRLIM pin), external synchronization up to 4MHz, internal/external compensation (ITH pins), and four selectable operating modes (Burst, Pulse-Skipping, Forced Continuous, DDR) controlled by the MODE pin. The device integrates P-channel high-side and N-channel synchronous rectifier switches with 75mΩ/55mΩ typical RDS(ON).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.25V to 5.5V - supports single-cell Li-ion battery operation across full discharge curve. |
| Output Current per Channel | 3A continuous - enables dual point-of-load regulation for processors and memory subsystems. |
| Switching Frequency | Up to 4MHz - allows use of sub-1µH inductors and reduces solution footprint. |
| Phase Shift Options | 140° or 180° - reduces input RMS current and output voltage ripple in dual-output configurations. |
| Quiescent Current | 130µA in Burst Mode - extends battery life in always-on portable applications. |
| Output Voltage Accuracy | ±1% over temperature - ensures stable core voltage for sensitive digital loads like DDR memory. |
| Shutdown Current | ≤1µA - meets ultra-low-power system standby requirements. |
Pinout & Package
Package: 24-lead plastic eTSSOP (FE package), –40°C to +150°C operating junction temperature, exposed PGND pad (Pin 25) requiring PCB soldering for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PHASE (Pin 1) | Phase shift selection | Configures 140° (SGND) or 180° (SVIN) inter-channel timing for ripple reduction. |
| VFB1/VFB2 (Pins 2,5) | Feedback input | Monitors regulated output voltage via external resistor divider; sets 0.6V reference point. |
| ITH1/ITH2 (Pins 3,6) | Error amplifier compensation | Accepts RC network for loop stability; tied to SVIN enables Active Voltage Positioning (AVP). |
| RUN1/RUN2 (Pins 11,10) | Channel enable | Logic-high (>1V) enables respective channel; both low disables entire IC with ≤1µA shutdown current. |
| RT/SYNC (Pin 12) | Oscillator control | Sets frequency via resistor-to-GND (400kHz–4MHz), accepts external clock (0.4–4MHz), or defaults to 2.25MHz when tied to SVIN. |
| SRLIM (Pin 14) | Slew rate & DDR mode control | Adjusts SW1/SW2 edge rates; tied to SVIN enables DDR IOUT = ±1.5A sink/source capability. |
| MODE (Pin 24) | Operating mode selection | Selects Burst (SGND), Pulse-Skipping (SVIN), Forced Continuous (1.1V–0.58×SVIN), or external-clamp Burst (0.5–0.8V). |
| PGOOD1/PGOOD2 (Pins 15,13) | Power-good status | Open-drain outputs indicate ±7.5% output regulation window; pulled low during fault or disable. |
| PGND (Pin 25) | Power ground | Exposed thermal pad connected to sources of internal N-MOSFETs; must be soldered to PCB for thermal management. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 3A synchronous buck topology | Eliminates external catch diodes, improves efficiency up to 94%, and saves board space. |
| 140°/180° programmable phase shift | Reduces input capacitor RMS current by up to 40% versus 0° operation in dual-output mode. |
| Burst Mode with 130µA IQ | Maintains regulation at light loads while minimizing switching losses for extended battery runtime. |
| 100% duty cycle low-dropout operation | Extends usable battery life by sustaining output as input voltage falls near VOUT. |
| DDR memory termination support | Enables ±1.5A sourcing/sinking via SRLIM = SVIN, meeting JEDEC DDR3/DDR4 termination requirements. |
| Internal/external soft-start & tracking | Prevents inrush current and enables coordinated power-up with other rails using TRACK/SS pins. |
Applications
| Point-of-Load Regulation | Portable Computing Power |
|---|---|
Use Scenario: Regulating core voltage for dual-core ARM processors in handheld tablets with tight thermal constraints. IC Role / Device Role / Timing Role: Dual-channel synchronous buck controller providing independent 1.2V/1.8V outputs with interleaved 180° phase to minimize input ripple. Use Value: Enables compact, high-efficiency power delivery with <1% output error across load transients and temperature. | Use Scenario: Powering SoC and DDR3 memory subsystems in ultrabooks with single-cell Li-ion battery input. IC Role / Device Role / Timing Role: Primary DC/DC regulator delivering 3A @ 1.05V (SoC) and 3A @ 1.5V (DDR termination) with 140° phase alignment. Use Value: Supports DDR3 sink/source capability and maintains regulation down to 2.25V input, extending runtime at end-of-discharge. |
| DDR Memory Termination | Distributed Power Architecture |
Use Scenario: Providing bidirectional ±1.5A termination current for DDR3L memory on embedded industrial controllers. IC Role / Device Role / Timing Role: Configured in DDR mode (SRLIM = SVIN) with forced continuous operation to sustain sink current during memory write cycles. Use Value: Eliminates need for discrete termination ICs and ensures JEDEC-compliant VTT rail stability under dynamic load. | Use Scenario: Local regulation of FPGA I/O banks and auxiliary rails in modular test equipment with distributed 3.3V/5V backplane supplies. IC Role / Device Role / Timing Role: Dual-output buck converter generating isolated 1.8V and 2.5V rails from common PVIN inputs with independent RUN pin control. Use Value: Reduces system-level EMI through programmable slew rate limiting and phase-shifted switching. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3615HUF-1#TRPBF | Same electrical specs but 4mm × 4mm QFN-24 package with lower θJA (37°C/W vs 33°C/W) and different pinout layout. | Preferred for space-constrained layouts where thermal vias under exposed pad improve heat dissipation. | Select when PCB area is limited and thermal performance via copper pour is prioritized over TSSOP reworkability. |
| TPS543320RHLT | Single 3A buck with integrated FETs; no dual-channel or phase-shift capability; 4.5–18V input range. | Requires two units for dual-rail designs; lacks DDR sink capability and Burst Mode IQ optimization for Li-ion. | Consider only for higher-input-voltage systems where dual-channel integration is not required. |
Compared with LTC3615HUF-1#TRPBF, the LTC3615HFE-1#TRPBF offers identical functionality in a thermally robust TSSOP package with easier visual inspection and rework, while TPS543320RHLT provides higher input voltage tolerance but sacrifices dual-rail integration and low-IQ battery optimization.
Availability
LTC3615HFE-1#TRPBF is available at Aetrix Electronics and suitable for portable computing power, DDR memory termination, and distributed point-of-load applications requiring stable component supply across extended temperature ranges (–40°C to +150°C).
Supply support for LTC3615HFE-1#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its precision analog and power management portfolio with rigorous automotive and industrial qualification standards.
The LTC3615 product line delivers high-efficiency, dual-channel DC/DC conversion for battery-powered and thermally demanding applications, emphasizing low quiescent current, flexible phase control, and DDR-compatible bidirectional current capability.
FAQ
What is the maximum switching frequency supported by LTC3615HFE-1#TRPBF?
The LTC3615HFE-1#TRPBF supports an adjustable switching frequency up to 4MHz via the RT/SYNC pin-either through an external resistor to ground, an applied clock signal (0.4–4MHz), or internal 2.25MHz oscillator when RT/SYNC is tied to SVIN. This enables use of small, low-profile inductors in space-constrained designs.
How does LTC3615HFE-1#TRPBF achieve DDR memory termination capability?
The LTC3615HFE-1#TRPBF enables DDR termination by tying the SRLIM pin to SVIN, which activates DDR mode and configures the device for ±1.5A sourcing/sinking current. This meets JEDEC DDR3/DDR4 VTT rail requirements without external components, provided forced continuous mode is selected via the MODE pin.
What is the significance of the "H" grade in LTC3615HFE-1#TRPBF?
"H" denotes the high-temperature grade: the LTC3615HFE-1#TRPBF is guaranteed to meet all electrical specifications over an operating junction temperature range of –40°C to +150°C. This makes it suitable for under-hood automotive modules, industrial motor drives, and other thermally harsh environments.
Can LTC3615HFE-1#TRPBF operate with only one channel enabled?
Yes. The LTC3615HFE-1#TRPBF supports independent channel control: pulling RUN1 high enables Channel 1 while keeping RUN2 low disables Channel 2, and vice versa. Both channels can be operated simultaneously, individually, or disabled-each with its own feedback, compensation, and soft-start configuration.
What thermal considerations apply to the exposed pad (Pin 25) of LTC3615HFE-1#TRPBF?
The exposed PGND pad (Pin 25) of the LTC3615HFE-1#TRPBF must be soldered to a thermally robust PCB copper area with multiple thermal vias to an internal ground plane. With θJA = 33°C/W, proper pad soldering is essential to maintain TJ ≤ 150°C under full 3A/channel load; insufficient thermal relief will cause premature thermal shutdown or reliability degradation.
LTC3615HFE-1#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.25V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 3A
- Frequency - Switching:
- 400kHz ~ 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
LTC3615HFE-1#TRPBF FAQ
1.How can I place an order for LTC3615HFE-1#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3615HFE-1#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3615HFE-1#TRPBF reliable?
The price and inventory of LTC3615HFE-1#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3615HFE-1#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3615HFE-1#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3615HFE-1#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3615HFE-1#TRPBF?
LTC3615HFE-1#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3615HFE-1#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3615HFE-1#TRPBF?
For technical support, including LTC3615HFE-1#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3615HFE-1#TRPBF requirements.
6.How does Aetrix verify that LTC3615HFE-1#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3615HFE-1#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3615HFE-1#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3615HFE-1#TRPBF?
All LTC3615HFE-1#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3615HFE-1#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3615HFE-1#TRPBF part is unused and in its original packaging.
Return procedure for LTC3615HFE-1#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3615HFE-1#TRPBF Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

