Analog Devices Inc. LTC3615MPFE#PBF
- Part No.:
- LTC3615MPFE#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3615MPFE#PBF.pdf
- Description:
- IC REG BUCK ADJ 3A DL 24TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,954
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Product details
Overview
LTC3615MPFE#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, 3A synchronous step-down DC/DC converter in thermally enhanced 24-pin TSSOP package. It operates from 2.25V to 5.5V input, delivers up to 3A per channel with ±1% output voltage accuracy down to 0.6V, and supports 0°/90°/180° inter-channel phase shift for ripple reduction - ideal for point-of-load power in battery-powered portable computing systems.
For engineers reviewing the LTC3615MPFE#PBF datasheet, LTC3615MPFE#PBF pinout, LTC3615MPFE#PBF application, or LTC3615MPFE#PBF equivalent, key selection criteria include its –55°C to 150°C operating junction temperature range, programmable slew rate limiting for EMI control, selectable Burst/Pulse-Skipping/Forced Continuous modes, internal or external compensation, and DDR memory termination capability.
Technical Context
The LTC3615MPFE#PBF implements current-mode, constant-frequency control with independent PVIN1/PVIN2 inputs and shared SVIN-supplied control logic. Its dual channels feature matched timing, synchronized switching up to 4MHz, and configurable phase relationships (0°/90°/180°) via the PHASE pin - enabling optimized input current ripple suppression in dual 3A or single 6A configurations.
It integrates high-side P-channel and low-side N-channel synchronous MOSFETs (RDS(ON) = 75 mΩ / 55 mΩ at 3.3V), supports active voltage positioning (AVP) when ITH is tied to SVIN, and provides accurate tracking startup via TRACK/SS pins - all while maintaining 130 µA quiescent current in Burst Mode and ≤1 µA shutdown current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.25V to 5.5V - enables direct use with single-cell Li-ion batteries without pre-regulation. |
| Output Current per Channel | 3A continuous - supports high-current point-of-load rails for processors or DDR memory. |
| Output Voltage Accuracy | ±1% over –55°C to 150°C - ensures stable regulation across extended industrial/military temperature ranges. |
| Switching Frequency | Up to 4MHz - allows use of compact 0.47µH inductors and reduces solution footprint. |
| Quiescent Current | 130µA in Burst Mode - extends battery runtime in always-on portable devices. |
| Shutdown Current | ≤1µA - minimizes system standby power loss. |
| Phase Shift Options | 0°, 90°, or 180° between channels - reduces input capacitor RMS current and output voltage ripple. |
Pinout & Package
Package: 24-lead plastic eTSSOP (FE), 4.4mm × 6.6mm body, exposed PGND pad (Pin 25) requiring PCB soldering for thermal and electrical performance. θJA = 33°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PHASE (Pin 1) | Phase shift configuration input | Selects 0° (SGND), 90° (SVIN/2), or 180° (SVIN) inter-channel timing for ripple optimization. |
| VFB1/VFB2 (Pins 2,5) | Feedback voltage input | Monitors output voltage via resistive divider; sets regulation point with 0.6V internal reference. |
| ITH1/ITH2 (Pins 3,6) | Error amplifier compensation node | Accepts external RC network or ties to SVIN to enable AVP mode and internal compensation. |
| RUN1/RUN2 (Pins 11,10) | Channel enable control | Logic-high (>1V) enables respective channel; both low disables entire device (<1µA IQ). |
| RT/SYNC (Pin 12) | Oscillator frequency control | Resistor-to-GND sets fSW (400kHz–4MHz), external clock synchronizes, or tie to SVIN for 2.25MHz default. |
| SRLIM (Pin 14) | Slew rate programming | Adjusts SW1/SW2 edge rates via resistor to SGND; tie to SVIN enables DDR sinking mode. |
| PGND (Pin 25) | Power ground return | Exposed thermal pad - must be soldered to PCB plane for thermal dissipation and low-impedance return path. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 3A synchronous buck topology | Eliminates external catch diodes, improves efficiency up to 94%, and saves board space. |
| Programmable slew rate limiting | Reduces EMI emissions by controlling SW1/SW2 edge rates without sacrificing transient response. |
| 100% duty cycle operation | Enables ultra-low dropout regulation - critical for maintaining output as battery voltage declines. |
| DDR memory termination support | Configurable sinking capability (±1.5A) via SRLIM = SVIN and MODE settings for DDR2/3 applications. |
| Accurate start-up tracking | TRACK/SS pins allow coordinated ramp-up with other supplies - prevents sequencing violations in multi-rail systems. |
Applications
| Point-of-Load Regulation | Distributed Power Systems |
|---|---|
Use Scenario: Powering FPGA core voltage (1.0V/2.5A) and I/O bank (1.8V/3A) on a compact embedded board. IC Role / Device Role / Timing Role: Dual-channel buck regulator delivering tightly regulated, low-noise, phase-shifted outputs with precise tracking startup. Use Value: Eliminates need for two discrete converters; 0.6V minimum VOUT and ±1% accuracy ensure compliance with modern FPGA VCCINT tolerances. | Use Scenario: Providing isolated 1.2V and 3.3V rails from a common 3.3V intermediate bus in telecom line cards. IC Role / Device Role / Timing Role: High-efficiency dual buck converter with independent PVIN inputs and synchronized switching to minimize bus capacitance stress. Use Value: 4MHz max fSW enables small 0.47µH inductors; 130µA Burst Mode IQ reduces no-load losses in standby states. |
| Portable Computing | DDR Memory Termination |
Use Scenario: Supplying CPU core (1.1V/3A) and GPU (1.35V/3A) in a fanless tablet design with strict thermal limits. IC Role / Device Role / Timing Role: Thermally robust dual buck IC in –55°C to 150°C rated TSSOP package, supporting 180° phase shift to reduce input ripple. Use Value: Exposed PGND pad and 33°C/W θJA enable reliable operation at full load without heatsinking; 2.25V min VIN supports deep battery discharge. | Use Scenario: Implementing VTT termination for DDR3L memory with bidirectional current capability. IC Role / Device Role / Timing Role: Configurable buck converter operating in forced continuous mode with SRLIM = SVIN to enable ±1.5A sinking/source. Use Value: Integrated DDR mode eliminates external current-sink FETs; ±1% VREF ensures precise VTT = VDDQ/2 matching required by JEDEC specs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3615EFE#PBF | Same silicon, rated for –40°C to 125°C junction temperature (vs. –55°C to 150°C for MP grade) | Not qualified for extended military or aerospace environments requiring –55°C cold start or >125°C sustained operation | Select LTC3615MPFE#PBF when full –55°C to 150°C operation with production test coverage is mandatory. |
| LTC3615MPUF#PBF | Identical specifications but in 4mm × 4mm QFN-24 package (θJA = 37°C/W vs. 33°C/W for TSSOP) | Higher power density but slightly reduced thermal performance; requires different PCB layout and reflow profile | Choose LTC3615MPFE#PBF for better thermal management in high-ambient or high-reliability applications where TSSOP's larger pad area is advantageous. |
Compared with LTC3615EFE#PBF, the LTC3615MPFE#PBF guarantees full –55°C to 150°C operation with production testing, while versus LTC3615MPUF#PBF it offers lower thermal resistance and proven reliability in legacy TSSOP-based industrial designs - making it optimal for ruggedized portable and embedded systems demanding extended temperature validation.
Availability
LTC3615MPFE#PBF is available at Aetrix Electronics and suitable for point-of-load regulation, distributed power systems, and DDR memory termination requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for LTC3615MPFE#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full technical and manufacturing continuity for all Linear power products.
The LTC3615MPFE#PBF belongs to Linear's high-performance monolithic DC/DC converter family, designed specifically for compact, efficient, and thermally robust power delivery in portable, industrial, and communications equipment.
FAQ
What is the guaranteed operating junction temperature range for the LTC3615MPFE#PBF?
The LTC3615MPFE#PBF is fully tested and guaranteed to meet all specifications across –55°C to 150°C junction temperature. This extended range exceeds commercial and industrial grades and supports deployment in harsh environments such as avionics, downhole tools, and military handhelds where cold-start and high-temperature reliability are critical. The MP grade includes production test coverage at both extremes.
How does the PHASE pin configure inter-channel timing in the LTC3615MPFE#PBF?
The PHASE pin on the LTC3615MPFE#PBF selects output phase relationship: tying to SGND yields 0°, to SVIN/2 yields 90°, and to SVIN yields 180° between SW1 and SW2. This configuration directly controls input capacitor RMS current and output voltage ripple - 180° phase shift is commonly used to halve input ripple in dual 3A configurations, reducing required bulk capacitance by up to 50%.
Can the LTC3615MPFE#PBF support DDR memory termination with sinking current?
Yes - the LTC3615MPFE#PBF supports DDR termination by setting SRLIM = SVIN and configuring MODE for forced continuous operation. This enables ±1.5A bidirectional current capability on either channel, meeting JEDEC VTT requirements for DDR2/DDR3. The internal synchronous switches and AVP mode ensure fast transient response and precise VTT = VDDQ/2 tracking without external components.
What are the key differences between Burst Mode, Pulse-Skipping, and Forced Continuous modes on the LTC3615MPFE#PBF?
The LTC3615MPFE#PBF offers three operating modes via the MODE pin: Burst Mode (MODE = SGND) minimizes IQ to 130µA at light loads by disabling circuitry between bursts; Pulse-Skipping (MODE = SVIN) skips cycles but keeps internal circuits active for lower ripple; Forced Continuous (MODE = 1.1V to 0.58×SVIN) sustains switching at all loads - required for sinking current and DDR termination. Each mode trades off efficiency, ripple, and functionality.
Does the LTC3615MPFE#PBF require external compensation, or can it operate with internal compensation?
The LTC3615MPFE#PBF supports both configurations: tying ITH1/ITH2 to SVIN enables internal compensation and Active Voltage Positioning (AVP) mode, simplifying design for standard applications; connecting an RC network from ITH to SGND allows full external loop tuning for demanding transient or noise-sensitive loads. Internal compensation is validated for typical 0.47µH/47µF output filters, while external compensation provides flexibility for custom output impedances.
LTC3615MPFE#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.25V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 3A
- Frequency - Switching:
- 400kHz ~ 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
LTC3615MPFE#PBF FAQ
1.How can I place an order for LTC3615MPFE#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3615MPFE#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3615MPFE#PBF reliable?
The price and inventory of LTC3615MPFE#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3615MPFE#PBF is usually 5 days.
3.What payment methods are accepted for LTC3615MPFE#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3615MPFE#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3615MPFE#PBF?
LTC3615MPFE#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3615MPFE#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3615MPFE#PBF?
For technical support, including LTC3615MPFE#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3615MPFE#PBF requirements.
6.How does Aetrix verify that LTC3615MPFE#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3615MPFE#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3615MPFE#PBF meets industry standards.
7.What is the process for return or replacement of LTC3615MPFE#PBF?
All LTC3615MPFE#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3615MPFE#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3615MPFE#PBF part is unused and in its original packaging.
Return procedure for LTC3615MPFE#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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