Analog Devices Inc. LTC3615MPUF-1#PBF
- Part No.:
- LTC3615MPUF-1#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LTC3615MPUF-1#PBF.pdf
- Description:
- IC REG BUCK ADJ 3A DL 24QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3615MPUF-1#PBF from Analog Devices (formerly Linear Technology) is a dual-channel, synchronous step-down DC/DC converter IC with 3A per channel output capability, operating up to 4MHz switching frequency and supporting 140°/180° inter-channel phase shift. It delivers ±1% output voltage accuracy down to 0.6V, features 100% duty cycle low-dropout operation, and draws only 130µA quiescent current in Burst Mode-ideal for high-efficiency point-of-load regulation in battery-powered DDR memory systems.
For engineers reviewing the LTC3615MPUF-1#PBF datasheet, LTC3615MPUF-1#PBF pinout, LTC3615MPUF-1#PBF application, or LTC3615MPUF-1#PBF equivalent, key selection considerations include its –55°C to 150°C extended temperature grade, QFN-24 (4mm × 4mm) thermally enhanced package, selectable operating modes (Burst/Pulse-Skipping/Forced Continuous), and DDR memory termination support via SRLIM-driven AVP mode.
Technical Context
The LTC3615MPUF-1#PBF implements a current-mode, constant-frequency control architecture with independent error amplifiers (ITH1/ITH2), internal slope compensation, and shared oscillator/phase selector logic. Its dual channels are synchronized with fixed 140° or 180° phase offset-enabling reduced input ripple in dual 3A configurations or single 6A operation with interleaved switching.
It supports three distinct regulation modes selected via the MODE pin: Burst Mode (with internal or external clamp), Pulse-Skipping, and Forced Continuous-each with defined ITH voltage thresholds and current-limit behavior. The device integrates P-channel high-side and N-channel synchronous rectifier MOSFETs with RDS(ON) of 75mΩ/55mΩ at 3.3V, eliminating external catch diodes and enabling high efficiency up to 94%.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.25V to 5.5V - compatible with single-cell Li-ion batteries and standard 3.3V/5V rails. |
| Output Current per Channel | 3A continuous - supports high-current point-of-load conversion without external power stages. |
| Switching Frequency | Up to 4MHz - enables use of sub-1µH inductors and compact ceramic output capacitors. |
| Feedback Reference Voltage | 0.6V ±1% - provides precise regulation down to 0.6V output, critical for modern low-voltage processors and DDR supplies. |
| Quiescent Current (Burst Mode) | 130µA - extends battery life in portable systems during light-load standby conditions. |
| Shutdown Current | ≤1µA - ensures near-zero system leakage when powered off. |
| Operating Junction Temp | –55°C to 150°C - qualified for harsh industrial, automotive under-hood, and military applications. |
Pinout & Package
The LTC3615MPUF-1#PBF is housed in a thermally enhanced 24-pin, 4mm × 4mm QFN package (UF) with exposed PGND pad (Pin 25) requiring PCB soldering for thermal and electrical integrity. θJA = 37°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SW1 / SW2 | Channel 1 / 2 Switching Node | Connects to external inductor; drives internal P/N-MOSFET pair; requires low-inductance layout for EMI control. |
| VFB1 / VFB2 | Channel 1 / 2 Feedback Input | Monitors output voltage via resistive divider; sets regulated output using 0.6V internal reference. |
| ITH1 / ITH2 | Error Amplifier Compensation | Controls peak inductor current; tied to SVIN to enable Active Voltage Positioning (AVP) for DDR termination. |
| RUN1 / RUN2 | Channel Enable Inputs | Active-high logic; pulling either low disables its channel; both low places IC in <1µA shutdown. |
| PHASE | Inter-Channel Phase Select | 0V → 140°, SVIN → 180° phase shift - reduces input capacitor RMS current in dual-output configurations. |
| SRLIM | Slew Rate Limit / DDR Mode Control | Tied to SVIN → enables DDR sink capability and AVP; resistor-to-GND adjusts dV/dt on SW pins to suppress EMI. |
| RT/SYNC | Oscillator Frequency Control | Resistor-to-GND sets fSW (400kHz–4MHz); driven by external clock for synchronization; tied to SVIN → 2.25MHz default. |
| PGOOD1 / PGOOD2 | Power Good Outputs | Open-drain status flags; pulled low if VOUT deviates >±7.5% or RUNx is inactive - used for sequencing and fault reporting. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 3A synchronous buck topology | Integrates high-side P-MOSFET (75mΩ) and low-side N-MOSFET (55mΩ), eliminating external diodes and saving board space. |
| Selectably phased dual outputs (140°/180°) | Reduces input ripple current by up to 70% vs. 0° phase, allowing smaller input bulk capacitors in compact designs. |
| Programmable slew rate limiting | Adjusts switching edge rates via SRLIM resistor to meet Class B EMI requirements without sacrificing efficiency. |
| DDR memory termination mode | Enables bidirectional current sourcing/sinking (±1.5A) with AVP when SRLIM = SVIN - meets JEDEC DDR3/DDR4 VTT specs. |
| Multimode operation (Burst/Pulse-Skipping/FCM) | Optimizes efficiency across load range: Burst Mode (130µA IQ) for light loads; Forced Continuous for low-noise or sinking requirements. |
Applications
| DDR Memory Termination | Portable Computer Core Power |
|---|---|
|
Use Scenario: Providing tightly regulated, bidirectional VTT supply for DDR3/DDR4 memory interfaces in laptops and embedded controllers. IC Role / Device Role / Timing Role: Dual-channel buck regulator configured in DDR mode with AVP, delivering ±1.5A sink/source capability and fast transient response. Use Value: Meets JEDEC-specified VTT tracking and dynamic load requirements while minimizing component count and thermal footprint. |
Use Scenario: Generating core voltages (e.g., 1.2V, 1.8V) for ARM-based SoCs or FPGAs in handheld devices with limited PCB area. IC Role / Device Role / Timing Role: High-frequency (up to 4MHz), dual-output DC/DC controller managing independent processor and I/O rail sequencing. Use Value: Enables use of 0.47µH inductors and 47µF ceramic caps, reducing solution size by >40% vs. 500kHz alternatives. |
| Industrial Point-of-Load Supply | Distributed Power Architecture |
|
Use Scenario: Delivering stable 2.5V/3A and 1.8V/3A rails in programmable logic controllers (PLCs) operating across –40°C to 85°C ambient. IC Role / Device Role / Timing Role: Extended-temperature-grade dual buck regulator with 100% duty cycle dropout support for brownout resilience. Use Value: Maintains regulation during input dips to 2.25V; –55°C to 150°C qualification ensures reliability in uncontrolled enclosures. |
Use Scenario: Interleaved dual 3A output in telecom baseband cards where input ripple minimization is critical for signal integrity. IC Role / Device Role / Timing Role: Synchronized dual-channel converter with 180° phase shift, reducing input capacitor RMS current and thermal stress. Use Value: Lowers required input capacitance by ~50%, enabling smaller, higher-reliability X7R/X5R ceramics instead of bulk electrolytics. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3615HUF-1#PBF | Same electrical specs and pinout; rated for –40°C to 150°C (vs. –55°C to 150°C for MP grade). | Lacks extended low-temperature qualification; unsuitable for aerospace or cryogenic industrial use. | Select only if full –55°C operation is not required-offers cost advantage in commercial/industrial designs. |
| TPS543320RTWR | Single-channel 3A buck with PMBus interface; no native dual-channel or DDR mode; 2.2MHz fixed fSW. | Requires two units for dual-rail designs; lacks 140°/180° phase control and AVP for DDR termination. | Choose when digital telemetry, margining, or remote configuration are prioritized over analog simplicity and DDR compliance. |
Compared with LTC3615HUF-1#PBF, the LTC3615MPUF-1#PBF adds guaranteed operation at –55°C-critical for cold-environment deployments-while TPS543320RTWR trades analog flexibility and integrated DDR functionality for digital configurability and telemetry, increasing BOM count for dual-rail systems.
Availability
LTC3615MPUF-1#PBF is available at Aetrix Electronics and suitable for DDR memory termination, portable computer core power, and industrial point-of-load applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for LTC3615MPUF-1#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its legacy of high-performance power management ICs with rigorous automotive and industrial qualification standards.
The LTC3615MPUF-1#PBF belongs to Linear's monolithic synchronous buck regulator family, engineered for high-density, high-efficiency DC/DC conversion in space-constrained and thermally demanding applications-including DDR memory, portable computing, and ruggedized industrial systems.
FAQ
What is the maximum switching frequency supported by the LTC3615MPUF-1#PBF?
The LTC3615MPUF-1#PBF supports an externally programmable switching frequency up to 4MHz via the RT/SYNC pin-either through a resistor-to-ground network or an external clock signal. At 4MHz, it enables ultra-compact designs using sub-1µH inductors and low-ESR ceramic capacitors, significantly reducing solution footprint compared to lower-frequency alternatives.
How does the LTC3615MPUF-1#PBF achieve DDR memory termination capability?
The LTC3615MPUF-1#PBF achieves DDR termination by configuring SRLIM = SVIN to activate Active Voltage Positioning (AVP) mode, enabling bidirectional ±1.5A current delivery. In this mode, the ITH pins control both sourcing and sinking behavior relative to the TRACK/SS reference, meeting JEDEC-specified VTT tracking and dynamic load response for DDR3/DDR4 interfaces.
What is the significance of the "MP" grade in LTC3615MPUF-1#PBF?
The "MP" grade in LTC3615MPUF-1#PBF denotes a tested and guaranteed operating junction temperature range of –55°C to 150°C-exceeding standard industrial (–40°C to 125°C) and high-temp (–40°C to 150°C) grades. This makes the LTC3615MPUF-1#PBF suitable for aerospace, defense, and extreme-environment industrial applications where cold-start reliability and sustained high-temperature operation are mandatory.
Can the LTC3615MPUF-1#PBF operate with a 2.25V input supply?
Yes, the LTC3615MPUF-1#PBF operates with a minimum input voltage of 2.25V, enabling direct regulation from deeply discharged single-cell Li-ion batteries. Its 100% duty cycle capability ensures uninterrupted output regulation even as the input drops to the output voltage level-extending usable battery runtime in portable systems.
What are the key differences between LTC3615MPUF-1#PBF and LTC3615MPUF#PBF?
The LTC3615MPUF-1#PBF implements fixed 140°/180° inter-channel phase shift, whereas the non-"-1" variant (LTC3615MPUF#PBF) supports 0°/90°/180° selection. This distinction affects input ripple cancellation strategy: the -1 version is optimized for high-current single-output (6A) or tightly coupled dual-rail DDR applications, while the base version offers greater flexibility for general-purpose dual-rail sequencing.
LTC3615MPUF-1#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.25V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 3A
- Frequency - Switching:
- 400kHz ~ 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
LTC3615MPUF-1#PBF FAQ
1.How can I place an order for LTC3615MPUF-1#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3615MPUF-1#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3615MPUF-1#PBF reliable?
The price and inventory of LTC3615MPUF-1#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3615MPUF-1#PBF is usually 5 days.
3.What payment methods are accepted for LTC3615MPUF-1#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3615MPUF-1#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3615MPUF-1#PBF?
LTC3615MPUF-1#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3615MPUF-1#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3615MPUF-1#PBF?
For technical support, including LTC3615MPUF-1#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3615MPUF-1#PBF requirements.
6.How does Aetrix verify that LTC3615MPUF-1#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3615MPUF-1#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3615MPUF-1#PBF meets industry standards.
7.What is the process for return or replacement of LTC3615MPUF-1#PBF?
All LTC3615MPUF-1#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3615MPUF-1#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3615MPUF-1#PBF part is unused and in its original packaging.
Return procedure for LTC3615MPUF-1#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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