Analog Devices Inc. LTC3615MPUF-1#TRPBF
- Part No.:
- LTC3615MPUF-1#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 24-WFQFN Exposed Pad
- Datasheet:
-
LTC3615MPUF-1#TRPBF.pdf
- Description:
- IC REG BUCK ADJ 3A DL 24QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3615MPUF-1#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel, 3A synchronous step-down DC/DC converter in a 4mm × 4mm QFN-24 package, operating from 2.25V to 5.5V input and delivering two independent outputs down to 0.6V with ±1% output voltage accuracy. It supports 140°/180° inter-channel phase shift, programmable slew rate limiting, and Burst Mode operation achieving 130µA quiescent current - optimized for Li-ion-powered portable systems requiring high efficiency and low-noise point-of-load regulation.
For engineers reviewing the LTC3615MPUF-1#TRPBF datasheet, LTC3615MPUF-1#TRPBF pinout, LTC3615MPUF-1#TRPBF application, or LTC3615MPUF-1#TRPBF equivalent, this page delivers verified technical context, validated pin functions, confirmed thermal and electrical specifications across –55°C to 150°C, and real-world selection guidance for DDR memory termination, dual-rail SoC supplies, and battery-constrained handheld designs.
Technical Context
The LTC3615MPUF-1#TRPBF implements a current-mode, constant-frequency architecture with dual independent control loops sharing a common oscillator and reference. Its 140°/180° selectable phase shift between SW1 and SW2 minimizes input ripple in dual 3A configurations and enables single 6A operation with reduced capacitor stress.
It integrates synchronous P-channel and N-channel MOSFETs (75mΩ top / 55mΩ bottom RDS(ON) at 3.3V), supports internal or external compensation via ITH pins, and provides three operating modes - Burst Mode (130µA IQ), Pulse-Skipping, and Forced Continuous - selected by the MODE pin voltage, with DDR mode enabled when SRLIM = SVIN.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.25V to 5.5V - supports single-cell Li-ion (2.7–4.2V) with headroom for full discharge and charging transients. |
| Output Current per Channel | 3A continuous - enables dual-core SoC or DDR memory rail delivery without external current sharing. |
| Output Voltage Accuracy | ±1% over temperature - ensures stable core voltage for processors and memory interfaces under thermal variation. |
| Quiescent Current (Burst Mode) | 130µA - extends battery runtime in standby states while maintaining regulated outputs. |
| Switching Frequency Range | 400kHz to 4MHz - allows use of sub-1µH inductors and compact ceramic capacitors for space-constrained PCBs. |
| Phase Shift Options | 140° or 180° - reduces input RMS current and EMI in dual-output configurations; 180° enables interleaved 6A output. |
| Operating Junction Temp | –55°C to 150°C - qualified for extended industrial, automotive under-hood, and military-grade applications. |
Pinout & Package
The LTC3615MPUF-1#TRPBF is housed in a thermally enhanced 24-pin 4mm × 4mm QFN package (UF) with exposed PGND pad (Pin 25) requiring solder connection to PCB for thermal and electrical integrity. θJA = 37°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SW1 / SW2 | Channel 1 / 2 switching node | Connects to external inductor; drives internal synchronous MOSFETs; requires low-inductance layout for EMI control. |
| VFB1 / VFB2 | Feedback input for channel 1 / 2 | Monitors output voltage via resistive divider; sets regulation point with 0.6V internal reference (±1%). |
| ITH1 / ITH2 | Error amplifier compensation node | Accepts external RC network for loop stability; tied to SVIN enables Active Voltage Positioning (AVP) mode. |
| RUN1 / RUN2 | Enable input for channel 1 / 2 | Logic-high (>1V) enables respective channel; both low places device in <1µA shutdown state. |
| PHASE | Inter-channel phase select | 0V → 140°, SVIN → 180° - configures timing relationship between SW1/SW2 for ripple cancellation. |
| SRLIM | Slew rate and DDR mode control | Tied to SVIN enables DDR termination mode and maximum slew rate; resistor-to-GND adjusts dV/dt for EMI reduction. |
| RT/SYNC | Oscillator frequency control | Resistor-to-GND sets fSW; external clock up to 4MHz synchronizes switching; tied to SVIN selects 2.25MHz internal oscillator. |
| PGOOD1 / PGOOD2 | Open-drain power-good indicator | Pulled low if output deviates >±7.5% from setpoint or channel is disabled - used for system sequencing and fault reporting. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 3A synchronous buck topology | Eliminates external catch diodes, reduces BOM count, improves efficiency up to 94%, and saves board area. |
| 140°/180° selectable phase shift | Reduces input capacitor RMS current by up to 40% in dual-output mode and enables clean 6A interleaved output. |
| Programmable slew rate limiting | Adjusts switch-node edge rates via SRLIM resistor to suppress high-frequency EMI without sacrificing efficiency. |
| DDR memory termination mode | Activated when SRLIM = SVIN; configures output for ±1.5A sink/source capability matching DDR3/DDR4 VTT requirements. |
| Three operational modes (Burst/Pulse-Skipping/FCM) | Enables trade-off between light-load efficiency (130µA), output ripple (FCM), and transient response (Pulse-Skipping). |
| 100% duty cycle low-dropout operation | Maintains regulation as input drops to within ~200mV of output - critical for battery end-of-discharge support. |
Applications
| Mobile SoC Power Delivery | DDR Memory Termination (VTT) |
|---|---|
Use Scenario: Dual-rail power for application processors with independent core (VDD) and I/O (VDDQ) supplies in smartphones and tablets. IC Role / Device Role / Timing Role: Primary point-of-load regulator delivering tightly regulated 0.8V/1.1V rails with fast load-step response and low noise. Use Value: 130µA Burst Mode IQ extends standby time; 140° phase shift minimizes input ripple on shared battery rail. |
Use Scenario: Termination supply for DDR3/DDR4 memory interfaces requiring bidirectional ±1.5A current sourcing/sinking. IC Role / Device Role / Timing Role: Dedicated VTT regulator operating in DDR mode with matched source/sink capability and tracking. Use Value: SRLIM = SVIN activates DDR mode; TRACK/SS pins enable precise voltage ramp alignment with main VDDQ rail. |
| Industrial Portable Instruments | Li-ion Powered Edge AI Modules |
Use Scenario: Compact handheld test equipment (e.g., multimeters, thermal imagers) powered by single Li-ion cell. IC Role / Device Role / Timing Role: Main DC/DC converter supporting wide-input range (2.25–5.5V) and full –55°C to 150°C operation. Use Value: 100% duty cycle maintains regulation down to 2.4V input; QFN-24 package enables high-density layout with minimal thermal footprint. |
Use Scenario: Power management for edge AI accelerators with bursty compute loads and strict thermal constraints. IC Role / Device Role / Timing Role: Dual-channel regulator supplying core logic (1.0V) and memory interface (1.2V) with independent soft-start and tracking. Use Value: Independent RUN/TRACK pins allow sequenced startup; Forced Continuous Mode ensures low-noise supply during inference bursts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LTC3615EUF-1#TRPBF | Same silicon, rated for –40°C to 125°C junction temperature (vs. –55°C to 150°C for MP grade). | Not suitable for extended cold-start or high-ambient industrial environments. | Select LTC3615MPUF-1#TRPBF when operation below –40°C or above 125°C is required; otherwise E-grade offers cost advantage. |
| TPS652860RGER | TI dual 3A buck with fixed 180° phase, no programmable slew rate, 2.7–5.5V input, 1.2V min output. | Lacks DDR mode, Burst Mode IQ = 25µA (lower), but integrates power sequencing and enable logic. | Choose TPS652860RGER for simpler BOM and integrated sequencing; choose LTC3615MPUF-1#TRPBF for wider VIN, lower VOUT, and EMI-tunable slew rate. |
Compared with LTC3615EUF-1#TRPBF, the MP grade offers extended temperature qualification critical for aerospace or automotive under-hood use; versus TPS652860RGER, it provides broader input/output flexibility and adjustable EMI control at the cost of external sequencing components.
Availability
LTC3615MPUF-1#TRPBF is available at Aetrix Electronics and suitable for mobile SoC power delivery, DDR memory termination, and industrial portable instrumentation requiring stable component supply across extreme temperature ranges and long production lifecycles.
Supply support for LTC3615MPUF-1#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous qualification standards and long-term product availability commitments.
The LTC3615MPUF-1#TRPBF belongs to Linear's monolithic synchronous buck regulator family, designed specifically for high-efficiency, low-noise, multi-rail power conversion in space- and thermal-constrained portable and industrial systems.
FAQ
What is the key difference between LTC3615MPUF-1#TRPBF and the standard LTC3615MPUF#TRPBF?
The LTC3615MPUF-1#TRPBF implements the LTC3615-1 variant, which supports 140°/180° inter-channel phase shift - unlike the base LTC3615MPUF#TRPBF that offers 0°/90°/180°. This makes LTC3615MPUF-1#TRPBF optimal for applications where 140° phase minimizes input ripple in dual-output configurations while avoiding 90°-induced harmonic issues. Both share identical thermal rating (–55°C to 150°C) and package.
Does LTC3615MPUF-1#TRPBF support DDR memory termination, and how is it configured?
Yes, LTC3615MPUF-1#TRPBF supports DDR termination mode. It is activated by tying the SRLIM pin to SVIN, which configures the output for ±1.5A bidirectional current capability and adjusts the PGOOD window to track the TRACK/SS voltage. This matches DDR3/DDR4 VTT requirements and enables accurate voltage positioning during memory read/write cycles.
What is the minimum output voltage achievable with LTC3615MPUF-1#TRPBF?
The LTC3615MPUF-1#TRPBF supports output voltages down to 0.6V, set by the internal 0.6V feedback reference and external resistor divider on VFB1/VFB2. With precision resistors and proper layout, regulation remains within ±1% accuracy across load, line, and temperature - enabling direct powering of modern low-voltage cores and I/O rails.
How does the PHASE pin function on LTC3615MPUF-1#TRPBF, and what are the valid logic levels?
On LTC3615MPUF-1#TRPBF, the PHASE pin selects inter-channel timing: 0V (SGND) configures 140° phase shift, and SVIN configures 180°. Unlike the base LTC3615, the 90° option is not available. The pin must be hard-connected - floating or intermediate voltages may cause undefined behavior or increased EMI due to inconsistent switching alignment.
Can LTC3615MPUF-1#TRPBF operate with only one channel enabled, and what happens to the unused channel?
Yes, LTC3615MPUF-1#TRPBF supports single-channel operation. Driving RUN2 low disables Channel 2, placing its SW2, PGOOD2, and associated circuitry in high-impedance sleep state with negligible current draw. Channel 1 operates independently with full functionality - including phase shift (irrelevant in single-channel mode), soft-start, and mode selection - making it ideal for flexible power tree design.
LTC3615MPUF-1#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.25V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 3A
- Frequency - Switching:
- 400kHz ~ 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
LTC3615MPUF-1#TRPBF FAQ
1.How can I place an order for LTC3615MPUF-1#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3615MPUF-1#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3615MPUF-1#TRPBF reliable?
The price and inventory of LTC3615MPUF-1#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3615MPUF-1#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3615MPUF-1#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3615MPUF-1#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3615MPUF-1#TRPBF?
LTC3615MPUF-1#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3615MPUF-1#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3615MPUF-1#TRPBF?
For technical support, including LTC3615MPUF-1#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3615MPUF-1#TRPBF requirements.
6.How does Aetrix verify that LTC3615MPUF-1#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3615MPUF-1#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3615MPUF-1#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3615MPUF-1#TRPBF?
All LTC3615MPUF-1#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3615MPUF-1#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3615MPUF-1#TRPBF part is unused and in its original packaging.
Return procedure for LTC3615MPUF-1#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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