Analog Devices Inc. LTC3618EFE#TRPBF
- Part No.:
- LTC3618EFE#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Regulators
- Package:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
LTC3618EFE#TRPBF.pdf
- Description:
- IC REG CONV DDR 2OUT 24TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,657
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3618EFE#TRPBF from Analog Devices (formerly Linear Technology) is a dual synchronous buck DC/DC converter optimized for DDR memory termination and reference voltage generation. It delivers ±3A per channel at up to 4MHz switching frequency, supports 2.25V–5.5V input, provides ±1% VDDQ output accuracy, and generates VTTR = VDDQIN/2 with ±10mA drive capability - enabling complete DDR1/2/3 power delivery in compact TSSOP-24 packaging.
For engineers reviewing the LTC3618EFE#TRPBF datasheet, LTC3618EFE#TRPBF pinout, LTC3618EFE#TRPBF application, or LTC3618EFE#TRPBF equivalent, key selection criteria include dual-channel ±3A current capability, programmable 0°/90°/180° phase shift, forced-continuous-mode VTT operation, internal/external soft-start options, and compatibility with DDR termination standards requiring tight tracking between VDDQ and VTTR.
Technical Context
The LTC3618EFE#TRPBF integrates two independent current-mode, constant-frequency synchronous buck regulators on a single die: Channel 1 regulates high-accuracy VDDQ (0.6V reference, ±1% tolerance), while Channel 2 generates VTT precisely equal to VTTR (VDDQIN/2), buffered and capable of ±10mA sourcing/sinking. Both channels share a common oscillator and support external frequency programming via RT pin or synchronization up to 4MHz.
Its architecture includes selectable operating modes (pulse-skipping or forced continuous for VDDQ; forced continuous only for VTT), programmable inter-channel phase shift (0°, 90°, or 180°), internal/external compensation paths, and dedicated power-good outputs with ±8% window hysteresis. The device uses integrated P-channel high-side and N-channel low-side MOSFETs with RDS(ON) of 75mΩ/55mΩ at 3.3V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.25V to 5.5V - supports wide-input industrial and DDR system rails including 3.3V and 5V supplies. |
| VDDQ Output Accuracy | ±1% over temperature - ensures stable DDR memory interface voltage within JEDEC specification limits. |
| Max Switching Frequency | 4MHz - enables use of sub-1µH inductors and reduces solution footprint for space-constrained applications. |
| VTT Output Capability | ±3A at VTT = VTTR = VDDQIN/2 - meets DDR termination current requirements with bidirectional load support. |
| Phase Shift Options | 0°, 90°, or 180° - minimizes input ripple through interleaved operation; 180° reduces peak input current by ~30%. |
| Shutdown Current | ≤1µA - enables ultra-low-power standby states in battery-backed or always-on DDR systems. |
| Package Thermal Resistance | θJA = 33°C/W (TSSOP-24) - supports >2W continuous dissipation without forced airflow in typical PCB layouts. |
Pinout & Package
The LTC3618EFE#TRPBF is housed in a thermally enhanced 24-pin TSSOP package (FE grade) with exposed PGND pad (Pin 25) requiring solder connection to PCB for thermal and electrical integrity. Pin pitch is 0.65mm; body size is 7.8mm × 4.4mm × 1.2mm.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| PHASE (Pin 1) | Phase shift control input | Selects 0° (SGND), 90° (mid-rail), or 180° (SVIN) inter-channel timing - critical for input capacitor stress reduction. |
| VFB1 (Pin 22) | VDDQ feedback input | Connects to resistor divider from VDDQ output; regulates to 0.6V internal reference with ±1% accuracy. |
| ITH1 (Pin 23) | VDDQ error amplifier compensation | Accepts RC network for loop stability tuning; tied to SVIN for internal compensation. |
| VDDQIN (Pin 4) | VTT reference source | Defines VTTR = VDDQIN/2; must be connected to regulated VDDQ rail or external precision reference. |
| SGND (Pin 5) | Signal ground reference | Reference point for all analog circuitry (FBx, ITHx, TRACK/SS1); must connect to PGND at single point. |
| PVIN1/PVIN2 (Pins 18–19 / 6–7) | Power input for each channel | Independent high-current inputs for VDDQ and VTT; accept same or lower voltage than SVIN. |
| SW1/SW2 (Pins 16–17 / 8–9) | Switch node outputs | Drive external inductors; require low-ESR ceramic capacitors and careful layout to minimize EMI. |
| RUN1/RUN2 (Pins 11 / 10) | Channel enable inputs | Active-high logic enables respective regulator; both low places device in <1µA shutdown mode. |
| RT (Pin 12) | Oscillator frequency set | Resistor-to-ground sets fSW from 400kHz–4MHz; tied to SVIN defaults to 2.25MHz internal oscillator. |
| MODE/SYNC (Pin 24) | VDDQ mode or sync input | SVIN = pulse-skipping; GND = forced continuous; AC signal = external clock sync up to 4MHz. |
| VTTR (Pin 14) | Buffered VDDQ/2 output | Provides ±10mA VTTR reference for VTT regulation; max 0.1µF capacitance allowed to ensure stability. |
| PGOOD1/PGOOD2 (Pins 15 / 13) | Open-drain status outputs | Assert low if VDDQ or VTT deviates >±8% from target; used for system power sequencing and fault detection. |
| PGND (Pin 25) | Power ground return | Exposed thermal pad; must be soldered to large copper area for thermal management and noise control. |
Key Features
| Feature | Design Value |
|---|---|
| Dual ±3A synchronous buck regulation | Enables full DDR termination (VDDQ + VTT) with bidirectional current handling for memory write/read cycles. |
| Programmable 0°/90°/180° phase shift | Reduces RMS input ripple by up to 40% versus in-phase operation - lowers required input capacitance and EMI filtering. |
| VDDQIN/2 buffered VTTR output | Eliminates need for external op-amp divider; ±10mA drive supports direct connection to VTT feedback network. |
| Internal or external soft-start | TRACK/SS1 pin supports fixed-timing start-up (tSS1 = 0.5–2ms), capacitor-programmed ramp, or supply tracking. |
| Forced continuous mode for VTT | Ensures stable regulation under sinking loads - essential for DDR bus termination during data line pull-down. |
| 4MHz max switching frequency | Permits use of 0.47µH–1.0µH inductors and 22µF–47µF ceramic output caps - reduces board area by >35% vs 1MHz designs. |
Applications
| DDR Memory Power Delivery | DDR2/DDR3 Termination Supply |
|---|---|
|
Use Scenario: Providing tightly regulated VDDQ and matched VTTR for DDR SDRAM modules in servers and networking equipment. IC Role / Device Role / Timing Role: Dual-channel synchronous buck controller generating VDDQ (1.8V/3A) and VTTR-referenced VTT (0.9V/±3A) with <1% tracking error. Use Value: Meets JEDEC DDR2/DDR3 VTT tolerance (±25mV) and eliminates external op-amps or discrete regulators in memory subsystems. |
Use Scenario: Powering DDR3L and LPDDR3 interfaces in portable computing and embedded systems with low-voltage rails. IC Role / Device Role / Timing Role: Delivers VDDQ = 1.35V and VTTR = 0.675V with forced-continuous VTT operation to handle bidirectional data line currents. Use Value: Supports 1.35V DDR3L operation down to 2.25V input, enabling direct battery or single-cell Li-ion input without pre-regulation. |
| Tracking Point-of-Load Supplies | Industrial DDR-Based Control Systems |
|
Use Scenario: Generating matched positive/negative tracking rails for analog front-ends or ADC biasing where symmetry matters. IC Role / Device Role / Timing Role: Uses VDDQIN as master reference to generate VTTR = VDDQIN/2, then configures VTT as negative-tracking output via external circuitry. Use Value: Achieves <0.5% tracking between complementary rails without dedicated tracking ICs - simplifies BOM and layout. |
Use Scenario: Powering DDR-based FPGA configuration memory and real-time control processors in factory automation PLCs. IC Role / Device Role / Timing Role: Provides robust, thermally managed DDR power with 125°C junction rating and built-in OVP/UVP protection. Use Value: Ensures uninterrupted memory operation across –40°C to +85°C ambient with no derating up to 2.5W dissipation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DDR termination regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS51220RGET | Single-channel VDDQ + integrated VTT LDO (not buck); max VTT = ±2A; no VTTR buffer; 3mm × 3mm QFN-16 | Limited to DDR2/DDR3 with lower VTT current; unsuitable for high-speed DDR3L sink-heavy operation | Choose when board space is critical and VTT load ≤±2A; avoid for DDR3L write-intensive applications. |
| ISL95831IRZ | Dual buck with 0.6V/0.3V references; no VTTR buffer; requires external divider; 4MHz max fSW; QFN-32 | Needs external op-amp for VTTR; higher pin count; lacks integrated phase-shift logic | Prefer when custom reference voltages are needed beyond VDDQIN/2; accept added complexity for flexibility. |
Compared with TPS51220RGET and ISL95831IRZ, the LTC3618EFE#TRPBF uniquely integrates a buffered VTTR output, supports true ±3A bidirectional VTT, and offers hardware-selectable phase shift - reducing component count and improving DDR compliance margin without sacrificing thermal performance in TSSOP packaging.
Availability
LTC3618EFE#TRPBF is available at Aetrix Electronics and suitable for DDR memory power delivery, industrial embedded controllers, and high-reliability computing systems requiring stable component supply with full -40°C to +125°C operational range and lead-free RoHS compliance.
Supply support for LTC3618EFE#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving industrial, automotive, communications, and computing markets.
The LTC3618EFE#TRPBF belongs to Linear's high-efficiency monolithic DC/DC converter product line, designed specifically for DDR memory subsystems requiring precise voltage tracking, bidirectional termination current, and minimal board area in enterprise and infrastructure applications.
FAQ
What is the maximum supported switching frequency for the LTC3618EFE#TRPBF?
The LTC3618EFE#TRPBF supports an externally programmable switching frequency up to 4MHz using the RT pin resistor or external clock synchronization via the MODE/SYNC pin. At 4MHz, minimum on-time (80ns) limits practical duty cycle to ≥32% at 5.5V input, making it ideal for compact 1.0µH inductor designs in DDR termination applications.
Does the LTC3618EFE#TRPBF support bidirectional current on both outputs?
Yes - the LTC3618EFE#TRPBF delivers ±3A on the VTT channel (SW2) for true bidirectional DDR termination current, while VDDQ (SW1) provides +3A sourcing only. VTT operates exclusively in forced continuous mode to maintain regulation during sinking events, ensuring compliance with DDR bus pull-down requirements.
How is VTTR generated and what is its load capability in the LTC3618EFE#TRPBF?
In the LTC3618EFE#TRPBF, VTTR is generated by an internal high-accuracy op-amp buffer that outputs exactly VDDQIN/2. It provides ±10mA drive capability with stability guaranteed for ≤0.1µF capacitive loading. VTTR serves as the reference for VTT regulation and must be connected directly to the VFB2 pin without series resistance.
Can the LTC3618EFE#TRPBF operate with input voltage below 3.0V?
Yes - the LTC3618EFE#TRPBF operates from 2.25V to 5.5V input. At low input (e.g., 2.5V), RDS(ON) increases ~50%, raising conduction losses. Designers must verify thermal performance at 100% duty cycle and consider efficiency trade-offs; however, full ±3A VTT capability remains functional down to 2.25V.
What package type and thermal characteristics apply to the LTC3618EFE#TRPBF?
The LTC3618EFE#TRPBF uses a 24-pin TSSOP package (FE grade) with exposed PGND pad (Pin 25). Its thermal resistance is θJA = 33°C/W on a standard 2-layer PCB with 2-in² copper pour. This allows continuous operation at up to 2.5W dissipation in ambient temperatures up to +85°C without forced airflow.
LTC3618EFE#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Converter, DDR
- Voltage - Input:
- 2.25V ~ 5.5V
- Number of Outputs:
- 2
- Voltage - Output:
- Adj to 0.6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TSSOP
LTC3618EFE#TRPBF FAQ
1.How can I place an order for LTC3618EFE#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3618EFE#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3618EFE#TRPBF reliable?
The price and inventory of LTC3618EFE#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3618EFE#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3618EFE#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3618EFE#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3618EFE#TRPBF?
LTC3618EFE#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3618EFE#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3618EFE#TRPBF?
For technical support, including LTC3618EFE#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3618EFE#TRPBF requirements.
6.How does Aetrix verify that LTC3618EFE#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3618EFE#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3618EFE#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3618EFE#TRPBF?
All LTC3618EFE#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3618EFE#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3618EFE#TRPBF part is unused and in its original packaging.
Return procedure for LTC3618EFE#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3618EFE#TRPBF Tags

-
TPS51206DSQR
Texas Instruments

-
TPS51200DRCR
Texas Instruments

-
TPS51200DRCT
Texas Instruments

-
TPS62740DSSR
Texas Instruments

-
TPS51100DGQR
Texas Instruments
-
NCP51200MNTXG
onsemi
-
NCP51400MNTXG
onsemi

-
RT9026GSP
Richtek USA Inc.

-
LP2998MRX/NOPB
Texas Instruments

-
TPS51200QDRCRQ1
Texas Instruments

-
DPA423GN-TL
Power Integrations

-
LM10011SD/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

