Analog Devices Inc. LTC3619BIDD#PBF
- Part No.:
- LTC3619BIDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC3619BIDD#PBF.pdf
- Description:
- IC REG BUCK ADJ DL 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,006
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Product details
Overview
LTC3619BIDD#PBF from Analog Devices (formerly Linear Technology) is a dual monolithic synchronous buck regulator with constant-frequency current-mode control, delivering 400mA on Channel 1 and 800mA on Channel 2 across 2.5V–5.5V input. It features programmable average input current limiting (±5% accuracy), 2.25MHz switching, 0.6V feedback reference, and 100% duty cycle dropout operation-ideal for USB-powered handheld devices and supercapacitor charging.
For engineers reviewing the LTC3619BIDD#PBF datasheet, LTC3619BIDD#PBF pinout, LTC3619BIDD#PBF application, or LTC3619BIDD#PBF equivalent, key selection criteria include verified input current limit programming via RLIM, independent soft-start per channel, dual PGOOD monitoring, and thermal performance in the 3mm × 3mm DFN-11 package with exposed GND pad.
Technical Context
The LTC3619BIDD#PBF implements a dual-channel, in-phase, constant-frequency current-mode architecture with shared 2.25MHz oscillator. Each channel uses independent error amplifiers regulating against a 0.6V internal reference, with peak inductor current controlled by ITH voltage and slope-compensated PWM.
Input current limiting is implemented via summed channel current sensing at the RLIM pin, where external resistor sets ±5% accurate average input current threshold; when exceeded, Channel 2 enters current limit while Channel 1 remains fully regulated. Short-circuit protection forces extended N-FET conduction to safely discharge inductors during fault conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5V to 5.5V - supports single-cell Li-ion and USB 2.0/3.0 bus power without external regulation. |
| Output Current (Ch1 / Ch2) | 400mA / 800mA - enables independent low-power logic and higher-current peripherals from one IC. |
| Switching Frequency | 2.25MHz (typ) - allows use of compact 1.5µH–4.7µH surface-mount inductors and reduces output capacitor size. |
| Feedback Reference | 0.6V ±2% - enables precise low-voltage outputs (e.g., 1.2V, 1.8V) with standard resistor dividers. |
| Input Current Limit Accuracy | ±5% - ensures reliable USB port compliance and prevents host supply collapse under transient loads. |
| Shutdown Current | ≤1µA - minimizes battery drain in always-on systems requiring deep sleep modes. |
| Thermal Resistance θJA | 40°C/W - achieved via thermally enhanced 3mm × 3mm DFN-11 with soldered exposed GND pad. |
Pinout & Package
Package: 10-lead (3mm × 3mm) plastic DFN with exposed GND pad (Pin 11), rated for –40°C to +125°C junction temperature. Exposed pad must be soldered to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VFB1 (Pin 1) | Channel 1 feedback input | Connects to resistive divider on VOUT1; regulates output to 0.6V reference with ±2% accuracy. |
| RUN1 (Pin 2) | Channel 1 enable control | Logic-high (>0.4V) enables Channel 1; pulled to GND disables with ≤1µA leakage. |
| RLIM (Pin 3) | Average input current limit set | Resistor-to-GND programs input current limit (e.g., 116kΩ = 475mA); CLIM capacitor filters transients. |
| PGOOD1 (Pin 4) | Channel 1 power-good indicator | Open-drain output asserts low when VFB1 deviates >±5% from 0.6V; 90µs blanking prevents false triggers. |
| SW1 (Pin 5) | Channel 1 switch node | Connects to inductor; swings between VIN and GND; requires low-ESR ceramic output capacitor. |
| VIN (Pin 6) | Main power input | Supplies both channels; requires local 10µF ceramic decoupling close to pin and exposed GND pad. |
| SW2 (Pin 7) | Channel 2 switch node | Independent high-side switch node for second buck stage; shares VIN but has separate inductor path. |
| PGOOD2 (Pin 8) | Channel 2 power-good indicator | Functionally identical to PGOOD1 but monitors VFB2; enables independent rail sequencing and fault isolation. |
| RUN2 (Pin 9) | Channel 2 enable control | Independent enable signal; allows staggered startup or dynamic channel disable for power optimization. |
| VFB2 (Pin 10) | Channel 2 feedback input | Same 0.6V reference as VFB1; supports different output voltages per channel (e.g., 1.8V + 3.3V). |
| GND (Pin 11) | Power and signal ground | Exposed thermal pad; must be soldered to PCB ground plane for thermal dissipation and noise reduction. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable average input current limit | Set via single RLIM resistor (e.g., 116kΩ → 475mA) with ±5% accuracy over temperature and line - critical for USB-compliant designs. |
| Dual independent soft-start | Each channel ramps output from 0V to regulation in ~950µs, preventing inrush into large output capacitors without external circuitry. |
| Pulse-skipping light-load operation | Maintains low output ripple and minimal audible noise below ~10mA load while preserving efficiency better than forced CCM. |
| 100% duty cycle dropout mode | Enables operation down to VOUT ≈ VIN − (IOUT × RDS(ON)_PFET), extending battery runtime in low-VIN scenarios. |
| Short-circuit protected outputs | Internal N-FET forced-conduction limits inductor current runaway during output shorts, enabling safe auto-recovery. |
Applications
| USB-Powered Portable Devices | Multi-Rail Embedded Systems |
|---|---|
Use Scenario: Powering dual-voltage subsystems (e.g., 1.8V SoC core + 3.3V I/O) from a single USB 5V source with strict 500mA input compliance. IC Role / Device Role / Timing Role: Dual synchronous buck regulator providing isolated, independently enabled DC/DC conversion with real-time input current monitoring. Use Value: Prevents USB host overcurrent shutdown during GSM pulse loads by enforcing 475mA average input limit while sustaining 800mA peak output on Channel 2. | Use Scenario: Generating stable 1.2V and 3.3V rails for FPGA I/O banks and core logic in space-constrained industrial controllers. IC Role / Device Role / Timing Role: Single-package dual buck controller replacing two discrete regulators, reducing BOM count and PCB area. Use Value: Independent RUN pins allow sequenced startup and dynamic rail disabling, minimizing inrush and enabling low-power sleep states. |
| Supercapacitor Backup Power | Radio Transmitter Power Management |
Use Scenario: Charging and regulating power from a 3.6V supercapacitor bank to supply 2.5V and 3.3V system rails during main power failure. IC Role / Device Role / Timing Role: High-efficiency dual buck converter operating down to 2.5V input with 100% duty cycle support for maximum energy extraction. Use Value: 96% peak efficiency at 500mA and low 1µA shutdown current extend hold-up time and reduce self-discharge losses. | Use Scenario: Delivering pulsed 800mA RF PA bias (Channel 2) alongside continuous 400mA digital supply (Channel 1) in LTE/GSM handheld radios. IC Role / Device Role / Timing Role: Input current-limited buck regulator ensuring stable 5V bus operation during 2A GSM burst loads without collapsing VBUS. Use Value: RLIM-based current limiting maintains VBUS regulation while allowing full 800mA RF output pulses - validated in typical application TA01b waveform. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62125DRCR | Single-output, 3–17V input, 300mA max, no input current limit, 2.25MHz fixed frequency | Not suitable for dual-rail or USB input-limited use; lacks PGOOD2, RLIM, and Channel 2 capability | Select only if single-rail, wide-input, non-USB application with lower current demand. |
| LTC3619EMSE#PBF | Same silicon, 10-lead MSOP package (θJA = 45°C/W), identical electrical specs and pinout except GND pad layout | Less efficient thermal performance; requires larger PCB area; not drop-in compatible due to different thermal pad and footprint | Choose only if DFN assembly is unavailable; expect higher junction temperature at same load. |
Compared with TPS62125DRCR and LTC3619EMSE#PBF, the LTC3619BIDD#PBF uniquely delivers dual independent outputs with programmable input current limiting in a thermally optimized 3mm × 3mm DFN, making it the only option supporting USB-compliant multi-rail power in ultra-compact portable designs.
Availability
LTC3619BIDD#PBF is available at Aetrix Electronics and suitable for USB-powered portable devices, multi-rail embedded controllers, and radio transmitter power management requiring stable component supply, long-term lifecycle support, and guaranteed parametric performance across –40°C to +125°C.
Supply support for LTC3619BIDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. (acquired Linear Technology in 2017) is a global leader in high-performance analog, mixed-signal, and power management semiconductors, serving precision instrumentation, communications, and industrial markets.
The LTC3619B belongs to Linear's high-frequency synchronous buck regulator product line, designed specifically for space-constrained, battery- and USB-powered applications demanding dual outputs, input current control, and robust thermal performance in miniature packages.
FAQ
What is the maximum supported output current for each channel of the LTC3619BIDD#PBF?
The LTC3619BIDD#PBF delivers up to 400mA on Channel 1 and 800mA on Channel 2 under typical conditions (VIN = 5V, TA = 25°C). These values are specified in the Absolute Maximum Ratings and confirmed in Electrical Characteristics tables. Derating is required at elevated ambient temperatures or with poor PCB thermal design - consult the θJA = 40°C/W spec and thermal layout guidelines in the datasheet for sustained full-load operation.
How do I program the input current limit on the LTC3619BIDD#PBF?
Set the input current limit on the LTC3619BIDD#PBF by connecting a resistor (RLIM) from Pin 3 (RLIM) to GND. For example, a 116kΩ resistor programs a 475mA limit (±5%). A capacitor (CLIM ≥100pF) must also be placed from RLIM to GND to filter switching noise; typical values range from 2.2nF to 0.1µF depending on transient response requirements. The LTC3619BIDD#PBF datasheet provides the formula RLIM = 55kΩ/A and tabulated resistor values.
Does the LTC3619BIDD#PBF support independent enable and power-good signaling per channel?
Yes, the LTC3619BIDD#PBF provides fully independent control and monitoring: RUN1 (Pin 2) and RUN2 (Pin 9) enable/disable Channels 1 and 2 separately, while PGOOD1 (Pin 4) and PGOOD2 (Pin 8) provide open-drain power-good signals indicating regulation status within ±5% of target for each output. This enables flexible rail sequencing, fault isolation, and system-level power management - all verified in the LTC3619BIDD#PBF functional diagram and pin descriptions.
What package type and thermal characteristics does the LTC3619BIDD#PBF use?
The LTC3619BIDD#PBF uses a 10-lead, 3mm × 3mm plastic DFN package with an exposed GND pad (Pin 11). Its thermal resistance is θJA = 40°C/W when mounted on a 2-layer PCB with 1in² copper pour connected to the exposed pad. This package enables high power density and superior thermal performance compared to MSOP variants, and requires soldering the exposed pad to PCB ground for both electrical integrity and heat dissipation - as specified in the LTC3619BIDD#PBF absolute maximum ratings and layout recommendations.
Can the LTC3619BIDD#PBF operate in dropout mode, and what is its minimum input-to-output differential?
Yes, the LTC3619BIDD#PBF supports 100% duty cycle operation for low-dropout behavior. In dropout, the output voltage equals VIN minus the voltage drop across the internal P-channel MOSFET (RDS(ON) ≈ 0.45Ω for Channel 1, 0.27Ω for Channel 2 at VIN = 5V) and inductor DCR. For example, at 400mA load and 5V input, VOUT drops by ~225mV due to PFET conduction loss alone - confirmed in the LTC3619BIDD#PBF Typical Performance Characteristics (Figure G08, G09) and Dropout Operation section.
LTC3619BIDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5V
- Current - Output:
- 400mA, 800mA
- Frequency - Switching:
- 2.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LTC3619BIDD#PBF FAQ
1.How can I place an order for LTC3619BIDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3619BIDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3619BIDD#PBF reliable?
The price and inventory of LTC3619BIDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3619BIDD#PBF is usually 5 days.
3.What payment methods are accepted for LTC3619BIDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3619BIDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3619BIDD#PBF?
LTC3619BIDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3619BIDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3619BIDD#PBF?
For technical support, including LTC3619BIDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3619BIDD#PBF requirements.
6.How does Aetrix verify that LTC3619BIDD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3619BIDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3619BIDD#PBF meets industry standards.
7.What is the process for return or replacement of LTC3619BIDD#PBF?
All LTC3619BIDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3619BIDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3619BIDD#PBF part is unused and in its original packaging.
Return procedure for LTC3619BIDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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