Analog Devices Inc. LTC3619IDD#PBF
- Part No.:
- LTC3619IDD#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
LTC3619IDD#PBF.pdf
- Description:
- IC REG BUCK ADJ DL 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3619IDD#PBF from Analog Devices (formerly Linear Technology) is a dual monolithic synchronous buck regulator with constant-frequency current-mode control, designed for space-constrained Li-ion and USB-powered systems. It delivers 400mA from Channel 1 and 800mA from Channel 2 across 2.5V–5.5V input, supports 0.6V–5V output voltages, features programmable average input current limiting (±5% accuracy), and operates at 2.25MHz for compact external components.
For engineers reviewing the LTC3619IDD#PBF datasheet, LTC3619IDD#PBF pinout, LTC3619IDD#PBF application, or LTC3619IDD#PBF equivalent, this page provides verified technical context, validated pin functions, confirmed thermal and electrical specifications, and real-world use cases in USB power delivery, supercapacitor charging, and GSM pulse-load handheld devices.
Technical Context
The LTC3619IDD#PBF implements a dual-channel, in-phase, constant-frequency (2.25MHz) current-mode architecture with independent soft-start and power-good monitoring per channel. Its input current limit is programmable via RLIM pin using an external resistor, and when total input current exceeds the set threshold, Channel 2 enters current limiting while Channel 1 remains fully regulated.
Each channel uses P-channel high-side and N-channel low-side MOSFETs with typical RDS(ON) of 0.45Ω/0.35Ω (Ch1) and 0.27Ω/0.25Ω (Ch2) at VIN = 5V. The device supports 100% duty cycle for low-dropout operation and transitions to Burst Mode® at light loads, achieving 50µA quiescent current and <25mVP-P output ripple.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5V to 5.5V - compatible with single-cell Li-ion and USB 2.0/3.0 bus voltage ranges. |
| Output Current (Ch1 / Ch2) | 400mA / 800mA - enables independent powering of core logic and RF subsystems. |
| Feedback Reference Voltage | 0.6V ±2% - allows precise low-voltage regulation down to 0.6V with external resistor dividers. |
| Switching Frequency | 2.25MHz (±25%) - permits use of sub-2.2µH inductors and reduces EMI filtering burden. |
| Average Input Current Limit Accuracy | ±5% - ensures reliable USB compliance without overloading host ports during peak load transients. |
| Quiescent Current (Burst Mode) | 50µA - extends battery runtime in always-on, low-duty-cycle applications like sensor nodes. |
| Operating Junction Temp | –40°C to +125°C - qualified for automotive cabin and industrial edge computing environments. |
| Shutdown Current | ≤1µA - enables ultra-low-power system-level sleep states with minimal leakage. |
Pinout & Package
Package: 10-lead 3mm × 3mm plastic DFN with exposed GND pad (Pin 11), thermally enhanced for high-current DC/DC conversion in compact layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VFB1 (Pin 1) | Channel 1 feedback input | Connects to resistive divider on Ch1 output; regulates VOUT1 to 0.6V reference. |
| RUN1 (Pin 2) | Channel 1 enable control | High = enable; low = shutdown; supports independent sequencing of dual outputs. |
| RLIM (Pin 3) | Input current limit programming | Resistor-to-GND sets average input current limit; capacitor filters transient sensing. |
| PGOOD1 (Pin 4) | Channel 1 power-good indicator | Open-drain output asserts low when VFB1 is within ±5%–±11% window of 0.6V. |
| SW1 (Pin 5) | Channel 1 switch node | Connects to inductor; swings between VIN and GND; requires low-inductance layout. |
| VIN (Pin 6) | Main input supply | 2.5V–5.5V input; must be decoupled with ≥10µF ceramic + 0.1µF high-frequency cap. |
| SW2 (Pin 7) | Channel 2 switch node | Independent switch node for Ch2; shares VIN but has separate inductor path. |
| PGOOD2 (Pin 8) | Channel 2 power-good indicator | Open-drain output with same threshold behavior as PGOOD1, for independent monitoring. |
| RUN2 (Pin 9) | Channel 2 enable control | Enables/disables Ch2 independently; supports staggered startup or fault isolation. |
| VFB2 (Pin 10) | Channel 2 feedback input | Regulates VOUT2 to 0.6V; supports different output voltage than Ch1 via separate divider. |
| GND (Pin 11) | Power and signal ground | Exposed thermal pad; must be soldered to PCB plane for thermal and EMI performance. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable average input current limit | Set via single RLIM resistor (e.g., 116kΩ = 475mA); prevents USB port overload while sustaining high peak output currents. |
| Dual independent soft-start | ~950µs ramp time per channel; eliminates inrush current on input caps and avoids system brownouts during power-up. |
| Burst Mode® operation | 50µA IQ with <25mVP-P ripple; maintains regulation at microamp loads without diode emulation losses. |
| 100% duty cycle capability | Enables dropout operation down to VOUT = VIN – IOUT×RDS(ON); extends battery runtime in deep discharge conditions. |
| Short-circuit protection | Forces extended bottom-FET conduction to safely discharge inductor during output shorts; resumes normal operation after fault clears. |
| ±2% output voltage accuracy | Over full temperature and line/load range; ensures stable core voltage for sensitive processors and RF ICs. |
Applications
| USB Power Delivery | Supercapacitor Charging |
|---|---|
Use Scenario: Dual-rail power for USB-C peripheral with 3.3V MCU and 1.8V interface logic, drawing up to 800mA peak from 5V bus. IC Role / Device Role / Timing Role: LTC3619IDD#PBF acts as primary point-of-load regulator, enforcing strict 500mA average input limit to comply with USB 2.0/3.0 specifications. Use Value: Prevents host port shutdown during GSM transmit bursts while maintaining stable 3.3V/1.8V rails with <25mV ripple. |
Use Scenario: Charging a 1F supercapacitor stack from 5V USB source to 3.4V for backup power in portable medical sensors. IC Role / Device Role / Timing Role: LTC3619IDD#PBF regulates charging current and voltage with programmable input limit to avoid USB port current foldback. Use Value: Enables controlled constant-current/constant-voltage charge profile with independent monitoring of both output rails during charge cycles. |
| GSM Pulse-Load Handhelds | Radios & Wireless Modules |
Use Scenario: Powering GSM modem (2A pulse @ 1ms) and baseband processor in ruggedized field communicator. IC Role / Device Role / Timing Role: LTC3619IDD#PBF supplies 3.4V@800mA (Ch2) to RF PA and 1.8V@400mA (Ch1) to digital core, with coordinated soft-start and PGOOD sequencing. Use Value: Sustains 2.2A peak load without collapsing 5V input by temporarily limiting Ch2 while keeping Ch1 regulated-verified in TA01b waveform. |
Use Scenario: Dual-rail supply for LoRaWAN transceiver requiring 3.3V analog front-end and 1.2V digital core under burst transmission. IC Role / Device Role / Timing Role: LTC3619IDD#PBF delivers low-noise, high-efficiency conversion with Burst Mode® enabling 50µA standby current between transmissions. Use Value: Achieves >90% efficiency at 100mA load and <25mVP-P ripple critical for RF sensitivity and phase noise performance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65270RGET | Fixed 1.2MHz frequency; no programmable input current limit; requires external compensation; 2.7V–5.5V input. | Lacks USB-compliant input current limiting; better suited for non-USB industrial systems with fixed-frequency EMI requirements. | Select TPS65270RGET only if 1.2MHz switching and TI ecosystem support outweigh need for input current control. |
| LTC3619BIDD#PBF | Low-noise, high-efficiency pulse-skipping variant; identical pinout and specs except optimized for reduced EMI and higher light-load efficiency. | Preferred for RF-sensitive applications (e.g., receivers, spectrum analyzers) where Burst Mode® noise must be minimized. | Choose LTC3619BIDD#PBF when EMI compliance (CISPR-22 Class B) or <15µA IQ in deep sleep is mandatory. |
Compared with TPS65270RGET and LTC3619BIDD#PBF, the LTC3619IDD#PBF uniquely balances USB-compliant input current limiting, 2.25MHz high-frequency operation for miniaturization, and –40°C to +125°C qualification-making it optimal for thermally demanding, portable, and bus-powered designs where both precision regulation and input protection are required.
Availability
LTC3619IDD#PBF is available at Aetrix Electronics and suitable for USB-powered devices, GSM pulse-load handhelds, supercapacitor charging circuits, and industrial edge sensor nodes requiring stable component supply across extended temperature ranges.
Supply support for LTC3619IDD#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous automotive and industrial qualification standards.
The LTC3619 series was designed specifically for dual-rail, space-constrained, battery- and USB-powered applications requiring programmable input current limiting, high efficiency at light loads, and robust thermal performance up to 125°C junction temperature.
FAQ
What is the maximum output current capability of each channel in the LTC3619IDD#PBF?
The LTC3619IDD#PBF delivers up to 400mA from Channel 1 and 800mA from Channel 2 under typical conditions (VIN = 5V, TJ ≤ 125°C). These values are validated across the –40°C to +125°C operating junction temperature range and assume proper PCB thermal design with the exposed GND pad soldered to a thermal plane. Peak switch current limits are 800mA (Ch1) and 1600mA (Ch2), supporting short-duration pulse loads beyond steady-state ratings.
How does the programmable average input current limit function in the LTC3619IDD#PBF?
The LTC3619IDD#PBF uses an external resistor (RLIM) connected from Pin 3 to GND to set the average input current limit. For example, a 116kΩ resistor programs a 475mA limit with ±5% accuracy. When total input current exceeds this threshold, Channel 2 enters current limiting while Channel 1 remains fully regulated-enabling USB-compliant operation without system-wide rail collapse during GSM transmit bursts.
Does the LTC3619IDD#PBF support 100% duty cycle operation, and what is its significance?
Yes, the LTC3619IDD#PBF supports 100% duty cycle operation, allowing VOUT to track VIN minus IOUT×RDS(ON) in dropout. This extends usable battery life in Li-ion systems by maintaining regulation down to ~2.7V input for a 2.5V output, critical for handheld devices operating through deep discharge cycles without brownout resets.
What package type and thermal characteristics apply to the LTC3619IDD#PBF?
The LTC3619IDD#PBF uses a 10-lead 3mm × 3mm plastic DFN package with an exposed GND pad (Pin 11). Its θJA is 40°C/W with proper PCB copper area, and it is rated for –40°C to +125°C operating junction temperature. The exposed pad must be soldered to a thermal plane to achieve specified current and thermal performance-verified in the Absolute Maximum Ratings table.
Can the LTC3619IDD#PBF operate in Burst Mode®, and what are its benefits?
Yes, the LTC3619IDD#PBF automatically enters Burst Mode® at light loads, reducing quiescent current to 50µA while maintaining regulation and delivering <25mVP-P output ripple. This mode minimizes switching losses and extends battery life in always-on, low-duty-cycle applications such as IoT sensor nodes and portable medical monitors without sacrificing output stability.
LTC3619IDD#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5V
- Current - Output:
- 400mA, 800mA
- Frequency - Switching:
- 2.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
LTC3619IDD#PBF FAQ
1.How can I place an order for LTC3619IDD#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3619IDD#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3619IDD#PBF reliable?
The price and inventory of LTC3619IDD#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3619IDD#PBF is usually 5 days.
3.What payment methods are accepted for LTC3619IDD#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3619IDD#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3619IDD#PBF?
LTC3619IDD#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3619IDD#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3619IDD#PBF?
For technical support, including LTC3619IDD#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3619IDD#PBF requirements.
6.How does Aetrix verify that LTC3619IDD#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3619IDD#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3619IDD#PBF meets industry standards.
7.What is the process for return or replacement of LTC3619IDD#PBF?
All LTC3619IDD#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3619IDD#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3619IDD#PBF part is unused and in its original packaging.
Return procedure for LTC3619IDD#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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