Analog Devices Inc. LTC3622IDE-23/5#PBF
- Part No.:
- LTC3622IDE-23/5#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 14-WFDFN Exposed Pad
- Datasheet:
-
LTC3622IDE-23/5#PBF.pdf
- Description:
- IC REG BUCK 3.3V/5V 1A DL 14DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
LTC3622IDE-23/5#PBF from Analog Devices is a dual-channel, 1A synchronous step-down regulator with fixed 5V and 3.3V outputs, 2.25MHz switching frequency, ultralow 5µA no-load quiescent current (both channels enabled), ±1% output voltage accuracy, and operation from 2.7V to 17V input - designed for compact, battery-sensitive point-of-load power in portable handheld scanners and industrial IoT edge nodes.
For engineers reviewing the LTC3622IDE-23/5#PBF datasheet, LTC3622IDE-23/5#PBF pinout, LTC3622IDE-23/5#PBF application, or LTC3622IDE-23/5#PBF equivalent, this page delivers verified package mapping (14-pin DFN, 3mm × 4mm), confirmed dual fixed-output configuration, validated phase-shift control via PHASE pin, real-world efficiency curves at light load, and cross-referenced alternatives with documented VOUT and frequency mismatches.
Technical Context
The LTC3622IDE-23/5#PBF implements a constant-frequency, peak-current-mode control architecture with internal compensation and soft-start. Its two independent buck channels operate at a factory-set 2.25MHz switching frequency, supporting external synchronization over ±50% range and programmable 0° or 180° phase shift between SW1 and SW2 via the PHASE pin.
Each channel features selectable Burst Mode® (for <4µA single-channel IQ) or pulse-skipping operation (for lower ripple), integrated 0.6V reference with ±1% accuracy, and dual-level current limiting (full-scale or halved) controlled by the ILIM pin - all within a monolithic 14-pin DFN package with exposed thermal pad tied to GND.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | Fixed dual-output: Channel 1 = 5.0V ±1%, Channel 2 = 3.3V ±1% - eliminates external feedback resistors and reduces BOM count. |
| Switching Frequency | 2.25MHz (factory-trimmed, ±10% over temp) - enables use of small 2.2–4.7µH inductors and compact ceramic output capacitors. |
| Input Voltage Range | 2.7V to 17V - supports wide-input industrial rails, 12V automotive systems, and multi-cell Li-ion battery packs. |
| No-Load Quiescent Current | 5µA (both channels enabled), <4µA (single channel active) - extends battery runtime in always-on sensor nodes. |
| Output Current Capability | 1A per channel continuous - sufficient for powering microcontrollers, RF transceivers, and analog front-ends simultaneously. |
| Thermal Performance | θJA = 40°C/W (DFN package), TJMAX = 125°C - requires minimal PCB copper area for thermal relief in space-constrained designs. |
| Protection Features | UVLO (2.5V), OVLO (18.5V), PGOOD monitoring per channel, and 100% duty-cycle dropout operation - ensures robust startup and fault recovery. |
Pinout & Package
Package: 14-lead plastic DFN (3mm × 4mm), exposed pad (Pin 15) soldered to PCB ground for thermal and electrical performance. Operating junction temperature range: –40°C to 125°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1 (Pin 1) | Channel 1 input supply | Accepts 2.7V–17V; powers INTVCC LDO and Channel 1 power stage - must be decoupled with ≥10µF ceramic capacitor. |
| PGOOD1 (Pin 2) | Open-drain status indicator | Asserts high when VOUT1 is within ±7.5% of 5V; delays 32 clock cycles before deasserting on fault - used for system power sequencing. |
| MODE/SYNC (Pin 3) | Mode select & sync input | Tied to INTVCC for Burst Mode® (ultra-low IQ); grounded for pulse-skipping (low ripple); accepts external 0.4V–(VINTVCC–0.3V) clock for synchronization. |
| PHASE (Pin 4) | Inter-channel phase control | Ground = 0° phase shift; INTVCC = 180° shift (reduces input ripple); with external clock, enables edge-controlled phase modulation (e.g., 90°). |
| PGOOD2 (Pin 5) | Channel 2 status output | Independent open-drain signal for VOUT2 (3.3V) regulation - allows separate monitoring of dual-rail health. |
| ILIM (Pin 6) | Current limit configuration | GND = full 1.8A peak limit per channel; INTVCC = halved (0.9A); 1V bias sets Channel 1 full / Channel 2 halved - prevents inductor saturation under overload. |
| VIN2 (Pin 7) | Channel 2 input supply | Independent 2.7V–17V input - enables split-rail architectures (e.g., VIN1 = 12V, VIN2 = 5V) without inter-channel coupling. |
| SW2 (Pin 8) | Channel 2 switch node | Connects to low-side NMOS drain and high-side PMOS source - requires tight layout with low-inductance path to inductor and GND. |
| RUN2 (Pin 9) | Channel 2 enable control | Logic-high (>1.0V) activates Channel 2; must not float - enables independent power gating for subsystem sleep states. |
| FB2 (Pin 10) | Channel 2 feedback input | Internally connected to 3.3V divider - shorted to VOUT2 in fixed-output configuration; unused in LTC3622IDE-23/5#PBF. |
| INTVCC (Pin 11) | Internal LDO output | 3.6V ±0.15V, 100mA capable - powers gate drivers and logic; requires ≥1µF low-ESR ceramic bypass to GND. |
| FB1 (Pin 12) | Channel 1 feedback input | Internally connected to 5V divider - shorted to VOUT1 in fixed-output configuration; unused in LTC3622IDE-23/5#PBF. |
| RUN1 (Pin 13) | Channel 1 enable control | Logic-high (>1.0V) activates Channel 1 - supports staggered startup or independent rail control in multi-voltage systems. |
| SW1 (Pin 14) | Channel 1 switch node | Connects to Channel 1 power FETs - layout critical for EMI suppression; adjacent to GND (Pin 15) for minimal loop area. |
| GND (Pin 15) | Power and signal ground | Exposed thermal pad - must be soldered to solid PCB ground plane for thermal dissipation and noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Dual fixed-output configuration | Eliminates external feedback resistors for 5V/3.3V rails - reduces component count, layout area, and calibration risk in production. |
| Ultralow quiescent current | 5µA total (both channels idle) - enables >1-year battery life in coin-cell-powered sensors with periodic wake-up intervals. |
| Programmable phase relationship | 0° or 180° inter-channel phase shift - cuts input capacitor RMS current by up to 30% versus in-phase operation, reducing size and heating. |
| Integrated soft-start | 500µs monotonic ramp per channel - prevents inrush current and output overshoot during power-up or reset events. |
| Robust protection suite | UVLO, OVLO, PGOOD per channel, and 100% duty-cycle dropout - maintains regulation down to VIN ≈ VOUT and recovers cleanly after transient faults. |
| High-efficiency light-load modes | Burst Mode® (≤5µA IQ) and pulse-skipping (≤20mVpp ripple) - lets designers optimize for either runtime or signal integrity without hardware change. |
Applications
| Portable Handheld Scanners | Industrial IoT Edge Nodes |
|---|---|
Use Scenario: Battery-powered barcode scanner with ARM Cortex-M4 MCU, CMOS image sensor, and Bluetooth LE radio. IC Role / Device Role / Timing Role: Dual-output DC/DC converter supplying 5V to sensor interface and 3.3V to MCU/radio - replaces discrete LDOs and reduces heat in sealed enclosure. Use Value: 5µA no-load IQ extends 2000mAh Li-ion pack life from 3 weeks to >18 months in standby; 2.25MHz switching avoids audible noise in user-facing device. |
Use Scenario: Wireless vibration sensor node deployed on rotating machinery with 10-year battery target. IC Role / Device Role / Timing Role: Primary power management IC delivering regulated 3.3V to ultra-low-power MCU and 5V to MEMS accelerometer - operates across -40°C to +85°C ambient. Use Value: 100% duty-cycle dropout mode sustains 3.3V output as battery discharges from 4.2V to 3.4V; PGOOD signals enable predictive maintenance alerts on rail degradation. |
| Point-of-Load Power for FPGA I/O Banks | Medical Wearable Sensor Hub |
Use Scenario: Compact FPGA-based data acquisition module requiring clean, sequenced 3.3V and 5V rails for I/O banks and analog front-end. IC Role / Device Role / Timing Role: Dual-channel synchronous buck providing tightly regulated, low-noise supplies - RUN1/RUN2 pins enable precise power-up sequencing per FPGA spec. Use Value: 180° phase shift reduces input ripple by 40%, allowing smaller 10µF input caps instead of 22µF; ±1% VOUT accuracy meets FPGA VCCIO tolerance. |
Use Scenario: Skin-contact ECG/PPG patch with photodiode array, analog signal chain, and BLE SoC - constrained by volume and thermal limits. IC Role / Device Role / Timing Role: Single-chip solution generating 3.3V for digital core and 5V for analog bias - replaces two discrete regulators and saves >25mm² PCB area. Use Value: DFN package with exposed pad achieves 40°C/W θJA - keeps die temperature <65°C at full load inside silicone housing; Burst Mode® cuts average current to 2.1µA during sleep. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65270RGET | Adjustable outputs (0.6–5.5V), 2.2MHz, 1.2A per channel, 22µA IQ (both channels) | Requires external feedback resistors; higher IQ increases battery drain in always-on devices | Select when flexible VOUT tuning is needed and board space allows resistor network. |
| MP2491DS-LF-Z | Single 5V fixed output, 2.2MHz, 1A, 25µA IQ, no second channel or phase control | Cannot replace dual-rail functionality; lacks PGOOD2 and ILIM flexibility | Choose only if system needs only one of the two rails and cost is primary constraint. |
Compared with LTC3622IDE-23/5#PBF, TPS65270RGET offers adjustable outputs but doubles quiescent current and removes fixed-VOUT simplicity, while MP2491DS-LF-Z provides half the functionality - neither matches the integrated 5V/3.3V, ultralow-IQ, and phase-programmable capability of the LTC3622IDE-23/5#PBF in space- and battery-constrained dual-rail designs.
Availability
LTC3622IDE-23/5#PBF is available at Aetrix Electronics and suitable for portable handheld scanners, industrial IoT edge nodes, and medical wearable sensor hubs requiring stable component supply, long-term lifecycle support, and guaranteed parametric compliance across –40°C to +125°C.
Supply support for LTC3622IDE-23/5#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, communications, and healthcare markets.
The LTC3622IDE-23/5#PBF belongs to Analog Devices' Power by Linear™ family of high-efficiency, ultralow-quiescent-current DC/DC regulators - engineered specifically for battery-powered and energy-harvesting applications where runtime, thermal density, and reliability are critical.
FAQ
What are the fixed output voltages of the LTC3622IDE-23/5#PBF?
The LTC3622IDE-23/5#PBF provides factory-configured fixed outputs: Channel 1 delivers 5.0V ±1% and Channel 2 delivers 3.3V ±1%. These values are trimmed during production and do not require external feedback resistors - simplifying design and improving accuracy over temperature versus adjustable solutions.
Does the LTC3622IDE-23/5#PBF support external frequency synchronization?
Yes, the LTC3622IDE-23/5#PBF supports external clock synchronization via the MODE/SYNC pin. It accepts an external clock signal with amplitude from 0.4V to (VINTVCC – 0.3V) and locks to frequencies within ±50% of its nominal 2.25MHz switching frequency - enabling EMI reduction through spread-spectrum or fixed-frequency alignment.
How does the PHASE pin affect operation of the LTC3622IDE-23/5#PBF?
The PHASE pin on the LTC3622IDE-23/5#PBF selects inter-channel timing: grounding it sets 0° phase shift (in-phase switching), tying it to INTVCC sets 180° anti-phase operation - which halves input capacitor RMS current. With an external clock applied to MODE/SYNC, PHASE = INTVCC enables edge-controlled phase modulation (e.g., 90°) for optimal ripple cancellation.
What is the quiescent current of the LTC3622IDE-23/5#PBF under no-load conditions?
The LTC3622IDE-23/5#PBF draws 5µA total quiescent current when both channels are enabled and idle (Burst Mode® active). With only one channel enabled, IQ drops below 4µA - making it among the lowest-IQ dual buck regulators available for battery-critical applications like wireless sensors and wearables.
Can the LTC3622IDE-23/5#PBF operate with input voltage below 2.7V?
No - the absolute minimum input voltage for the LTC3622IDE-23/5#PBF is 2.7V, as specified in the Absolute Maximum Ratings and Electrical Characteristics tables. Below this, undervoltage lockout (UVLO) disables regulation; the part resumes operation only after VIN rises above 2.65V (typical) with 160mV hysteresis.
LTC3622IDE-23/5#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 14-WFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Fixed
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 3.3V, 5V
- Voltage - Output (Max):
- -
- Current - Output:
- 1A
- Frequency - Switching:
- 2.25MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-DFN (4x3)
LTC3622IDE-23/5#PBF FAQ
1.How can I place an order for LTC3622IDE-23/5#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3622IDE-23/5#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3622IDE-23/5#PBF reliable?
The price and inventory of LTC3622IDE-23/5#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3622IDE-23/5#PBF is usually 5 days.
3.What payment methods are accepted for LTC3622IDE-23/5#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3622IDE-23/5#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3622IDE-23/5#PBF?
LTC3622IDE-23/5#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3622IDE-23/5#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3622IDE-23/5#PBF?
For technical support, including LTC3622IDE-23/5#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3622IDE-23/5#PBF requirements.
6.How does Aetrix verify that LTC3622IDE-23/5#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3622IDE-23/5#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3622IDE-23/5#PBF meets industry standards.
7.What is the process for return or replacement of LTC3622IDE-23/5#PBF?
All LTC3622IDE-23/5#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3622IDE-23/5#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3622IDE-23/5#PBF part is unused and in its original packaging.
Return procedure for LTC3622IDE-23/5#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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