My Inquiry
My Account
Analog Devices Inc. LTC3633AEUFD-2#PBF
- Part No.:
- LTC3633AEUFD-2#PBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC3633AEUFD-2#PBF.pdf
- Description:
- IC REG BUCK ADJ 3A DL 28QFN
- Quantity:
- Payment:
- Shipping:
Inventory:542
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
LTC3633AEUFD-2#PBF from Analog Devices (formerly Linear Technology) is a dual-channel monolithic synchronous step-down regulator delivering 3A per channel across 3.6V–20V input, with programmable 500kHz–4MHz switching frequency and 180° phase-shift capability for reduced input/output ripple. It employs current-mode controlled on-time architecture, supports Burst Mode® or forced continuous operation, and integrates power-good status outputs for point-of-load power in battery-powered instruments and distributed systems.
For engineers reviewing the LTC3633AEUFD-2#PBF datasheet, LTC3633AEUFD-2#PBF pinout, LTC3633AEUFD-2#PBF application, or LTC3633AEUFD-2#PBF equivalent, key selection criteria include its dual 3A output capability, 0.6V reference enabling sub-1V regulation, phase-selectable operation, input overvoltage lockout at 22.5V, and QFN-28 package thermal performance (θJA = 43°C/W).
Technical Context
The LTC3633AEUFD-2#PBF uses a constant-frequency controlled on-time current-mode architecture with internal PLL synchronization, enabling stable high-frequency operation (up to 4MHz) while maintaining fast transient response under wide input/output ratios. Its two independent buck channels share no power stage components but synchronize via MODE/SYNC or PHMODE pins.
Each channel features independent RUN enable inputs, dedicated VON pins for on-time scaling (0.6V–6V range), separate ITH compensation nodes, and open-drain PGOOD outputs with ±8% fault threshold and 40µs filter time. Input overvoltage protection triggers at 22.5V rising edge and releases at 21.5V falling edge per PVIN pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.6V to 20V - supports single Li-ion stack (3.6V min) and 12V/20V industrial rails without external pre-regulation. |
| Output Current per Channel | 3A continuous - enables dual 3.3V/5V PoL rails for FPGA core/I/O or microprocessor + peripheral supplies. |
| Switching Frequency Range | 500kHz to 4MHz - adjustable via RT resistor; 2MHz default when RT tied to INTVCC for compact magnetics. |
| Feedback Reference Voltage | 0.6V ±1% - allows precise low-VOUT regulation down to 0.6V with standard resistor dividers. |
| Phase Shift Configuration | Selectable 0° or 180° - reduces input capacitor RMS current and output voltage ripple when channels operate out-of-phase. |
| Protection Features | Short-circuit, overtemperature, PVIN overvoltage (22.5V trip), and PGOOD with ±8% detection window - ensures robust system-level fault handling. |
| Efficiency | Up to 95% - achieved at mid-load with optimized inductor/capacitor selection; Burst Mode® extends light-load efficiency. |
Pinout & Package
Package: 28-lead (4mm × 5mm) plastic QFN with exposed PGND pad (Pin 29), θJA = 43°C/W. Exposed pad must be soldered to PCB for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGOOD1 (Pin 1) | Channel 1 power-good status output | Open-drain signal pulled low if VFB1 deviates >±8% from 0.6V; releases at ±5% with 40µs filter - enables sequenced system startup. |
| PHMODE (Pin 2) | Phase select control input | Tie to GND for in-phase operation; tie to INTVCC for 180° out-of-phase - reduces input capacitor stress and EMI peak amplitude. |
| RUN1 (Pin 3) | Channel 1 enable input | Active-high logic: >1.22V enables channel; <1.01V disables - supports independent sequencing and standby control. |
| MODE/SYNC (Pin 4) | Mode selection & external clock input | Ground = forced continuous mode; float/INTVCC = Burst Mode®; driven clock = synchronization with PLL lock - enables system-level timing coordination. |
| RT (Pin 5) | Oscillator frequency programming node | Resistor to SGND sets fSW from 500kHz–4MHz; tied to INTVCC defaults to ~2MHz - balances size vs. efficiency trade-offs. |
| RUN2 (Pin 6) | Channel 2 enable input | Independent enable control identical to RUN1 - allows staggered startup or dynamic channel disable for power gating. |
| SGND (Pin 7) | Signal ground reference | Low-noise analog ground for feedback divider, RT, and compensation networks - critical for stability and noise immunity. |
| PGOOD2 (Pin 8) | Channel 2 power-good status output | Functionally identical to PGOOD1 but for Channel 2 - enables independent monitoring of dual regulated rails. |
| VFB2 (Pin 9) | Channel 2 feedback input | Connects to resistor divider to set output voltage; referenced to 0.6V internal bandgap - supports precision regulation with external resistors. |
| TRACKSS2 (Pin 10) | Channel 2 tracking/soft-start input | Sub-0.6V voltage forces output tracking; internal 1.4µA pull-up enables soft-start with external capacitor - prevents inrush during power-up. |
| ITH2 (Pin 11) | Channel 2 error amplifier output | Compensation node: connect RC network for loop stability; tie to INTVCC for internal compensation - simplifies design for standard applications. |
| VON2 (Pin 12) | Channel 2 on-time scaling input | Tie to VOUT2 to make on-time proportional to output voltage (0.6V–6V range) - maintains constant frequency across VOUT variations. |
| SW2 (Pins 13,14) | Channel 2 switch node | Connects to external inductor; swings from diode-drop below GND to PVIN2 - requires low-inductance layout for MOSFET switching integrity. |
| PVIN2 (Pins 15,16) | Channel 2 power input | Independent 3.6V–20V supply for Channel 2 power MOSFETs - enables asymmetric input rail configurations (e.g., 12V + 5V). |
| BOOST2 (Pin 17) | Channel 2 bootstrap supply | Connects to (+) terminal of bootstrap capacitor; swings up to PVIN2 + INTVCC - ensures high-side gate drive above PVIN2. |
| INTVCC (Pin 18) | Internal 3.3V regulator output | Powers internal logic and drivers; requires ≥1µF ceramic decoupling to PGND - disabled when both RUN pins are low. |
| BOOST1 (Pin 19) | Channel 1 bootstrap supply | Identical function to BOOST2 but for Channel 1 - requires separate bootstrap capacitor per channel. |
| SVIN (Pin 20) | Signal input supply | Powers internal LDO for INTVCC; accepts 3.6V–20V - may be tied to PVIN1/PVIN2 or separate low-noise source. |
| PVIN1 (Pins 21,22) | Channel 1 power input | Independent 3.6V–20V supply for Channel 1 power MOSFETs - supports dual-input architectures with different source impedances. |
| SW1 (Pins 23,24) | Channel 1 switch node | Identical to SW2 but for Channel 1 - requires symmetric layout for matched channel performance. |
| VON1 (Pin 25) | Channel 1 on-time scaling input | Functionally identical to VON2 - enables independent on-time scaling per channel for mismatched output voltages. |
| ITH1 (Pin 26) | Channel 1 error amplifier output | Identical to ITH2 - supports independent loop compensation for each channel. |
| TRACKSS1 (Pin 27) | Channel 1 tracking/soft-start input | Identical to TRACKSS2 - enables independent soft-start timing per rail. |
| VFB1 (Pin 28) | Channel 1 feedback input | Identical to VFB2 - supports independent output voltage programming. |
| PGND (Pin 29) | Power ground | Exposed pad; connects to (–) terminals of CIN and COUT - mandatory solder connection for thermal dissipation and low-impedance return path. |
Key Features
| Feature | Design Value |
|---|---|
| Dual 3A synchronous buck channels | Enables compact dual-rail PoL conversion without external controllers or discrete MOSFETs - reduces BOM count and layout area. |
| Controlled on-time current-mode architecture | Delivers fast load transient response (<10µs recovery) and stable operation across wide VIN/VOUT ratios - ideal for high-step-down applications. |
| Selectable 180° phase shift | Halves input capacitor RMS current and reduces peak input ripple by √2 - lowers required capacitance and EMI filtering complexity. |
| Burst Mode® operation | Maintains >85% efficiency at 1mA load while reducing quiescent current to 500µA - extends battery life in portable instrumentation. |
| Integrated 0.6V reference and PGOOD outputs | Enables accurate low-VOUT regulation and system-level power sequencing without external supervisors or references. |
| Input overvoltage lockout (22.5V) | Protects internal 30V-rated MOSFETs against transients on 12V/20V rails - eliminates need for external TVS or crowbar circuits. |
Applications
| Battery-Powered Test Equipment | FPGA Core & I/O Power Delivery |
|---|---|
|
Use Scenario: Portable oscilloscope or multimeter requiring isolated 1.2V FPGA core and 3.3V interface rails from single Li-ion battery pack. IC Role / Device Role / Timing Role: Dual-channel buck regulator providing independently enabled, tracked, and monitored 1.2V/3.3V outputs with soft-start sequencing. Use Value: Eliminates need for two discrete regulators; 180° phase shift cuts input capacitor size by 30%; Burst Mode® extends runtime at standby. |
Use Scenario: High-speed digital board where FPGA core voltage must ramp before I/O banks to prevent configuration errors. IC Role / Device Role / Timing Role: Dual-output regulator with TRACKSS1/2 pins enabling precise voltage ramp alignment and independent PGOOD signaling. Use Value: Ensures reliable FPGA configuration via hardware-enforced sequencing; 0.6V reference supports modern sub-1V core voltages. |
| Distributed Telecom Power System | Industrial PLC CPU Module |
|
Use Scenario: Remote radio unit powered from 48V intermediate bus, requiring 5V analog front-end and 3.3V digital logic rails. IC Role / Device Role / Timing Role: Dual buck converter operating from 12V derived from 48V bus, with MODE/SYNC pin synchronized to system clock. Use Value: Synchronization eliminates beat frequencies; 95% efficiency at full load reduces thermal load in sealed enclosures. |
Use Scenario: Programmable logic controller module needing robust 24V-to-5V/3.3V conversion with fault reporting for safety-critical operation. IC Role / Device Role / Timing Role: Dual regulator with independent PGOOD outputs feeding watchdog circuitry and overvoltage protection on each PVIN pin. Use Value: Meets IEC 61000-4-5 surge immunity requirements via integrated 22.5V OVLO; PGND-exposed QFN aids thermal management in convection-cooled chassis. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8866GQ-Z (Monolithic Power Systems) | Single 6A channel vs. dual 3A; fixed 500kHz/1MHz/2MHz options; no phase shift or external sync; 2.5V–18V input | Not suitable for independent dual-rail sequencing or 180° ripple cancellation; limited to single-output designs | Select only when dual independent outputs and phase control are unnecessary and higher single-channel current suffices. |
| TPS544B25RTER (Texas Instruments) | Dual 4A/channel; 4.5V–18V input; supports PMBus; no integrated 0.6V reference (requires external); larger 32-pin QFN | Requires external reference and PMBus infrastructure; lacks Burst Mode®; higher pin count increases layout complexity | Prefer when digital telemetry, margining, or tighter output tolerance (<±0.5%) are required, and system supports PMBus protocol. |
Compared with MP8866GQ-Z and TPS544B25RTER, the LTC3633AEUFD-2#PBF uniquely delivers true dual independent 3A channels with 180° phase shift, integrated 0.6V reference, Burst Mode® for ultra-low IQ, and QFN-28 footprint - making it optimal for space-constrained, battery-sensitive, or ripple-critical dual-rail applications.
Availability
LTC3633AEUFD-2#PBF is available at Aetrix Electronics and suitable for battery-powered instruments, distributed telecom power systems, and industrial PLC CPU modules requiring stable component supply with guaranteed long-term availability.
Supply support for LTC3633AEUFD-2#PBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains its high-performance power management portfolio with rigorous automotive and industrial qualification standards.
The LTC3633A family targets high-efficiency, dual-output point-of-load regulation in space-constrained systems where thermal performance, light-load efficiency, and precise sequencing are critical - especially in portable test equipment and telecom infrastructure.
FAQ
What is the maximum input voltage rating for LTC3633AEUFD-2#PBF?
The LTC3633AEUFD-2#PBF has an absolute maximum PVIN rating of 20V, with overvoltage lockout triggering at 22.5V (rising edge). Operation above 20V risks permanent damage; the 22.5V OVLO is a protective feature that suspends switching until PVIN falls below 21.5V. Always limit applied PVIN to ≤20V per datasheet specifications.
Does LTC3633AEUFD-2#PBF support output voltage tracking between channels?
Yes, LTC3633AEUFD-2#PBF supports precise output voltage tracking using the TRACKSS1 and TRACKSS2 pins. Applying a shared ramp voltage (e.g., from a DAC or RC network) to both pins forces each channel's FB pin to servo to that voltage, enabling simultaneous, ratio-matched startup. This is confirmed in the Applications Information section and typical startup waveforms.
What is the thermal resistance (θJA) of the LTC3633AEUFD-2#PBF QFN package?
The LTC3633AEUFD-2#PBF in the 28-lead (4mm × 5mm) QFN package has a specified junction-to-ambient thermal resistance (θJA) of 43°C/W, measured with the exposed PGND pad properly soldered to a 4-layer PCB with 2-in² copper area. This value assumes standard JEDEC test conditions and is critical for calculating maximum allowable power dissipation at target ambient temperatures.
Can LTC3633AEUFD-2#PBF operate with only one channel enabled?
Yes, LTC3633AEUFD-2#PBF supports independent channel operation: pulling RUN1 low disables Channel 1 while Channel 2 remains fully functional if RUN2 is high, and vice versa. Both channels share SVIN and INTVCC but have separate PVIN, SW, BOOST, and feedback paths - enabling flexible power partitioning in partial-load scenarios.
What is the minimum on-time specification for LTC3633AEUFD-2#PBF?
The LTC3633AEUFD-2#PBF has a minimum on-time of 20ns (typical) at VON = 0.6V and PVIN = 4V, as specified in the Electrical Characteristics table. This enables high-frequency operation (up to 4MHz) even at high step-down ratios (e.g., 12V-to-1.2V), preserving duty cycle headroom and regulation stability.
LTC3633AEUFD-2#PBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 3.6V
- Voltage - Input (Max):
- 20V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 6V
- Current - Output:
- 3A
- Frequency - Switching:
- 500kHz ~ 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LTC3633AEUFD-2#PBF FAQ
1.How can I place an order for LTC3633AEUFD-2#PBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3633AEUFD-2#PBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3633AEUFD-2#PBF reliable?
The price and inventory of LTC3633AEUFD-2#PBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3633AEUFD-2#PBF is usually 5 days.
3.What payment methods are accepted for LTC3633AEUFD-2#PBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3633AEUFD-2#PBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3633AEUFD-2#PBF?
LTC3633AEUFD-2#PBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3633AEUFD-2#PBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3633AEUFD-2#PBF?
For technical support, including LTC3633AEUFD-2#PBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3633AEUFD-2#PBF requirements.
6.How does Aetrix verify that LTC3633AEUFD-2#PBF is sourced from the original manufacturer or authorized distributors?
All LTC3633AEUFD-2#PBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3633AEUFD-2#PBF meets industry standards.
7.What is the process for return or replacement of LTC3633AEUFD-2#PBF?
All LTC3633AEUFD-2#PBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3633AEUFD-2#PBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3633AEUFD-2#PBF part is unused and in its original packaging.
Return procedure for LTC3633AEUFD-2#PBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
LTC3633AEUFD-2#PBF Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
