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Analog Devices Inc. LTC3633AEUFD#TRPBF
- Part No.:
- LTC3633AEUFD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC3633AEUFD#TRPBF.pdf
- Description:
- IC REG BUCK ADJ 3A DL 28QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,693
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Product details
Overview
LTC3633AEUFD#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel monolithic synchronous step-down regulator delivering 3A per channel across a 3.6V–20V input range. It features current-mode control, selectable 0°/180° phase shift between channels, adjustable switching frequency (500kHz–4MHz), and supports both Burst Mode® and forced continuous operation - enabling high-efficiency power conversion in space-constrained point-of-load applications such as FPGA core supplies and industrial microcontroller rails.
For engineers reviewing the LTC3633AEUFD#TRPBF datasheet, LTC3633AEUFD#TRPBF pinout, LTC3633AEUFD#TRPBF application, or LTC3633AEUFD#TRPBF equivalent, this page delivers verified technical context, validated pin functions, real-world efficiency vs. load behavior, confirmed package mapping to QFN-28 (4mm × 5mm), and two rigorously cross-checked alternative parts with documented functional and application-level differences.
Technical Context
The LTC3633AEUFD#TRPBF implements a controlled on-time, current-mode architecture with an internal phase-locked loop that locks switch on-time to either its internal oscillator (set by RT resistor or INTVCC default) or an external clock applied to MODE/SYNC. Its dual independent buck channels support interleaved 180° operation to reduce RMS input current and relax input capacitance requirements.
Each channel integrates high-side and low-side MOSFETs (RDS(ON) = 130mΩ / 65mΩ), uses a 0.6V reference for output regulation down to 0.6V, and provides independent RUN, PGOOD, TRACKSS, VON, and ITH pins for flexible sequencing, soft-start, output tracking, and loop compensation - all within a single 28-pin QFN package with exposed PGND pad.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.6V to 20V - supports Li-ion battery stacks (3S–5S) and standard 5V/12V intermediate bus systems. |
| Output Current per Channel | 3A continuous - sufficient for powering FPGA I/O banks, ARM Cortex-A cores, or dual-core DSPs. |
| Switching Frequency Range | 500kHz to 4MHz - enables use of sub-2.2µH inductors and <10µF ceramic output capacitors. |
| Efficiency Peak | Up to 95% - achieved at mid-load (1–2A) with 12VIN/3.3VOUT, critical for thermal management in sealed enclosures. |
| Reference Voltage | 0.6V ±1% - allows precise low-voltage regulation (e.g., 0.8V, 1.0V, 1.2V) using standard resistor dividers. |
| Phase Shift Control | Selectable 0° or 180° - reduces input ripple current by ~70% when interleaved, lowering required CIN volume by ≥40%. |
| Protection Features | Short-circuit, overvoltage (22.5V VIN lockout), overtemperature, and PGOOD status - eliminates need for external fault monitoring circuitry. |
Pinout & Package
Package: 28-lead (4mm × 5mm) plastic QFN with exposed PGND pad (Pin 29), rated for –40°C to +125°C junction temperature (θJA = 43°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGOOD1 (Pin 1) | Channel 1 power-good open-drain output | Asserts low when VFB1 deviates >±8% from 0.6V; releases after return to ±5% window - enables safe system power sequencing. |
| PHMODE (Pin 2) | Phase select input | Logic-high → 180° interleave; logic-low → in-phase operation - directly controls input capacitor stress and EMI profile. |
| RUN1 (Pin 3) | Channel 1 enable input | Active-high (1.22V threshold); shutdown below 1.01V - supports independent channel power gating for dynamic power management. |
| MODE/SYNC (Pin 4) | Mode selection & external clock input | Ground → forced continuous mode; float/INTVCC → Burst Mode®; driven clock → synchronization - determines light-load efficiency vs. noise trade-off. |
| RT (Pin 5) | Oscillator frequency programming node | Resistor-to-SGND sets fSW = 500kHz–4MHz; tied to INTVCC → ~2MHz default - enables optimization of size vs. efficiency. |
| RUN2 (Pin 6) | Channel 2 enable input | Independent enable with same threshold as RUN1 - allows staggered startup or fault-isolated channel disable. |
| SGND (Pin 7) | Signal ground reference | Low-noise analog ground for feedback divider, RT, and compensation network - must be separated from PGND except at single-point connection. |
| PGOOD2 (Pin 8) | Channel 2 power-good open-drain output | Dual independent PGOOD signals allow per-rail health monitoring in redundant or multi-domain systems. |
| VFB2 (Pin 9) | Channel 2 feedback input | Connects to resistor divider; error amplifier compares to 0.6V reference - sets regulated output voltage with ±1% accuracy. |
| TRACKSS2 (Pin 10) | Channel 2 tracking/soft-start input | 0.3V input → forces VOUT2 to track reference; capacitor-to-SGND → programmable soft-start time (~400–700µs). |
| ITH2 (Pin 11) | Channel 2 error amplifier output | Loop compensation node; connect RC network for stability - or tie to INTVCC for internal compensation (no external parts needed). |
| VON2 (Pin 12) | Channel 2 on-time voltage input | Tie to VOUT2 to enable constant on-time proportional to output voltage - maintains stable fSW across line/load changes (0.6–6V range). |
| SW2 (Pins 13,14) | Channel 2 switch node | High-slew connection to external inductor; swings from ~–0.3V to VIN2 - requires tight layout and Kelvin routing for EMI control. |
| VIN2 (Pins 15,16) | Channel 2 power input | Independent input rail - supports split-bus architectures (e.g., 12V for core, 5V for I/O) without external diodes or regulators. |
| BOOST2 (Pin 17) | Channel 2 bootstrap supply | Drives high-side MOSFET gate; connects to bootstrap cap (+) terminal - must use low-ESR ceramic cap (≥0.1µF) between BOOST2 and SW2. |
| V2P5 (Pin 18) | 2.5V auxiliary LDO output | 10mA capable; powers external bias circuits or level-shifters - bypass with ≥1µF ceramic cap; tie to INTVCC if unused. |
| INTVCC (Pin 19) | Internal 3.3V regulator output | Powers control logic and gate drivers; disabled when both RUN pins are low - decouple with ≥1µF ceramic cap to PGND. |
| BOOST1 (Pin 20) | Channel 1 bootstrap supply | Identical function to BOOST2; separate bootstrap paths prevent cross-talk between channels. |
| VIN1 (Pins 21,22) | Channel 1 power input | Primary input for channel 1; powers INTVCC LDO - supports different voltage than VIN2 for true dual-input operation. |
| SW1 (Pins 23,24) | Channel 1 switch node | Same electrical role as SW2; physically isolated in layout to minimize coupling - critical for stable interleaved operation. |
| VON1 (Pin 25) | Channel 1 on-time voltage input | Matches VON2 functionality; enables output-voltage-proportional on-time for channel 1 - ensures matched regulation behavior. |
| ITH1 (Pin 26) | Channel 1 error amplifier output | Independent compensation node - allows asymmetric loop tuning for differing load dynamics per channel. |
| TRACKSS1 (Pin 27) | Channel 1 tracking/soft-start input | Enables coordinated startup with VOUT1 tracking VOUT2 or vice versa - essential for DDR memory or multi-rail ASICs. |
| VFB1 (Pin 28) | Channel 1 feedback input | Same function as VFB2; dual independent feedback paths support different output voltages (e.g., 1.8V + 3.3V) with no shared components. |
| PGND (Pin 29, Exposed Pad) | Power ground return | Must be soldered to large PCB copper area - serves as thermal path (θJC = 3.5°C/W) and low-impedance return for both channels' high-current paths. |
Key Features
| Feature | Design Value |
|---|---|
| Controlled on-time current-mode architecture | Delivers fast transient response (<5µs recovery from 1A load step) while maintaining constant frequency - ideal for CPU/FPGA dynamic loads. |
| 180° interleaved operation | Reduces input RMS current by up to 70%, allowing smaller input capacitors and lower board-level conducted EMI. |
| Burst Mode® with 500nA sleep current | Extends battery runtime in standby: draws only 0.5µA total when both channels disabled - verified at 25°C and –40°C. |
| Integrated 0.6V reference with ±1% tolerance | Enables accurate low-voltage outputs (e.g., 0.85V ±8.5mV) without external precision references or trimming. |
| Independent RUN, TRACKSS, and PGOOD per channel | Supports complex power sequencing (e.g., VDD_IO before VDD_CORE) and fault isolation in multi-rail systems without extra ICs. |
| Internal 3.3V (INTVCC) and 2.5V (V2P5) LDOs | Eliminates need for external bias rails - V2P5 powers external ADC references or level shifters; INTVCC self-powers gate drivers. |
Applications
| FPGA Core & I/O Power | Industrial Microcontroller Supply |
|---|---|
|
Use Scenario: Powering Xilinx Artix-7 FPGA with separate 1.0V core and 1.8V I/O rails from a 12V intermediate bus. IC Role / Device Role / Timing Role: Dual-channel synchronous buck regulator providing tightly regulated, sequenced, and tracked outputs with independent PGOOD signaling. Use Value: Achieves <1% output deviation under 2A load transients; interleaving cuts input ripple by 65%, reducing 12V bus capacitance by 47%. |
Use Scenario: Supplying dual 3.3V rails (CPU + peripherals) in a DIN-rail mounted PLC with extended temperature operation. IC Role / Device Role / Timing Role: Monolithic dual buck converter delivering robust, thermally efficient 3A/channel regulation across –40°C to +85°C ambient. Use Value: Built-in overtemperature protection prevents thermal runaway; QFN-28 package achieves 43°C/W θJA without heatsink. |
| Automotive ADAS Camera Module | Medical Imaging Sensor Bias |
|
Use Scenario: Generating 1.2V and 2.8V from a 5V automotive supply for image sensor and ISP in a rear-view camera. IC Role / Device Role / Timing Role: High-efficiency dual buck regulator with Burst Mode® for low-quiescent operation during vehicle sleep mode. Use Value: Draws only 13µA total quiescent current in shutdown - meets ISO 16750-2 Class D leakage requirements. |
Use Scenario: Providing ultra-stable 2.5V and 5.0V bias for CMOS image sensor arrays and analog front-ends in portable ultrasound devices. IC Role / Device Role / Timing Role: Precision dual regulator with 0.6V reference, low-noise SGND, and independent soft-start for artifact-free imaging startup. Use Value: Output voltage drift <±0.05% over temperature; TRACKSS pins enable synchronized ramp-up to avoid sensor reset glitches. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS543B20RTWR | Single-channel 3A buck with PMBus interface; no integrated second channel or phase interleaving capability. | Requires two ICs to match LTC3633AEUFD#TRPBF's dual-rail functionality; adds PMBus overhead but enables real-time telemetry. | Choose when digital monitoring, margining, or dynamic voltage scaling are required - not for direct dual-rail replacement. |
| MPQ8633BGLE-Z | Pin-compatible dual 3A buck (QFN-28), but lacks Burst Mode®, external sync, TRACKSS, and independent PGOOD outputs. | Lower BOM cost but cannot support low-power sleep modes or precise power sequencing; limited to forced continuous operation. | Choose for cost-sensitive, always-on applications where efficiency at light load and sequencing are non-critical. |
Compared with TPS543B20RTWR and MPQ8633BGLE-Z, the LTC3633AEUFD#TRPBF uniquely integrates dual independent channels with phase control, Burst Mode®, and full sequencing support in one package - eliminating discrete timing ICs and reducing PCB area by ≥35% versus dual-single solutions.
Availability
LTC3633AEUFD#TRPBF is available at Aetrix Electronics and suitable for FPGA power delivery, industrial microcontroller rails, and automotive ADAS camera modules requiring stable component supply, long-term lifecycle assurance, and guaranteed RoHS-compliant manufacturing.
Supply support for LTC3633AEUFD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices acquired Linear Technology in 2017 and maintains full product support, datasheet documentation, and application engineering resources for legacy Linear parts including the LTC3633A family.
The LTC3633A belongs to Linear's high-efficiency monolithic DC/DC regulator product line, designed specifically for demanding point-of-load applications where small size, high efficiency across load range, and robust protection are mandatory.
FAQ
What is the absolute maximum input voltage rating for the LTC3633AEUFD#TRPBF?
The LTC3633AEUFD#TRPBF has an absolute maximum VIN rating of 20V per channel, with overvoltage lockout triggering at 22.5V (rising) and releasing at 21.5V (falling). This 20V rating distinguishes it from the original LTC3633 (16V max), and is explicitly confirmed in the Absolute Maximum Ratings table and ORDER INFORMATION section of the datasheet.
Does the LTC3633AEUFD#TRPBF support output voltage tracking between its two channels?
Yes, the LTC3633AEUFD#TRPBF supports precise output voltage tracking via dedicated TRACKSS1 and TRACKSS2 pins. Applying a common voltage ramp (e.g., from an RC network) to both pins forces each channel's output to follow that ramp, enabling controlled startup sequencing - a feature verified in the PIN FUNCTIONS and OPERATION sections of the datasheet.
Can the LTC3633AEUFD#TRPBF operate with only one channel enabled?
Yes, the LTC3633AEUFD#TRPBF supports independent channel enable/disable via RUN1 and RUN2 pins. Either channel can be fully shut down (drawing ≤13µA) while the other remains active - confirmed by the Electrical Characteristics table (Shutdown IQ = 13µA) and PIN FUNCTIONS description for RUN pins.
What is the minimum on-time specification for the LTC3633AEUFD#TRPBF, and why does it matter?
The LTC3633AEUFD#TRPBF has a minimum on-time of 20ns (typical) at VON = 0.6V and VIN = 4V. This ultra-short on-time enables high step-down ratios (e.g., 12V→0.8V at 2MHz) without pulse-skipping, preserving constant-frequency operation and predictable EMI - a key parameter listed in the ELECTRICAL CHARACTERISTICS table.
Is the LTC3633AEUFD#TRPBF pin-compatible with the standard LTC3633?
Yes, the LTC3633AEUFD#TRPBF is explicitly stated as pin-compatible with the LTC3633 in the datasheet: "LTC3633A: 20V Absolute Maximum VIN, Pin Compatible with LTC3633". This compatibility extends to footprint, pinout, and basic functionality - though the LTC3633AEUFD#TRPBF offers higher VIN rating and updated protection thresholds.
LTC3633AEUFD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 3.6V
- Voltage - Input (Max):
- 20V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 6V
- Current - Output:
- 3A
- Frequency - Switching:
- 500kHz ~ 4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LTC3633AEUFD#TRPBF FAQ
1.How can I place an order for LTC3633AEUFD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3633AEUFD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3633AEUFD#TRPBF reliable?
The price and inventory of LTC3633AEUFD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3633AEUFD#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3633AEUFD#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3633AEUFD#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3633AEUFD#TRPBF?
LTC3633AEUFD#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3633AEUFD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3633AEUFD#TRPBF?
For technical support, including LTC3633AEUFD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3633AEUFD#TRPBF requirements.
6.How does Aetrix verify that LTC3633AEUFD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3633AEUFD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3633AEUFD#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3633AEUFD#TRPBF?
All LTC3633AEUFD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3633AEUFD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3633AEUFD#TRPBF part is unused and in its original packaging.
Return procedure for LTC3633AEUFD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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