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Analog Devices Inc. LTC3634IUFD#TRPBF
- Part No.:
- LTC3634IUFD#TRPBF
- Manufacturer:
- Analog Devices Inc.
- Category:
- Special Purpose Regulators
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
LTC3634IUFD#TRPBF.pdf
- Description:
- IC REG CONV DDR 2OUT 28QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,474
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Product details
Overview
LTC3634IUFD#TRPBF from Analog Devices (formerly Linear Technology) is a dual-channel monolithic synchronous step-down regulator optimized for DDR1/DDR2/DDR3 memory power supplies, delivering ±3A per channel at VDDQ = 1.8V and VTT = 0.9V from a 3.6V–15V input. It integrates independent control loops, VTTR reference buffer (±10mA, 0.5×VDDQIN), and 180° out-of-phase operation to reduce input RMS current in point-of-load systems.
For engineers reviewing the LTC3634IUFD#TRPBF datasheet, LTC3634IUFD#TRPBF pinout, LTC3634IUFD#TRPBF application, or LTC3634IUFD#TRPBF equivalent, key selection criteria include its controlled on-time architecture enabling stable 12V-to-0.9V conversion at up to 4MHz, ±1.6% VTTR accuracy at 0.75V, dual PGOOD outputs with 15mV hysteresis, and QFN-28 (4mm × 5mm) thermal performance (θJA = 43°C/W).
Technical Context
The LTC3634IUFD#TRPBF employs current-mode control with valley-current sensing via bottom-FET RDS(ON) and a programmable on-time one-shot timer synchronized to SW node edges. Its dual-loop architecture separates VDDQ regulation (0.6V internal reference) from VTT regulation (VTTR = 0.5×VDDQIN reference), enabling independent output tracking and termination.
Phase shift is digitally selected via PHMODE pin (0V → 90°, INTVCC → 180°), while MODE/SYNC supports Burst Mode® on Channel 1 and external clock synchronization up to 4MHz. Input overvoltage lockout (17.5V rising) and thermal shutdown (TJ > 150°C) provide system-level protection without external circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.6V to 15V - supports direct connection to 5V/12V rails and battery-backed DDR systems without pre-regulation. |
| Output Current per Channel | ±3A - delivers full sink/source capability for DDR VTT bus termination under dynamic load transients. |
| Switching Frequency Range | 500kHz to 4MHz - adjustable via RT resistor; enables optimization of inductor size (e.g., 0.82µH at 2MHz) vs. efficiency. |
| VTTR Accuracy | ±1.6% at 0.75V - ensures precise DDR reference voltage matching across temperature (–40°C to 125°C). |
| Efficiency | Up to 95% at 3A - achieved via low RDS(ON) top/bottom switches (130mΩ/65mΩ) and synchronous rectification. |
| Package Thermal Resistance | θJA = 43°C/W - enabled by exposed PGND pad soldered to PCB, critical for sustained ±3A operation in compact layouts. |
| Protection Features | Input overvoltage lockout (17.5V), short-circuit protection, and overtemperature shutdown - eliminates need for external fault management circuitry. |
Pinout & Package
Package: 28-pin (4mm × 5mm) plastic QFN with exposed PGND pad (Pin 29), rated for –40°C to 125°C operating junction temperature.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PGOOD1 / PGOOD2 | Open-drain power-good status outputs | Assert low when VFB1 deviates >±8% from 0.6V or VFB2 deviates >±8% from VTTR; 15mV hysteresis prevents noise-induced glitches. |
| PHMODE | Phase select input | Logic-high (INTVCC) forces 180° channel interleaving; reduces input capacitor RMS current and supply noise in multi-rail systems. |
| RUN1 / RUN2 | Channel enable inputs | Enable above 1.22V (typical); shutdown below 1.01V - supports independent sequencing of VDDQ and VTT rails during power-up/down. |
| VDDQIN | External reference input for Channel 2 | Sets VTTR = 0.5×VDDQIN; allows VTT regulation to track VDDQ variations (e.g., during DDR voltage scaling). |
| VTTR | Buffered reference output | Low-noise ±10mA source/sink capable of driving DDR VREF pins directly; stable with ≤0.01µF capacitive load. |
| ITH1 / ITH2 | Error amplifier compensation outputs | Interface with RC networks to set loop bandwidth and phase margin; critical for stability under ±3A load steps. |
| SW1 / SW2 | Switch node connections | High dv/dt nodes connecting to external inductors; require tight layout to minimize EMI and switching losses. |
| PGND (Pin 29) | Power ground terminal | Exposed thermal pad must be soldered to PCB plane - provides primary thermal path and low-impedance return for high di/dt currents. |
Key Features
| Feature | Design Value |
|---|---|
| Controlled on-time architecture | Enables stable 12V-to-0.9V conversion at 2MHz+ without external compensation, reducing BOM count and layout sensitivity. |
| Dual independent regulation loops | Separate VDDQ (0.6V reference) and VTT (VTTR-referenced) control enables simultaneous DDR supply and termination with matched transient response. |
| 180° out-of-phase operation | Halves peak input current ripple vs. in-phase operation, allowing smaller input bulk capacitors and lower EMI filter requirements. |
| Integrated VTTR buffer | Eliminates need for external op-amp or reference IC to generate DDR-compliant VREF, saving board space and cost. |
| Burst Mode® on Channel 1 | Improves light-load efficiency (<10mA) by disabling switching and entering sleep mode - critical for standby power compliance. |
Applications
| DDR Memory Power Supply | Industrial Embedded Controller |
|---|---|
|
Use Scenario: Powering DDR2/DDR3 SDRAM in FPGA-based industrial controllers requiring strict VDDQ/VTT tracking during burst reads/writes. IC Role / Device Role / Timing Role: Dual-output regulator generating tightly coupled 1.8V VDDQ and 0.9V VTT rails with <100ns transient response to 3A load steps. Use Value: VTTR = 0.5×VDDQIN ensures VTT tracks VDDQ variations across temperature and process, maintaining DDR signal integrity per JEDEC spec. |
Use Scenario: Point-of-load regulation for memory subsystems in railway signaling equipment operating from 12V nominal battery input with wide temperature range. IC Role / Device Role / Timing Role: High-efficiency dual buck converter delivering regulated 1.8V/0.9V rails with integrated overvoltage (17.5V) and thermal protection. Use Value: QFN-28 package with θJA = 43°C/W enables convection-cooled operation at full ±3A load in sealed enclosures. |
| Telecom Baseband Unit | Medical Imaging Data Acquisition |
|
Use Scenario: DDR3 memory power in LTE baseband units where EMI-sensitive RF sections coexist with high-speed digital logic. IC Role / Device Role / Timing Role: Interleaved 180° switching reduces input current harmonics, lowering conducted EMI into shared 12V backplane. Use Value: Programmable 500kHz–4MHz frequency allows tuning away from sensitive RF bands while maintaining small 0.82µH inductor size. |
Use Scenario: Powering DDR3 buffers in portable ultrasound machines requiring low-noise, low-power VREF generation during battery operation. IC Role / Device Role / Timing Role: Integrated VTTR buffer supplies clean 0.9V reference to ADC/DAC interface circuits without external filtering. Use Value: ±1.6% VTTR accuracy at 0.75V ensures consistent DDR timing margins across medical-grade temperature range (–40°C to 85°C). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DDR power supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS51200DRCR | Single-channel VTT-only regulator with integrated LDO; requires external VDDQ controller. Lower max current (±3A sink only, no sourcing). | Designed for cost-sensitive notebooks; lacks independent VDDQ regulation and VTTR tracking capability. | Select when only VTT termination is needed and system already provides regulated VDDQ. |
| ISL95831IRZ | Dual-channel with 0.6V/0.6V references (no VTTR buffer); requires external resistive divider for VTT = 0.5×VDDQ. Higher quiescent current (2.5mA vs. 1.3mA). | Targeted at mobile platforms with aggressive power gating; no integrated VREF buffer necessitates extra components. | Select when board space permits external VTTR generation and higher light-load IQ is acceptable. |
Compared with TPS51200DRCR and ISL95831IRZ, the LTC3634IUFD#TRPBF uniquely integrates both VDDQ and VTT regulation with VTTR tracking in a single QFN package, eliminating external dividers and buffers while supporting full ±3A bidirectional VTT current - critical for DDR3 termination compliance.
Availability
LTC3634IUFD#TRPBF is available at Aetrix Electronics and suitable for DDR memory power supplies, industrial embedded controllers, and telecom baseband units requiring stable component supply with guaranteed long-term availability.
Supply support for LTC3634IUFD#TRPBF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (acquired Linear Technology in 2017) designs precision analog, mixed-signal, and power management ICs for high-reliability applications across industrial, automotive, and communications markets.
The LTC3634IUFD#TRPBF belongs to Linear's DDR-specific power management product line, engineered to meet JEDEC-compliant VDDQ/VTT tracking, fast transient response, and robust protection requirements in memory-intensive systems.
FAQ
What is the maximum input voltage rating for the LTC3634IUFD#TRPBF?
The LTC3634IUFD#TRPBF has an absolute maximum VIN rating of 16V, with transient overvoltage lockout activating at 17.5V (rising) and releasing at 16.5V (falling). This protects internal MOSFETs during line surges without requiring external TVS devices.
How does the LTC3634IUFD#TRPBF achieve VTT = 0.5 × VDDQIN accuracy?
The LTC3634IUFD#TRPBF uses an on-chip resistor divider and buffered amplifier to generate VTTR = 0.5 × VDDQIN, specified at ±1.6% accuracy over –40°C to 125°C. This direct ratio tracking ensures VTT remains precisely half of VDDQIN even during dynamic voltage scaling events.
Can the LTC3634IUFD#TRPBF operate with only one channel enabled?
Yes - the LTC3634IUFD#TRPBF supports independent channel control via RUN1 and RUN2 pins. Either channel can be disabled (by pulling RUN below 1.01V) while the other remains active, enabling flexible power sequencing and partial-system operation.
What is the purpose of the TRACKSS pin on the LTC3634IUFD#TRPBF?
The TRACKSS pin on the LTC3634IUFD#TRPBF provides output voltage tracking and soft-start functionality. Applying a ramp voltage below 0.6V forces VDDQ to follow that ramp; an internal 1.4µA pull-up current enables simple RC soft-start by connecting a capacitor to SGND.
Does the LTC3634IUFD#TRPBF require external compensation components?
Yes - the LTC3634IUFD#TRPBF requires external RC networks on ITH1 and ITH2 pins to stabilize its current-mode control loops. Component values depend on inductor DCR, output capacitance, and target bandwidth; design guidelines are provided in the Applications Information section of the datasheet.
LTC3634IUFD#TRPBF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Converter, DDR
- Voltage - Input:
- 1.4V ~ 15V
- Number of Outputs:
- 2
- Voltage - Output:
- 0.6V ~ 3V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-QFN (4x5)
LTC3634IUFD#TRPBF FAQ
1.How can I place an order for LTC3634IUFD#TRPBF through Aetrix?
Please submit a Request for Quotation (RFQ) for LTC3634IUFD#TRPBF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for LTC3634IUFD#TRPBF reliable?
The price and inventory of LTC3634IUFD#TRPBF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for LTC3634IUFD#TRPBF is usually 5 days.
3.What payment methods are accepted for LTC3634IUFD#TRPBF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for LTC3634IUFD#TRPBF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for LTC3634IUFD#TRPBF?
LTC3634IUFD#TRPBF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your LTC3634IUFD#TRPBF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for LTC3634IUFD#TRPBF?
For technical support, including LTC3634IUFD#TRPBF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your LTC3634IUFD#TRPBF requirements.
6.How does Aetrix verify that LTC3634IUFD#TRPBF is sourced from the original manufacturer or authorized distributors?
All LTC3634IUFD#TRPBF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that LTC3634IUFD#TRPBF meets industry standards.
7.What is the process for return or replacement of LTC3634IUFD#TRPBF?
All LTC3634IUFD#TRPBF units undergo pre-shipment inspection (PSI). If there is an issue with LTC3634IUFD#TRPBF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The LTC3634IUFD#TRPBF part is unused and in its original packaging.
Return procedure for LTC3634IUFD#TRPBF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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